TestarossaRuntime.mesa
Barth, October 14, 1988 10:53:56 am PDT
DIRECTORY CardTab, Rope, RProperties, SymTab;
TestarossaRuntime: CEDAR DEFINITIONS = BEGIN
Theory
This interface describes the syntax and semantics of the information read from files to drive the Testarossa tester.
Syntax Notation
item | item = choose one
?item = zero or one item
*item = zero or more items
SMALL CAPS or puncuation other than bold ()?| = terminals
::= = keyword on left hand side is defined by expression on right hand side
Grammar
1. TestFile ::= Parameters TimingGroups NameDutPinTimingGroup DutPinFixturePin FixturePinChipChannel ColumnNames Vectors END
2. TimingGroups ::= TIMINGGROUPS * ( Name Format Number Number Number Bool Bool ; )
3. Format ::= RZ | RO | RC | NRZ
4. NameDutPinTimingGroup ::= NAMEDUTPINTIMINGGROUP * ( SignalName Number Name ; )
5. DutPinFixturePin ::= DUTPINFIXTUREPIN * ( Number Number ; )
6. FixturePinChipChannel ::= FIXTUREPINCHIPCHANNEL * ( Number Number Number ; )
7. ColumnNames ::= COLUMNNAMES <see note>
8. Vectors ::= VECTORS * ( CR * (Number Number Number ) )
9. SignalName ::= Name ? ( [ Number ] )
10. Parameters ::= PARAMETERS * ( Name (Name | Number) ; )
Bool ::= T | t | F | f
Name ::= Letter ?LetterDigitString
LetterDigitString ::= (Letter | Digit) ?LetterDigitString
Number ::= Digit ?Number
Letter ::= one of a-z | one of A-Z
Digit ::= 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9
CR ::= <carriage return>
Grammar Notes
White space may appear anywhere except inside Name or Number. Reserved words are matched ignoring case. Reserved words may not be used where other identifiers are required although this is not checked. Anywhere a token, i.e. a reserved word, name, number or seperator, may appear it is also legal to apply the following rule:
INCLUDE Name ? ( . Name )
This will cause the contents of the file named by the concatenation of all names to replace the include rule.
2. The numbers respectively refer to delay, width, and sample. Normally unused timing data should be set to zero. The booleans refer to variableThreshold and variableLevels.
4. The first name is the name of the signal. The number is the pin number of the device under test. The second name is the name of the timing group to which the pin belongs.
5. The numbers refer to the device under test pin number and the fixture pin number.
6. The first number is the fixture pin number. The second is the address of the chip. The third is the address of the channel within the chip. Note that the addresses start at zero while all of the pin numbers start at one.
7. The column names bind the position of a column of vector triplets to signal names. In order to make this legible the names are printed vertically. Trying to describe this with BNF seems a waste of time so just look at the code and examples to infer a definition. The names are allowed to eliminate one level of square brackets to make describing the values of buses more concise. The number of bits in a bus is derived from the NameDutPinTimingGroup declarations by looking for the min and max indicies.
8. The first number is the value, the second is the inhibit, and the third is the mask. If both the inhibit and mask data for a bit are ones then the value bit is not used and should normally be set to zero. A one in inhibit disables the tester from driving the device under test. A one in mask disables the tester from checking that the sense data matches the value. The number of (value, inhibit, mask) triplets must match the number of column names.
10. This allows arbitrary simple properties to be passed through from the source to the fixture data structure as a property list. The list of properties currently understood:
Clock Number -- sets the tester cycle time, Number is in nanoseconds
Types and Constants
ROPE: TYPE = Rope.ROPE;
Ns: TYPE = CARD;
Format: TYPE = {NRZ, RZ, RO, RC, RT};
TimingGroup: TYPE = REF TimingGroupRec;
TimingGroupRec: TYPE = RECORD[
format: Format,
delay: Ns,
width: Ns,
sample: Ns,
variableThreshold: BOOL,
variableLevels: BOOL];
BoolSequence: TYPE = REF BoolSequenceRec;
BoolSequenceRec: TYPE = RECORD[elements: SEQUENCE size: CARDINAL OF BOOL]; -- bit
Parsed input
Programming: TYPE = REF ProgrammingRec;
ProgrammingRec: TYPE = RECORD[
properties: RProperties.PropList ← NIL,
timingGroups: SymTab.Ref, -- ROPE to TimingGroup
nameDutPinTimingGroup: SymTab.Ref, -- ROPE to DutPinTimingGroups
dutPinFixturePin: CardTab.Ref, -- Card to Ref Card
fixturePinChipChannel: CardTab.Ref, -- Card to ChannelAddress
columnNames: CardTab.Ref, -- Card to ROPE
vectors: ParsedVectors];
DutPinTimingGroups: TYPE = LIST OF DutPinTimingGroup;
DutPinTimingGroup: TYPE = REF DutPinTimingGroupRec;
DutPinTimingGroupRec: TYPE = RECORD[
index: CARD,
dutPin: CARD,
timingGroup: ROPE];
ChannelAddress: TYPE = REF ChannelAddressRec;
ChannelAddressRec: TYPE = RECORD[
chip: CARD,
channel: CARD];
ParsedVectors: TYPE = REF ParsedVectorsRec;
ParsedVectorsRec: TYPE = RECORD[elements: SEQUENCE size: CARDINAL OF ParsedVector]; -- cycle
ParsedVector: TYPE = REF ParsedVectorRec;
ParsedVectorRec: TYPE = RECORD[elements: SEQUENCE size: CARDINAL OF ParsedVectorTriple]; -- column triplet
ParsedVectorTriple: TYPE = REF ParsedVectorTripleRec;
ParsedVectorTripleRec: TYPE = RECORD[
value: BoolSequence,
inhibit: BoolSequence,
mask: BoolSequence];
Machine Model
This machine model does not account for calibration and so the timing information is still abstract. It also doesn't worry about scope loops.
channelsPerChip: CARD = 16;
inhibitMaskPerChip: CARD = 16;
bytesPerAddress: CARD = 4;
vectorAddressesPerChip: CARD = 1024;
ChannelIndex: TYPE = [0..channelsPerChip);
InhibitMaskIndex: TYPE = [0..inhibitMaskPerChip);
Address: TYPE = [0..vectorAddressesPerChip);
ByteIndex: TYPE = [0..bytesPerAddress);
Fixture: TYPE = REF FixtureRec;
FixtureRec: TYPE = RECORD[
properties: RProperties.PropList ← NIL,
elements: SEQUENCE size: CARDINAL OF Chip]; -- chip address
Chip: TYPE = REF ChipRec;
ChipRec: TYPE = RECORD[
formatTiming: ARRAY ChannelIndex OF TimingGroup, -- may be NIL
inhibitMask: ARRAY InhibitMaskIndex OF InhibitMaskArray,
firstFreeVector: CARDINAL,
vectors: SEQUENCE size: CARDINAL OF MachineVector]; -- vectorAddressesPerChip
InhibitMaskArray: TYPE = ARRAY ChannelIndex OF InhibitMask;
InhibitMask: TYPE = RECORD[
inhibit: BOOL,
mask: BOOL];
MachineVector: TYPE = RECORD[elements: ARRAY ByteIndex OF Byte10];
Byte10: TYPE = [0..1024);
Errors
Error: ERROR [msg: ROPENIL];
Procedures
Parse: PROC [file: ROPE] RETURNS [program: Programming];
Transform: PROC [program: Programming] RETURNS [fixture: Fixture];
Pickle: PROC [fixture: Fixture, file: ROPE];
Unpickle: PROC [file: ROPE] RETURNS [fixture: Fixture];
Run: PROC [fixture: Fixture];
END.