DIRECTORY DABasics, RefTab, Rope, SunRPC, SunRPCAuth; SoftHdwBasics: CEDAR DEFINITIONS = BEGIN ArrayPositions: TYPE = LIST OF ArrayPosition; ArrayPosition: TYPE = REF ArrayPositionRec; ArrayPositionRec: TYPE = RECORD [ type: NodeType _ OToP, orientation: Orientation _ Vertical, chip: Position _ [0, 0], minorArray: Position _ [0, 0], grain: Position _ [0, 0]]; NodeType: TYPE = {OToP, RDToP, LUToP, LToP, PToI, PToRD, PToLU, PToL, ORDToI, LUToLU, OLUToI, ORDToL, Tristate, RDToRD, ORDToLU, LUToI, OLUToRD, LToI, RDToI, Inverter, FlipFlop, ParallelInput, InputEnabled, RAMEven, RAMOdd, Master, Input, Interchip, Long, Output, LeftUp, RightDown}; nodeNames: ARRAY NodeType OF Rope.ROPE; Orientation: TYPE = {Vertical, Horizontal}; orientationNames: ARRAY Orientation OF Rope.ROPE; Position: TYPE = DABasics.Position; CreateBase: PROC [sizes: ArrayPosition, useConnectionMachine: BOOL _ FALSE] RETURNS [array: ArrayBase]; Initialize: PROC [array: ArrayBase]; Fetch: PROC [array: ArrayBase, bit: ArrayPosition, time: INT _ -1] RETURNS [value: BOOL]; Store: PROC [array: ArrayBase, bit: ArrayPosition, value: BOOL]; MasterToSlave: PROC [array: ArrayBase]; Relax: PROC [array: ArrayBase]; Sample: PROC [array: ArrayBase]; ArrayPositionToRope: PROC [position: ArrayPosition] RETURNS [rope: Rope.ROPE]; RopeToArrayPosition: PROC [rope: Rope.ROPE] RETURNS [position: ArrayPosition]; ArrayPositionEqual: RefTab.EqualProc; ArrayPositionHash: RefTab.HashProc; ArrayBase: TYPE = REF ArrayBaseRec; ArrayBaseRec: TYPE = RECORD [ sizes: ArrayPosition, useConnectionMachine: BOOL, state: ArrayBaseState, id: CARD, h: SunRPC.Handle, c: SunRPCAuth.Conversation]; ArrayBaseState: TYPE = REF ArrayBaseStateRec; ArrayBaseStateRec: TYPE = RECORD [ positionToEntity: RefTab.Ref, -- grains indexed by Output, minor arrays indexed by RAMEven, long lines by Long scheduledGrains: Grain _ NIL, scheduledMinorArrays: MinorArray _ NIL]; MinorArray: TYPE = REF MinorArrayRec; MinorArrayRec: TYPE = RECORD [ key: ArrayPosition _ NIL, scheduled: BOOL _ FALSE, nextMinorArray: MinorArray _ NIL, RAMEven, RAMOdd: BOOL _ FALSE, vertical: GrainSeq _ NIL, horizontal: GrainSeq _ NIL]; Grain: TYPE = REF GrainRec; GrainSeq: TYPE = REF GrainSeqRec; GrainSeqRec: TYPE = RECORD [elements: SEQUENCE size: CARDINAL OF Grain]; GrainRec: TYPE = RECORD [ key: ArrayPosition _ NIL, scheduled: BOOL _ FALSE, nextGrain: Grain _ NIL, vertical: BOOL _ FALSE, leftUpSelectLeftUp: BOOL _ FALSE, leftUp: BOOL _ FALSE, rightDownSelectRightDown: BOOL _ FALSE, rightDown: BOOL _ FALSE, inputSelect: InputSelectIndex _ none, input: BOOL _ FALSE, output: BOOL _ FALSE, leftUpGrain: Grain _ NIL, rightDownGrain: Grain _ NIL, ORDToL, Tristate: BOOL _ FALSE, longControl: LongControl _ off, longLine: LongLine _ NIL, minorArray: MinorArray _ NIL, flipFlop: BOOL _ FALSE, master: BOOL _ FALSE, invert: BOOL _ FALSE, parallelInput: BOOL _ FALSE, ORDToI, OLUToI, LUToI, LToI, RDToI: BOOL _ FALSE, LUToLU, ORDToLU: BOOL _ FALSE, RDToRD, OLUToRD: BOOL _ FALSE, perpendicularGrains: SEQUENCE size: CARDINAL OF PerpendicularGrain]; LongControl: TYPE = {off, on, olu}; InputSelectIndex: TYPE = {none, ord, olu, lu, l, rd}; PerpendicularGrain: TYPE = RECORD [ inputEnabled: BOOL, grain: Grain]; LongLine: TYPE = REF LongLineRec; LongLineRec: TYPE = RECORD [ key: ArrayPosition _ NIL, long: BOOL, grains: SEQUENCE size: CARDINAL OF Grain]; END. SoftHdwBasics.mesa Copyright Σ 1988 by Xerox Corporation. All rights reserved. Barth, June 28, 1989 12:35:34 pm PDT Interchip, Long, Output, LeftUp, and RightDown are not accessible through Fetch and Store in the actual hardware and they are not state bits in the hardware. Input is the slave of Master and is accessible when FlipFlopEnabled is asserted, otherwise it also is not a state bit and is not accessible. interchip and all of the edge tiles belong to the minor array or chip to the left or up. The pin tiles belong to the chip up or down, or left or right, depending on the proper low order bit of minorArray. The orientation of inputEnabled refers to the orientation of the output to which the input is connected. Interchip, Long vertical: chip, minorArray.x, grain.x horizontal: chip, minorArray.y, grain.y OToP, RDToP, LUToP, LToP, PToI, PToRD, PToLU, PToL vertical: chip, minorArray.x, low order bit of minorArray.y, grain.x horizontal: chip, low order bit of minorArray.x, minorArray.y, grain.y Input, Output, LeftUp, RightDown, ORDToI, LUToLU, OLUToI, ORDToL, Tristate, RDToRD, ORDToLU, LUToI, OLUToRD, LToI, RDToI, Inverter, FlipFlop, ParallelInput, Master vertical: chip, minorArray, grain.x horizontal: chip, minorArray, grain.y InputEnabled vertical: chip, minorArray, grain horizontal: chip, minorArray, grain RAMEven, RAMOdd chip, minorArray Ignores type and orientation. Uses the rest of the position to size things. The following data structures are not meant to be understood or relied upon by clients. Κ²˜codešœ™K™