6.3 Diffusion Rules
6.3.1 Min Width
$NDifWidth is used by ECAD as representing dif width
NewRule[rules, $NDifWidth, width, nDif, NIL, 2, "6.3.1"];
NewRule[rules, $PDifWidth, width, pDif, NIL, 2, "6.3.1"];
NewRule[rules, $NWellDifWidth, width, nWellDif, NIL, 2, "6.3.1"];
NewRule[rules, $PWellDifWidth, width, pWellDif, NIL, 2, "6.3.1"];
6.3.2 Min Transistor Width
$NTransistorChannelWidth used by ECAD for xstor width
NewRule[rules, $NTransistorChannelWidth, special, nDif, poly, 3, "6.3.2"];
NewRule[rules, $PTransistorChannelWidth, special, pDif, poly, 3, "6.3.2"];
6.3.3 Min space between N+ to N+, P+ to P+, or P+ to N+ when the two adjacent diffusions are located on the same substrate and one or both are intended to be isolated from the substrate (such as a drain diffusion).
$NDifSpace used by ECAD
NewRule[rules, $NDifSpace, intraspace, nDif, NIL, 35, "6.3.3", 10];
NewRule[rules, $PDifSpace, intraspace, pDif, NIL, 35, "6.3.3", 10];
NewRule[rules, $NWellDifSpace, intraspace, nWellDif, NIL, 35, "6.3.3", 10];
NewRule[rules, $PWellDifSpace, intraspace, pWellDif, NIL, 35, "6.3.3", 10];
NewRule[rules, $NDifPDifSpace, interspace, nDif, pDif, 35, "6.3.3", 10];
NewRule[rules, $NDifNWellDifSpace, interspace, nDif, nWellDif, 35, "6.3.3", 10];
NewRule[rules, $PDifPWellDifSpace, interspace, pDif, pWellDif, 35, "6.3.3", 10];
NewRule[rules, $NWellDifPWellDifSpace, interspace, nWellDif, pWellDif, 35, "6.3.3", 10];
Checking the next two rules requires knowing whether the nDif (pDif) is part of a butting contact or not.
NewRule[rules, $NDifPWellDifSpace, interspace, nDif, pWellDif, 35, "6.3.3", 10];
NewRule[rules, $PDifNWellDifSpace, interspace, pDif, nWellDif, 35, "6.3.3", 10];
6.3.4 Min space between N+ to P+ when the two adjacent diffusions are located on the same substrate and the diffusion of the opposite type of the substrate is at the same potential of the substrate (such as a source).
This is only used in butting contacts.
NewRule[rules, $NDifPWellDifSamePotentialSpace, special, nDif, pWellDif, 0, "6.3.4"];
NewRule[rules, $PDifNWellDifSamePotentialSpace, special, pDif, nWellDif, 0, "6.3.4"];
6.3.5 Min N- Tub overlap of a P+ diffusion when the P+ region is contained in the tub (such as a P-Channel source and drain).
NewRule[rules, $NWellPDifSurround, surround, nWell, pDif, 5, "6.3.5"];
6.3.6 Min N- Tub overlap of a N+ diffusion which is used for contacting the tub.
NewRule[rules, $NWellNWellDifSurround, surround, nWell, nWellDif, 3, "6.3.6"];
6.3.7 Min distance of N+ diffusion from the N- Tub edge when N+ is outside the tub (such as a N-Channel source and drain).
NewRule[rules, $NWellNDifSpace, interspace, nWell, nDif, 7, "6.3.7"];
6.3.8 Min N+ guard ring overlap of N-Tub
The VTI rules distinguish between "blue" N+ diffusion used for contacting a tub and "blue" N+ diffusion used as a guard ring. We currently have no way of encoding how "blue" N+ diffusion is used. If we therefore say all "blue" N+ must be checked by both rules 6.3.6. and 6.3.8., then 6.3.8. is redundant. That is, if a shape passes rule 6.3.6., it automatically passes rule 6.3.8.
Note that our name for blue N+ diffusion, nWellDif, seems to imply the use of contacting the nWell but not the use of being a guard ring. As such, it may be a misnomer.
Louis feels that it would be OK if all uses of blue N+ were required to be surrounded by 3l of nWell. VTI advises against using guard rings for internal circuits, and pad circuits may not be that area critical.
NewRule[rules, $NWellDifNWellOverlap, overlap, nWellDif, nWell, 1, "6.3.8"];
6.3.9 Min distance of a P+ diffusion used as P substrate contact from the edge of a N- Tub.
NewRule[rules, $PWellDifNWellSpace, interspace, pWellDif, nWell, 5, "6.3.9"];
6.3.10 Min distance of a N+ guard ring of a N- Tub from a P+ diffusion contacting the substrate.
The "use" subtlety is lost. See comments in section 6.3.8.
NewRule[rules, $PWellDifNWellDifSpace, interspace, nWellDif, pWellDif, 4, "6.3.10"];
6.3.11 Min P- Tub overlap of a N+ diffusion when the N+ region is contained in the tub (such as a N-Channel source and drain).
No P well defined.
6.3.12 Min distance between a N+ diffusion contained in the P- tub and a P+ diffusion contained in the N- tub. d5 + d7 or d11 + d13
This rule is redundant, with respect to either rules 6.3.5. and 6.3.7. or rules 6.3.11. and 6.3.14. (Either nwell or pwell or both must be present.)
NewRule[rules, $NDifPWellPDifNWellSpace, special, pDif, nDif, 12, "6.3.12"];
6.3.13 Min P- tub overlap of a P+ diffusion which is used for contacting the tub
No P well defined.
6.3.14 Min distance of a P+ diffusion from the P- tub edge when P+ is outside the tub (such as a P- channel source and drain).
No P well defined.
6.3.15 Min P+ guard ring overlap of the P- tub
No P well defined.
6.3.16 Min distance of a P+ guard ring of a P- tub from a N+ diffusion contacting the substrate.
Again, as in rule 6.3.10., the "use" subtlety is lost. In fact, without this subtlety, this rule is identical to rule 6.3.10.
No P well defined.
6.3.17 Min distance of a N+ diffusion used as substrate contact from the edge of a P- Tub
No P well defined.
6.3.18 Minimum overlap of a P+ or N+ source/drain diffusion across a gate (in the direction of current flow.)
If this rule shrinks below 3 then 6.5.2.3 must be enforced.
$NTransistorChannelExtension used by ECAD for xstor channel extension
NewRule[rules, $NTransistorChannelExtension, extension, nDif, poly, 3, "6.3.18"];
NewRule[rules, $PTransistorChannelExtension, extension, pDif, poly, 3, "6.3.18"];
6.4 Polysilicon Rules
6.4.1 Min width
NewRule[rules, $PolyWidth, width, poly, NIL, 2, "6.4.1"];
6.4.2 Min transistor length (5v max operation)
NOT explicitly checked by ECAD
NewRule[rules, $NTransistorChannelLength, special, nDif, poly, 2, "6.4.2"];
NewRule[rules, $PTransistorChannelLength, special, pDif, poly, 2, "6.4.2"];
6.4.3 Min poly spacing
NewRule[rules, $PolySpace, intraspace, poly, NIL, 25, "6.4.3", 10];
6.4.4 Min poly gate extension beyond diffusion over field oxide
$NTransistorGateExtension used by ECAD
NewRule[rules, $NTransistorGateExtension, extension, poly, nDif, 2, "6.4.4"];
NewRule[rules, $PTransistorGateExtension, extension, poly, pDif, 2, "6.4.4"];
6.4.5 Min poly spacing to unrelated diffusion
$PolyNDifSpace used by ECAD
Checking this rule by rectangle pairs requires that the errors between the gate poly and the channel diffusion be suppressed when a transistor is exploded.
NewRule[rules, $PolyNDifSpace, interspace, poly, nDif, 1, "6.4.5"];
NewRule[rules, $PolyPDifSpace, interspace, poly, pDif, 1, "6.4.5"];
NewRule[rules, $PolyNWellDifSpace, interspace, poly, nWellDif, 1, "6.4.5"];
NewRule[rules, $PolyPWellDifSpace, interspace, poly, pWellDif, 1, "6.4.5"];
6.7 Via Rules
6.7.1 A via can be placed over:
1) Diffusion.
VTI did not specify the diffusion surround via distance. Accounting for mask misalignment we decided on 2. The DRC must decide between the surround case and the space case. We require that if the surround case applies that the designer use a single rectangle to perform the surround and that no other rectangles approach to within the space rule. Because we do not wish via to appear over gate it must be the case that flattening a transistor does not produce diffusion rectangles which are the union of the source and drain but rather individual rectangles for each.
NewRule[rules, $DifViaSpace, special, NIL, NIL, 2, "6.7.11"];
NewRule[rules, $DifViaSurround, special, NIL, NIL, 2, "6.7.12"];
2) Poly over field oxide.
This is covered by rules 6.7.6 and 6.7.7
3) Field oxide
This is when nothing, other than n well, exists below the via and so no special rules are needed.
6.7.2 Min size
NewRule[rules, $ViaWidth, width, via, NIL, 2, "6.7.2"];
6.7.3 Max size
Except at the pads.
NewRule[rules, $ViaMaxWidth, maxWidth, via, NIL, 5, "6.7.3"];
6.7.4 Min via to via space
NewRule[rules, $ViaSpace, intraspace, via, NIL, 4, "6.7.4"];
6.7.5 Min metal 1 and 2 overlap of via
NewRule[rules, $Metal1ViaSurround, surround, metal1, via, 1, "6.7.5"];
NewRule[rules, $Metal2ViaSurround, surround, metal2, via, 1, "6.7.5"];
6.7.6 Min via to poly spacing
We might want to change this so that via over poly is always illegal.
Only when poly does not surround via, as for dif in 6.7.1.
NewRule[rules, $PolyViaSpace, interspace, poly, via, 2, "6.7.6"];
6.7.7 Min poly overlap of via (when via is inside of the poly)
Need to know when poly surrounds, as for dif in 6.7.1.
NewRule[rules, $PolyViaSurround, surround, poly, via, 3, "6.7.7"];
6.7.8 Min via to contact of diffusion spacing
Need to know when dif/poly contact. Not strictly true for this rule, unless you want to avoid making useless checks. Any via and contact-to-poly which meet rule 6.7.9. (3l) automatically meet rule 6.7.8. (2l) too, even though the latter rule is inappropriate.
NewRule[rules, $DifCutViaSpace, special, via, contact, 2, "6.7.8"];
6.7.9 Min via to contact to poly spacing
This rule and 6.7.8 together define the spacing between via and contact. If this rule becomes smaller than 6.7.8 then 6.7.8 becomes interspace and this rule becomes special.
Need to know when dif/poly contact. However, this rule is useful only if the via is on poly. If the via is on field oxide or diffusion, rule 6.7.6. and rule 6.5.1.4. keep it at least 2 + 1 = 3l away from contact-to-poly. So, if vias on poly were forbidden, this rule would be unnecessary. See comments in section 6.7.7.
NewRule[rules, $PolyCutViaSpace, interspace, via, contact, 3, "6.7.9"];
6.7.10 Max current carrying capability is 0.07 mA per micron of via hole periphery
6.9 Additional Layout Requirements (not shrinkable)
Most of the dimensions specified here are in microns. When they are drawn on the layout grid the number of Lambda must be chosen in such a way that the final dimensions in microns are not smaller than the ones indicated (i.e. bond pad dimensions in microns are not shrinkable).
6.9.1 Bonding pads consist of a metal 1 pad, a via opening over metal 1, a metal 2 pad and opening into the passivation layers.
6.9.2 Minimum pad dimension for metal 1 & 2
NewMicronRule[rules, $PadMetalWidth, special, NIL, NIL, 127, "6.9.2"];
6.9.3 Min metal 1 & 2 overlap of via
NewMicronRule[rules, $PadMetalViaSurround, special, NIL, NIL, 35, "6.9.3", 10];
6.9.4 Min metal 2 overlap of pad mask (layer 70) opening
NewMicronRule[rules, $Metal2PadSurround, surround, metal2, pad, 5, "6.9.4"];
6.9.5 Min spacing between metal edges of adjacent pads
This is set to 51 instead of 50.8 so that the scaling is integer.
NewMicronRule[rules, $PadMetalSpace, special, NIL, NIL, 51, "6.9.5"];