DPImpl.mesa
Copyright © 1985 by Xerox Corporation. All rights reserved.
Don Curry, May 5, 1987 7:48:27 am PDT
Last Edited by: Don Curry June 7, 1987 10:35:42 am PDT
Last Edited by: Gasbarro July 9, 1987 8:59:43 am PDT
Barth, June 12, 1987 5:51:57 pm PDT
DIRECTORY AMBridge, AMTypes, CD, CDDirectory, CDImports, Convert, Core, CoreClasses, CoreCreate, CoreFlat, CoreOps, CoreXform, DP, IO, Ports, PWCore, Rope, Rosemary, Sisyph, SymTab, TerminalIO;
DPImpl:
CEDAR
PROGRAM
IMPORTS AMBridge, CDDirectory, CDImports, Convert, CoreClasses, CoreCreate, CoreFlat, CoreOps, CoreXform, DP, IO, Ports, PWCore, Rope, Rosemary, Sisyph, SymTab, TerminalIO
EXPORTS DP
= BEGIN
dpName: DP.ROPE ← "DP";
dpDesign: CD.Design ← CDIO.ReadDesign[dpName];
Signal: SIGNAL = CODE;
ctxWI: SymTab.Ref ← SymTab.Create[];
ctxCI: SymTab.Ref ← SymTab.Create[];
dpSpecName: ATOM ← CoreProperties.RegisterProperty
[$DPSpec, CoreProperties.Props[[CoreProperties.propPrint, CoreProperties.PropDontPrint]]];
dpBindings: ATOM ← CoreProperties.RegisterProperty
[$DPBindings, CoreProperties.Props[[CoreProperties.propPrint, CoreProperties.PropDontPrint]]];
Set: PUBLIC PROC [cx: DP.Context, dpSpecRec: DP.DPSpecRec] RETURNS[layout: ATOM] = {
dpSpec: DP.DPSpec ← NEW[DP.DPSpecRec ← dpSpecRec];
Sisyph.Store[cx, "DPSpec", NEW[DP.DPSpec ← dpSpec]];
Sisyph.Store[cx, Sisyph.corePropsRope, NEW[Core.Properties ← CoreProperties.PutProp
[GetCoreProps[cx], dpSpecName, dpSpec ] ] ];
Sisyph.Store[cx, Sisyph.corePropsRope, NEW[Core.Properties ← CoreProperties.PutProp
[GetCoreProps[cx], $Layout, $DP] ] ];
AddGlobal[cx, "Vbb"];
layout ← $DP};
CkDPSpec: PROC [cx: DP.Context, dpSpec: DP.DPSpec] RETURNS[DP.DPSpec] = {
found: BOOL;
n: INT;
IF dpSpec # NIL THEN RETURN[dpSpec];
[found, n] ← Sisyph.FetchInt[cx, "n"];
TerminalIO.PutF["Using Default DPSpec[%g, 6, 1]\n", IO.int[n]];
RETURN[NEW[DP.DPSpecRec ← [n, 6, 1] ] ] };
RegisterWI:
PUBLIC
PROC [nm:
DP.ROPE, wiProc: DP.WIProc] =
{[]←SymTab.Store[ctxWI, nm, NEW[DP.WIProc ← wiProc]]};
RegisterCI:
PUBLIC
PROC [nm:
DP.ROPE, ciProc: DP.CIProc] =
{[]←SymTab.Store[ctxCI, nm, NEW[DP.CIProc ← ciProc]]};
GetN:
PUBLIC
PROC [cx:
DP.Context]
RETURNS [n:
INT] = {
found: BOOL;
[found, n] ← Sisyph.FetchInt[cx, "n"];
IF NOT found THEN {n ← 1; TerminalIO.PutF["Default n ~ 1\n"]} };
GetWI:
PUBLIC DP.WIProc = {
obj: CD.Object ← Sisyph.GetCDObj[cx];
name: DP.ROPE ← CDDirectory.Name[obj, Sisyph.GetDesign[cx]];
wiProcRef: REF DP.WIProc ← NARROW[SymTab.Fetch[ctxWI, name].val];
wire ← wiProcRef^[cx]};
GetCI:
PUBLIC
DP.CIProc = {
obj: CD.Object ← Sisyph.GetCDObj[cx];
name: DP.ROPE ← CDDirectory.Name[obj, Sisyph.GetDesign[cx]];
ciProcRef: REF DP.CIProc ← NARROW[SymTab.Fetch[ctxCI, name].val];
IF
NOT Sisyph.FetchInt[cx, "n"].found
THEN {RETURN[Sisyph.ES[name.Substr[0,name.Index[0,"."]].Cat[".sch"], cx]]}
ELSE {IF ciProcRef=NIL THEN Signal[]; RETURN[ciProcRef^[cx]]} };
DataPatch Icon Implementations
DPBus: DP.WIProc = {wire ← CoreCreate.Seq[NIL, GetN[cx]]};
DPVddDag: DP.WIProc = {DP.SetCharCode[wire ← Dag[GetN[cx], "Vdd"], "+"]};
DPGndDag: DP.WIProc = {DP.SetCharCode[wire ← Dag[GetN[cx], "Gnd"], "-"]};
GetSeqCT:
PUBLIC
PROC[cx:
DP.Context, name:
DP.
ROPE, wrs:
LIST
OF CoreCreate.
WR]
RETURNS[cell: DP.CellType] = {
n: NAT ← GetN[cx];
cell ← GetSchCT[cx, name];
IF n=1 THEN RETURN[cell]
ELSE {
cell ← Rosemary.BindCellType[CoreFlat.CellTypeCutLabels[CoreCreate.SequenceCell[cell, n, CoreCreate.WireList[wrs]], "DPMacro"], Rope.Cat[name, "Seq"]];
FOR index:
NAT
IN [0..cell.public.size)
DO
[] ← Ports.InitPort[cell.public[index], l];
ENDLOOP;
FOR wl:
LIST
OF CoreCreate.
WR ← wrs, wl.rest
UNTIL wl=
NIL
DO
Ports.InitPorts[cell, ls, none, wl.first];
ENDLOOP;
};
};
TopBot: TYPE = {top, bot};
LRB: TYPE = {lt, rt, base};
GPC: TYPE = {g, p, c};
TBNm: ARRAY TopBot OF DP.ROPE = [top: "t", bot: "b"];
LRBNm: ARRAY LRB OF DP.ROPE = [lt: "l", rt: "r", base: "b"];
GPCNm: ARRAY GPC OF DP.ROPE = [g: "G", p: "P", c: "C"];
II: ARRAY LRB OF ARRAY GPC OF NAT = [lt:[0,1,2], rt:[3,4,5], base:[6,7,8]];
III:
ARRAY
TopBot
OF
ARRAY
LRB[lt..rt]
OF
ARRAY
GPC
OF
NAT =
[top: [lt:[0, 1, 2], rt:[3, 4, 5] ], bot: [lt:[6,7,8], rt:[9,10,11]] ];
DPAdderWire:
PUBLIC
PROC[cx:
DP.Context, tb: TopBot, withCry:
BOOL ←
FALSE]
RETURNS[wire: DP.Wire] = {
n: NAT ← GetN[cx];
levels: NAT ← CoreXform.FlatTreeIndex[n, 0].degrees;
span: NAT ← 2*n;
lim: LRB ← IF tb=top THEN rt ELSE base;
wires: DP.Wires ← NIL;
cry: DP.Wire ← NIL;
null: DP.Wire ← CoreOps.CreateWires[0, "null"];
wire ← CoreOps.CreateWires[3*3];
FOR lrb:
LRB
IN
LRB
DO
FOR gpc:
GPC
IN
GPC
DO
wire[II[lrb][gpc]] ← CoreOps.CreateWires[n, Rope.Cat[TBNm[tb], LRBNm[lrb], GPCNm[gpc]]];
ENDLOOP ENDLOOP;
FOR level:
NAT
IN [0..levels)
DO
span ← span/2;
IF (tb=top)=((level MOD 2)#(levels MOD 2)) THEN LOOP;
IF level=0
THEN {
cry ← CoreOps.CreateWires[0, (IF tb=bot THEN "carry" ELSE "notCarry")];
wire[II[rt][c]][span/2-1] ← cry;
wire[II[rt][g]][span/2-1] ← CoreOps.CreateWires[0, "nullG"];
wire[II[rt][p]][span/2-1] ← CoreOps.CreateWires[0, "nullP"];
LOOP};
FOR levelIdx:
NAT
IN [0..n/(2*span))
DO
phIdx: NAT ← span-1 + levelIdx*2*span;
IF span>1
THEN
FOR gpc:
GPC
IN
GPC
DO
wire[II[lt][gpc]][phIdx] ← wire[II[rt][gpc]][phIdx-span/2] ← CoreOps.CreateWire[];
wire[II[rt][gpc]][phIdx] ← wire[II[rt][gpc]][phIdx+span/2] ← CoreOps.CreateWire[];
ENDLOOP
ELSE
FOR gpc:
GPC
IN
GPC
DO
wire[II[lt][gpc]][phIdx] ← wire[II[base][gpc]][phIdx] ← CoreOps.CreateWire[];
wire[II[rt][gpc]][phIdx] ← wire[II[base][gpc]][phIdx+1] ← CoreOps.CreateWire[];
ENDLOOP;
ENDLOOP;
ENDLOOP;
IF (cry=NIL)=withCry THEN Signal[]; -- check
FOR lrb:
LRB
IN [lt..lim]
DO
FOR gpc:
GPC
IN
GPC
DO
FOR index:
NAT
IN [0..n)
DO
IF wire[II[lrb][gpc]][index]=NIL THEN wire[II[lrb][gpc]][index] ← null ENDLOOP;
wires ← CONS[wire[II[lrb][gpc]], wires] ENDLOOP ENDLOOP;
wire ← CoreOps.CreateWire[wires]};
DPAdderTop: DP.WIProc = {RETURN[DPAdderWire[cx, top]]};
DPAdderTopCry: DP.WIProc = {RETURN[DPAdderWire[cx, top, TRUE]]};
DPAdderBot: DP.WIProc = {RETURN[DPAdderWire[cx, bot]]};
DPAdderBotCry: DP.WIProc = {RETURN[DPAdderWire[cx, bot, TRUE]]};
DPAdderGPC:
DP.CIProc = {
n: NAT ← GetN[cx];
ins: NAT ← 12;
pwr: NAT ← ins + 6;
rec: CoreClasses.RecordCellType ← NEW[CoreClasses.RecordCellTypeRec[n]];
gpc0: DP.CellType ← GetSchCT[cx, "DP.DPAdderGPC0.sch"];
gpc1: DP.CellType ← GetSchCT[cx, "DP.DPAdderGPC1.sch"];
blank: DP.CellType ← GetSchCT[cx, "DP.DPAdderGPCBlank.sch"];
public: DP.Wire ← CoreOps.CreateWires[pwr + 2];
vdd: DP.Wire ← CoreOps.CreateWires[0, "Vdd"];
gnd: DP.Wire ← CoreOps.CreateWires[0, "Gnd"];
null: DP.Wire ← CoreOps.CreateWires[0, "null"];
rec.internal ← CoreOps.CreateWires[pwr + 2];
FOR tb: TopBot
IN TopBot
DO
FOR lr:
LRB
IN [lt..rt]
DO
FOR gpc:
GPC
IN
GPC
DO
public[
III[tb][lr][gpc]] ← CoreOps.CreateWires
[n, Rope.Cat[TBNm[tb], LRBNm[lr], GPCNm[gpc]]];
ENDLOOP ENDLOOP ENDLOOP;
FOR input:
NAT
IN [0..6)
DO
public[ins + input] ← CoreCreate.Seq[IO.PutFR["in%g", IO.int[input]], n] ENDLOOP;
public[pwr + 0] ← gnd;
public[pwr + 1] ← vdd;
FOR index:
NAT
IN [0..n)
DO
Copy:
PROC[wire:
DP.Wire]
RETURNS[new:
DP.Wire] = {
IF wire.size#0
THEN {
new ← CoreOps.CreateWires[wire.size];
FOR i: NAT IN [0..new.size) DO new[i] ← Copy[wire[i]] ENDLOOP}
ELSE {
name: DP.ROPE ← CoreOps.GetShortWireName[wire];
SELECT
TRUE
FROM
Rope.Equal[name, "Gnd"] => RETURN[public[pwr + 0]];
Rope.Equal[name, "Vdd"] => RETURN[public[pwr + 1]];
Rope.Equal[name.Substr[0,4], "null"] => RETURN[null];
Rope.Equal[name.Substr[0,2], "in"] => {
ii: INT ← Convert.IntFromRope[name.Substr[2,1]];
new ← public[ins + ii][index]};
ENDCASE => {
not: BOOL ← name.Fetch[]='n;
ii: NAT ← IF not THEN 1 ELSE 0;
gpc:
GPC ←
SELECT name.Fetch[ii+0] FROM 'G=>g, 'P=>p, 'C=>c, ENDCASE => ERROR;
lr:
LRB ←
SELECT name.Fetch[ii+1] FROM 'L=>lt, 'R=>rt, 'M=>rt, ENDCASE => ERROR;
tb: TopBot ← IF (gpc=c)=not THEN top ELSE bot;
IF public[
III[tb][lr][gpc]][index] =
NIL
THEN public[III[tb][lr][gpc]][index] ← CoreOps.CreateWires[0];
new ← public[III[tb][lr][gpc]][index]}}};
tc: CoreXform.Coord ← CoreXform.FlatTreeIndex[n, index];
type:
DP.CellType ←
IF tc.degree=0
THEN blank
ELSE
IF (tc.degree
MOD 2) # (tc.degrees
MOD 2)
THEN gpc0
ELSE gpc1;
rec[index] ← NEW[CoreClasses.CellInstanceRec ← [actual: Copy[type.public], type: type]];
ENDLOOP;
FOR tb: TopBot
IN TopBot
DO
FOR lr:
LRB
IN
LRB[lt..rt]
DO
FOR gpc:
GPC
IN
GPC
DO
FOR index:
NAT
IN [0..n)
DO
IF public[ III[tb][lr][gpc] ][index]#NIL THEN LOOP;
public[ III[tb][lr][gpc] ][index] ← null;
ENDLOOP ENDLOOP ENDLOOP ENDLOOP;
FOR i: NAT IN [0..public.size) DO rec.internal[i] ← public[i] ENDLOOP;
cell ← CoreOps.CreateCellType[CoreClasses.recordCellClass, public, rec]};
Utilities
RefFromTV:
PROC [tv:
REF]
RETURNS [
REF] = {
IF tv=NIL THEN RETURN [NIL];
IF ~ISTYPE [tv, AMTypes.TV] THEN ERROR;
TRUSTED {RETURN [AMBridge.SomeRefFromTV[tv]]} };
GetCoreProps:
PROC [cx: DP.Context]
RETURNS [Core.Properties] = {
found: BOOL;
ref: SymTab.Val;
[found, ref] ← SymTab.Fetch[cx, Sisyph.corePropsRope];
IF found
THEN RETURN [NARROW [RefFromTV[ref], REF Core.Properties]^]
ELSE ERROR};
AddGlobal:
PROC[cx:
DP.Context, name:
DP.
ROPE] = {
ropes: Sisyph.ROPES ← Sisyph.GetGlobalNames[cx];
FOR globals:
LIST
OF
DP.ROPE ← ropes, globals.rest
WHILE globals#
NIL
DO
IF globals.first.Equal[name] THEN RETURN ENDLOOP;
ropes ← Sisyph.Cons[name, ropes];
Sisyph.Store[cx, "globalNames", NEW[Sisyph.ROPES ← ropes]]};
Sisyph.Store[cx, Sisyph.globalNamesRope, NEW[Sisyph.ROPES ← ropes]]};
See also CCImpl.Get
GetSchCT:
PUBLIC
PROC [cx:
DP.Context, name:
DP.
ROPE]
RETURNS [cellType:
DP.CellType] ~ {
design: CD.Design ← Sisyph.GetDesign[cx];
importeeName: IO.ROPE ← name.Substr[0, name.Index[0, "."]];
IF design.name.Equal[importeeName]
THEN name ← name.Substr[name.Index[0, "."]+1]
ELSE
IF CDDirectory.Fetch[design, name]=NIL
THEN {
rootName: IO.ROPE ← name.Substr[name.Index[0, "."]+1];
ob: CD.Object ← CDImports.CreateImportFromCache[design, rootName, importeeName, TRUE];
IF NOT CDDirectory.Include[design, ob, name, FALSE] THEN ERROR};
cellType ← Sisyph.ExtractSchematicByName[name: name, cx: cx]};
GetSortedCT:
PUBLIC
PROC [cx:
DP.Context, name:
DP.
ROPE]
RETURNS [cellType:
DP.CellType] ~ {
ambiguous, inX: BOOL;
cellType ← Sisyph.ExtractSchematicByName[name: name, cx: cx];
[ambiguous, inX] ← PWCore.InstancesInXOrY[Sisyph.mode.decoration, cellType];
IF
NOT ambiguous
THEN PWCore.SortInstances
[Sisyph.mode.decoration, cellType, IF inX THEN PWCore.SortInX ELSE PWCore.SortInY]};
Interleave:
PUBLIC
PROC [a, b:
NAT]
RETURNS [wire:
DP.Wire] = {
aMain: DP.Wire ← CoreOps.CreateWires[a*b, "A"];
bMain: DP.Wire ← CoreOps.CreateWires[b*a, "B"];
aSubs: DP.Wire ← CoreOps.CreateWires[a];
bSubs: DP.Wire ← CoreOps.CreateWires[b];
publics: DP.Wires ← LIST[aMain, bMain];
FOR i:
NAT
IN [0..a)
DO
aSubs[i] ← CoreOps.CreateWires[b, IO.PutFR["a%g", IO.int[i]]];
publics ← CONS[aSubs[i], publics] ENDLOOP;
FOR i:
NAT
IN [0..b)
DO
bSubs[i] ← CoreOps.CreateWires[a, IO.PutFR["b%g", IO.int[i]]];
publics ← CONS[bSubs[i], publics] ENDLOOP;
FOR i:
NAT
IN [0..a)
DO
FOR j:
NAT
IN [0..b)
DO
aMain [i*b+j] ←
bMain [j*a+i] ←
aSubs [i][j] ←
bSubs [j][i] ← CoreOps.CreateWires[0] ENDLOOP ENDLOOP;
RETURN[CoreOps.CreateWire[publics] ]};
ColumnCompose:
PUBLIC
PROC[n, cols, chans:
NAT]
RETURNS [wire:
DP.Wire] = {
LetterIndex:
PROC[let, index:
NAT]
RETURNS[li:
DP.
ROPE] =
{RETURN[IO.PutFR["%g%g", IO.char['a+let], IO.int[index]]]};
wire ← CoreOps.CreateWires[cols+1];
FOR i:
NAT
IN [0..cols)
DO
wire[i] ← CoreOps.CreateWires[chans];
ENDLOOP;
wire[cols] ← CoreOps.CreateWires[chans];
FOR chan:
NAT
IN [0..chans)
DO
wire[cols][chan] ← CoreOps.CreateWires[n*cols, LetterIndex[cols, chan]];
FOR col:
NAT
IN [0..cols)
DO
wire[col][chan] ← CoreOps.CreateWires[n, LetterIndex[col, chan]];
FOR bit:
NAT
IN [0..n)
DO
wire[col ][chan][bit] ←
wire[cols][chan][bit + col*n] ← CoreOps.CreateWires[0] ENDLOOP ENDLOOP ENDLOOP;
RETURN[wire]};
Dag:
PROC [i:
NAT, name:
DP.ROPE]
RETURNS [wire: DP.Wire] = {
leaf: DP.Wire ← CoreOps.CreateWires[0, name];
IF i=1 THEN RETURN[leaf];
wire ← CoreOps.CreateWires[i];
FOR index: NAT IN [0..wire.size) DO wire[index] ← leaf ENDLOOP};
DPMuxSwitch: DP.CIProc={cell←GetSeqCT[cx, "DP.DPMuxSwitch.sch", LIST["ch1", "ch2"]]};
DPPreChg: DP.CIProc={cell←GetSeqCT[cx, "DP.DPPreChg.sch", LIST[ "out"]]};
DPDisChg: DP.CIProc={cell←GetSeqCT[cx, "DP.DPDisChg.sch", LIST["in", "out"]]};
DPBuf: DP.CIProc={cell←GetSeqCT[cx, "DP.DPBuf.sch", LIST["in0", "out0"]]};
DPInv: DP.CIProc={cell←GetSeqCT[cx, "DP.DPInv.sch", LIST["in0", "out0"]]};
DPInvDr: DP.CIProc={cell←GetSeqCT[cx, "DP.DPInvDr.sch", LIST["in0", "out0"]]};
DPTriDr: DP.CIProc={cell←GetSeqCT[cx, "DP.DPTriDr.sch", LIST["in", "out"]]};
DPTriDrInv: DP.CIProc={cell←GetSeqCT[cx, "DP.DPTriDrInv.sch", LIST["in", "out"]]};
DPOr: DP.CIProc={cell←GetSeqCT[cx, "DP.DPOr.sch", LIST["in0", "in1", "out0"]]};
DPNOr: DP.CIProc={cell←GetSeqCT[cx, "DP.DPNOr.sch", LIST["in0", "in1", "out0"]]};
DPAnd: DP.CIProc={cell←GetSeqCT[cx, "DP.DPAnd.sch", LIST["in0", "in1", "out0"]]};
DPNAnd: DP.CIProc={cell←GetSeqCT[cx, "DP.DPNAnd.sch", LIST["in0", "in1", "out0"]]};
DPXOr: DP.CIProc={cell←GetSeqCT[cx, "DP.DPXOr.sch", LIST["in0", "in1", "out0"]]};
DPXNOr: DP.CIProc={cell←GetSeqCT[cx, "DP.DPXNOr.sch", LIST["in0", "in1", "out0"]]};
DPDebugDr: DP.CIProc={cell←GetSeqCT[cx, "DP.DPDebugDr.sch", LIST["in", "out"]]};
DPDebugRec: DP.CIProc={cell←GetSeqCT[cx, "DP.DPDebugRec.sch", LIST["inA", "inRd", "out"]]};
DPMcFF: DP.CIProc={cell←GetSeqCT[cx, "DP.DPMcFF.sch", LIST["in", "out"]]};
DPMcFFCry: DP.CIProc={cell←GetSeqCT[cx, "DP.DPMcFFCry.sch", LIST["in", "out"]]};
DPLatch: DP.CIProc={cell←GetSeqCT[cx, "DP.DPLatch.sch", LIST["in", "out"]]};
DPLatchBlank: DP.CIProc={cell←GetSeqCT[cx, "DP.DPLatchBlank.sch", NIL]};
DPLatchCry: DP.CIProc={cell←GetSeqCT[cx, "DP.DPLatchCry.sch", LIST["in", "out"]]};
DPLatchCtl: DP.CIProc={cell←GetSeqCT[cx, "DP.DPLatchCtl.sch", LIST["in", "out"]]};
DPLatchPreChg:DP.CIProc={cell←GetSeqCT[cx, "DP.DPLatchPreChg.sch",LIST[ "out"]]};
DPLatchBuf: DP.CIProc={cell←GetSeqCT[cx, "DP.DPLatchBuf.sch", LIST["in", "out"]]};
DPLatchInv: DP.CIProc={cell←GetSeqCT[cx, "DP.DPLatchInv.sch", LIST["in", "out"]]};
DPLatchTriDr: DP.CIProc={cell←GetSeqCT[cx, "DP.DPLatchTriDr.sch", LIST["in", "out"]]};
DPLatchAnd: DP.CIProc={cell←GetSeqCT[cx, "DP.DPLatchAnd.sch", LIST["in0", "in1", "out"]]};
DPLatchNAnd: DP.CIProc={cell←GetSeqCT[cx, "DP.DPLatchNAnd.sch", LIST["in0", "in1", "out"]]};
DPLatchOr: DP.CIProc={cell←GetSeqCT[cx, "DP.DPLatchOr.sch", LIST["in0", "in1", "out"]]};
DPLatchNOr: DP.CIProc={cell←GetSeqCT[cx, "DP.DPLatchNOr.sch", LIST["in0", "in1", "out"]]};
DPEdgeFF: DP.CIProc={cell←GetSeqCT[cx, "DP.DPEdgeFF.sch", LIST["D", "Q"]]};
DPTriEdgeFF: DP.CIProc={cell←GetSeqCT[cx, "DP.DPTriEdgeFF.sch", LIST["D", "Q"]]};
DPNOr3: DP.CIProc={cell←GetSeqCT[cx, "DP.DPNOr3.sch", LIST["in0", "in1", "in2", "out0"]]};
DPXOrTop: DP.CIProc={cell←GetSeqCT[cx, "DP.DPXOrTop.sch", LIST["in0", "in1", "out0"]]};
DPXOrBot: DP.CIProc={cell←GetSeqCT[cx, "DP.DPXOrBot.sch", LIST["in0", "in1", "out0"]]};
DPTSLatch: DP.CIProc={cell←GetSeqCT[cx, "DP.DPTSLatch.sch", LIST["D", "Q"]]};
DPSCBuf: DP.CIProc={cell←GetSeqCT[cx, "DP.DPSCBuf.sch", LIST["in0", "out0"]]};
DPSCTriInv: DP.CIProc={cell←GetSeqCT[cx, "DP.DPSCTriInv.sch", LIST["in", "out"]]};
DPAdderGPC0: DP.CIProc = {cell ← GetSeqCT[cx, "DP.DPAdderGPC0.sch", LIST[
"nGL", "nPL", "CL", "nGR", "nPR", "CR", "GM", "PM", "nCM",
"in0", "in1", "in2", "in3", "in4", "in5"]]};
DPAdderGPC1: DP.CIProc = {cell ← GetSeqCT[cx, "DP.DPAdderGPC1.sch", LIST[
"GL", "PL", "nCL", "GR", "PR", "nCR", "nGM", "nPM", "CM",
"in0", "in1", "in2", "in3", "in4", "in5"]]};
DPAdderSum:
DP.CIProc = {cell ← GetSeqCT[cx, "DP.DPAdderSum.sch",
LIST[
"in0", "in1", "out0", "nGM", "nPM", "CM"]]};
DPFullAdder:
DP.CIProc = {cell ← GetSeqCT[cx, "DP.DPFullAdder.sch",
LIST[
"in0", "in1", "sum", "cryIn", "cryOut"]]};
DPFullAdderAlt:
DP.CIProc = {cell ← GetSeqCT[cx, "DP.DPFullAdderAlt.sch",
LIST[
"in0", "in1", "sum", "cryIn", "cryOut"]]};
RegisterWI["DPBus.icon", DPBus];
RegisterWI["DPVddDag.icon", DPVddDag];
RegisterWI["DPGndDag.icon", DPGndDag];
RegisterWI["DPAdderTop.icon", DPAdderTop];
RegisterWI["DPAdderTopCry.icon", DPAdderTopCry];
RegisterWI["DPAdderBot.icon", DPAdderBot];
RegisterWI["DPAdderBotCry.icon", DPAdderBotCry];
RegisterCI["DPMuxSwitch.icon", DPMuxSwitch];
RegisterCI["DPPreChg.icon", DPPreChg];
RegisterCI["DPDisChg.icon", DPDisChg];
RegisterCI["DPBuf.icon", DPBuf];
RegisterCI["DPInv.icon", DPInv];
RegisterCI["DPInvDr.icon", DPInvDr];
RegisterCI["DPTriDr.icon", DPTriDr];
RegisterCI["DPTriDrInv.icon", DPTriDrInv];
RegisterCI["DPOr.icon", DPOr];
RegisterCI["DPNOr.icon", DPNOr];
RegisterCI["DPAnd.icon", DPAnd];
RegisterCI["DPNAnd.icon", DPNAnd];
RegisterCI["DPXOr.icon", DPXOr];
RegisterCI["DPXNOr.icon", DPXNOr];
RegisterCI["DPDebugDr.icon", DPDebugDr];
RegisterCI["DPDebugRec.icon", DPDebugRec];
RegisterCI["DPMcFF.icon", DPMcFF];
RegisterCI["DPMcFFCry.icon", DPMcFFCry];
RegisterCI["DPLatch.icon", DPLatch];
RegisterCI["DPLatchBlank.icon", DPLatchBlank];
RegisterCI["DPLatchCry.icon", DPLatchCry];
RegisterCI["DPLatchCtl.icon", DPLatchCtl];
RegisterCI["DPLatchPreChg.icon", DPLatchPreChg];
RegisterCI["DPLatchBuf.icon", DPLatchBuf];
RegisterCI["DPLatchInv.icon", DPLatchInv];
RegisterCI["DPLatchTriDr.icon", DPLatchTriDr];
RegisterCI["DPLatchAnd.icon", DPLatchAnd];
RegisterCI["DPLatchNAnd.icon", DPLatchNAnd];
RegisterCI["DPLatchOr.icon", DPLatchOr];
RegisterCI["DPLatchNOr.icon", DPLatchNOr];
RegisterCI["DPAdderGPC0.icon", DPAdderGPC0];
RegisterCI["DPAdderGPC1.icon", DPAdderGPC1];
RegisterCI["DPAdderGPC.icon", DPAdderGPC];
RegisterCI["DPAdderSum.icon", DPAdderSum];
RegisterCI["DPFullAdder.icon", DPFullAdder];
RegisterCI["DPFullAdderAlt.icon", DPFullAdderAlt];
RegisterCI["DPEdgeFF.icon", DPEdgeFF];
RegisterCI["DPTriEdgeFF.icon", DPTriEdgeFF];
RegisterCI["DPNOr3.icon", DPNOr3];
RegisterCI["DPXOrTop.icon", DPXOrTop];
RegisterCI["DPXOrBot.icon", DPXOrBot];
RegisterCI["DPTSLatch.icon", DPTSLatch];
RegisterCI["DPSCBuf.icon", DPSCBuf];
RegisterCI["DPSCTriInv.icon", DPSCTriInv];
END.