StixParser.mesa
Copyright © 1985 by Xerox Corporation. All rights reserved.
Created by Louis Monier, October 22, 1985 11:08:27 am PDT
Louis Monier, December 6, 1985 2:27:44 pm PST
DIRECTORY
CD, Stix;
StixParser: CEDAR DEFINITIONS =   
BEGIN OPEN Stix;
Theory
The purpose of the parser is to accept a drawing created interactively using ChipNDale as input for Stix. My first guess is that a simplified "sticks" notation in any MOS-like technology is sufficient, though in the future we might want to accept any MOS design as input, and mix real layout, sticks notation and schematics.
By simplified sticks notation I mean a cell composed of:
- rectangles of minimim width (1l) in whatever reasonnable layer is defined in the technology (things like pol, ndif, wpdif, met, met2, nwelCont and pwelCont). All rectangles intersecting the InterestRect are made public, i.e after compaction a ChipNDale pin will lay on top of the wire, and have appropriate size, layer, and name. Name can be specified by text.
- generic contacts: a cell containing a little black square is all we need. The type of the contact is decided by Stix in accordance to the underlaying wires. If the contact does not exist in the technology, Stix tries its best to make it (going through metal).
- transistors. Nothing but funny little cells shaped like a transistor. They come in n and p flavor. Transistors are really a simple form of iconic cells with pins named "gate", "ch1" and "ch2".
- text used as satellite of other objects to specify certain properties: width and length of contacts, channels, . . . , name of pins, . . .
- in the future, I plan to accept other Sticks cells (hierarchical compaction) and hard cells (MOS cell, maybe in iconic form).
The input cell is handed to Sinix for extraction; the resulting Core.CellType (a RecordCell) decorated with CD geometry is also decorated with StickPtrs. The properties used for the decoration are similar (sometime identical) to the ones defined in Sinix. The StickPtrs are technology-independent, all their dimensions and positions are expressed in "target lambdas" and the layers are simply "Colors", i.e. $pol.
The main goal is to make this representation minimal, since it can also be created by program. Any redundancy will be introduced by StixImpl.
Just for the record: transistors are found as property (instanceProp) of the instances of the RecordCell. Wires, contacts, and transistor pins are property (wireGeometryProp) of the internal wire. The public ones also appear as property (pinsProp) of the public wire.
Symbolic input conventions
stickWidthProp: ATOM; -- wires and transistors
stickLengthProp: ATOM; -- transistors
contactName: ROPE;
nTransistorName: ROPE;
pTransistorName: ROPE;
Procs
-- Parses a simplified CD MOS cell to produce a CellType decorated with StickCells and with the original CD.Instances
InputStix: PROC [cell: Object, from: CD.Design] RETURNS [cellType: CellType];
END.