[Pixel]<Chipndale>6.0>SpinifexT>SXCMosInitImpl.mesa!3

SXCMosInitImpl.mesa

Written by Shand, September 12, 1983 11:40 pm

Last Edited by: Shand, March 13, 1985 1:34:08 pm PST

Last Edited by: Spreitzer, January 14, 1985 9:15:18 pm PST

Bowers, September 13, 1985 10:38:33 am PDT

Last edited by: gbb August 9, 1985 2:44:56 pm PDT

DIRECTORY

CD USING [Instance, lambda, Layer, Number, Position],

CDSimpleRules,

CMos USING [cmos, ndif, pdif, pol, met, met2, nwell, nwellCont, pwellCont, cut, cut2, bur],

Rope USING [ROPE],

SX USING [CellPostProcessProc, Circuit, Constraint, ConstraintArray, ConstraintIndex, CircuitNode, ConstraintResolution, ConversionProc, GeometricRule, MapRec, nodeIndex, NodeLinkage, spaceIndex, SpinifexLayerIndex, TechHandle, BoxMapProc],

SXCMos,

SXCMosBasicRules,

SXOutput USING [LinkagePrintProc, LinkageHousekeeper],

SXOutputPrivate USING [UnNameTransType],

SXTechnology USING [RegisterTechnologyHandle, RegisterSpinifexObjectProcs, ResolutionTable, SetUpResolution],

TerminalIO USING [WriteRope]

;

SXCMosInitImpl: CEDAR PROGRAM

IMPORTS CDSimpleRules, CMos, SXCMos, SXOutputPrivate, SXTechnology, TerminalIO

EXPORTS SXCMos

~ BEGIN

OPEN SXCMos;

Constraint: TYPE ~ SX.Constraint;

l: CD.Number ~ CD.lambda;

-- Constraints

-- n-Diffusion constraints.

ndCnstr: PUBLIC REF ConstraintArray ← NEW[ConstraintArray];

-- PUBLIC ndCh, ndBur.

ndInWel: CIndex ~ ndBur.SUCC; -- n-Diffusion in n-Well

ndWel: CIndex ~ ndInWel.SUCC; -- Exclude n-Diffusion by n-Well

ndCnt: CIndex ~ ndWel.SUCC; -- n-Diffusion contact here.

ndPWct: CIndex ~ ndCnt.SUCC; -- p-Diffusion contact here.

ndPdErr: CIndex ~ ndPWct.SUCC; -- n-Diffusion & p-Diffusion together => Error.

-- p-Diffusion constraints

pdCnstr: PUBLIC REF ConstraintArray ← NEW[ConstraintArray];

-- PUBLIC pdCh.

pdNdErr: CIndex ~ pdCh.SUCC; -- p-Diffusion & n-Diffusion together => Error.

pdCnt: CIndex ~ pdNdErr.SUCC; -- p-Diffusion contact here.

pdNWct: CIndex ~ pdCnt.SUCC; -- n-Diffusion contact here.

-- Poly constraints

polCnstr: PUBLIC REF ConstraintArray ← NEW[ConstraintArray];

-- PUBLIC pExnD, pExpD, pExNdCon, pExPdCon, pChE, pDExcl, pBur, pBurErr, pDxorP, pDandP.

pDErr: CIndex ~ pDandP.SUCC; -- Poly and Diffusion found together => Error.

-- Metal constraints

metCnstr: PUBLIC REF ConstraintArray ← NEW[ConstraintArray];

-- PUBLIC mCut, mVia.

mVC: CIndex ~ mVia.SUCC; -- Via and Cut seperated by less than 2 lambda.

InitRules: PROCEDURE [cMosHandle: REF SX.TechHandle] ~ {

Rule: TYPE ~ SX.GeometricRule;

TrigMap: TYPE ~ PACKED ARRAY CIndex OF BOOLEAN ← ALL[FALSE];

spaceRuleTrig, widthRuleTrig, nDifWidRuleTrig, polOverDifTrig1, polDifSepTrig1, polDifSepTrig2, nDifSpaceTrig1A, nDifSpaceTrig1B, nDifSpaceTrig2, pDifSpaceTrig1A, pDifSpaceTrig1B, pDifSpaceTrig2A, pDifSpaceTrig2B, pDifWidTrig, polSpaceTrig, polWidTrig, nDifSepNWellTrig1, nDifSepNWellTrig2, nDifInWellDifTrig1, nDifAndPDifTrig1, pDifAndNDifTrig1, alwaysErrorTrig2, buriedTrig, nDifChannelTrig, metCutViaSpacing, metCutCutSpacing, metSpacing, metWidth, polDifBuriedExitError: TrigMap; -- ALL[FALSE]

-- Geometric rule triggers.

spaceRuleTrig[SX.nodeIndex] ← TRUE;

widthRuleTrig ← ALL[TRUE];

widthRuleTrig[SX.nodeIndex] ← FALSE;

Corners are defined by union of dif and gate

nDifSpaceTrig1A[SX.nodeIndex] ← TRUE;

nDifSpaceTrig1A[ndCh] ← TRUE;

nDifSpaceTrig1A[ndCnt] ← TRUE;

nDifSpaceTrig1B[ndPWct] ← TRUE;

nDifSpaceTrig2[SX.nodeIndex] ← TRUE;

nDifSpaceTrig2[ndCh] ← FALSE; -- there is no diff at channels

nDifSpaceTrig2[ndCnt] ← TRUE;

nDifSpaceTrig2[ndPWct] ← TRUE;

buriedTrig[ndBur] ← TRUE;

nDifChannelTrig[ndCh] ← TRUE;

nDifWidRuleTrig ← ALL[TRUE];

nDifWidRuleTrig[SX.nodeIndex] ← FALSE;

nDifWidRuleTrig[ndCnt] ← FALSE;

nDifWidRuleTrig[ndCh] ← FALSE;

Corners are defined by union of dif and gate

pDifSpaceTrig1A[SX.nodeIndex] ← TRUE;

pDifSpaceTrig1A[pdCh] ← TRUE;

pDifSpaceTrig1A[pdCnt] ← TRUE;

pDifSpaceTrig2A[SX.nodeIndex] ← TRUE;

pDifSpaceTrig2A[pdCh] ← FALSE; -- there is no diff at channels

pDifSpaceTrig2A[pdCnt] ← TRUE;

pDifSpaceTrig2A[pdNWct] ← TRUE;

pDifSpaceTrig1B[pdNWct] ← TRUE;

pDifSpaceTrig2B[SX.nodeIndex] ← TRUE;

pDifSpaceTrig2B[pdCnt] ← TRUE;

pDifWidTrig ← ALL[TRUE];

pDifWidTrig[SX.nodeIndex] ← FALSE;

pDifWidTrig[pdCnt] ← FALSE;

nDifSepNWellTrig1[SX.nodeIndex] ← TRUE;

nDifSepNWellTrig2[ndWel] ← TRUE;

polSpaceTrig[SX.nodeIndex] ← TRUE;

polSpaceTrig[pDandP] ← TRUE;

polWidTrig ← ALL[TRUE];

polWidTrig[SX.nodeIndex] ← FALSE;

polWidTrig[pDandP] ← FALSE;

polWidTrig[pDErr] ← FALSE;

polDifSepTrig1 [SX.nodeIndex] ← TRUE;

polDifSepTrig1 [pDandP] ← TRUE;

polDifSepTrig2 [pExnD] ← TRUE;

polDifSepTrig2 [pExpD] ← TRUE;

polDifSepTrig2 [pExNdCon] ← TRUE;

polDifSepTrig2 [pExPdCon] ← TRUE;

Metal

metSpacing [SX.nodeIndex] ← TRUE;

metSpacing [mCut] ← TRUE;

metSpacing [mVia] ← TRUE;

metSpacing [mVC] ← TRUE;

metWidth ← ALL[TRUE];

metWidth [SX.nodeIndex] ← FALSE;

metWidth [mCut] ← FALSE;

metWidth [mVia] ← FALSE;

metWidth [mVC] ← FALSE;

Purely local errors are not handled in a natural manner by my scheme, so for every corner we find in polCnstr[pDErr] we generate an error if there is anything on any layer nearby, of course there is always something so we get our error.

polOverDifTrig1 [pDErr] ← TRUE;

nDifInWellDifTrig1 [ndInWel] ← TRUE;

nDifAndPDifTrig1 [ndPdErr] ← TRUE;

pDifAndNDifTrig1 [pdNdErr] ← TRUE;

metCutViaSpacing [mVC] ← TRUE;

metCutCutSpacing [mCut] ← TRUE;

polDifBuriedExitError [pBurErr] ← TRUE;

alwaysErrorTrig2 ← ALL[TRUE];

-- The geometric rules.

cMosHandle.rules [ndifSpinifex] ← LIST[

NEW [Rule ← [message~ "n-Diffusion spacing", extent~ CDSimpleRules.MinDist[CMos.ndif, CMos.ndif], okIfConnected~ TRUE, trigger1~ nDifSpaceTrig1A, trigger2~ nDifSpaceTrig2]],

NEW [Rule ← [message~ "n-Diffusion/unconnected p-substrate-contact spacing", extent~ SXCMosBasicRules.ndifUncSubtrContSpacing, okIfConnected~ TRUE, trigger1~ nDifSpaceTrig1B, trigger2~ nDifSpaceTrig2]],

The above two rules are no longer applied to channels.

NEW [Rule ← [message~ "n-Diffusion width", extent~ CDSimpleRules.MinWidth[CMos.ndif], trigger1~ nDifWidRuleTrig, trigger2~ nDifWidRuleTrig]],

NEW [Rule ← [message~ "n-Diffusion/n-Well spacing", extent~ SXCMosBasicRules.nDifToWell, trigger1~ nDifSepNWellTrig1, trigger2~ nDifSepNWellTrig2]],

NEW [Rule ← [message~ "n-Well/n-Diffusion spacing", extent~ SXCMosBasicRules.nDifToWell, trigger1~ nDifSepNWellTrig2, trigger2~ nDifSepNWellTrig1]],

NEW [Rule ← [message~ "n-Diffusion in n-Well", extent~ SXCMosBasicRules.ndifInnWell, trigger1~ nDifInWellDifTrig1, trigger2~ alwaysErrorTrig2]],

NEW [Rule ← [message~ "n-Diffusion and p-substrate-contact", extent~ SXCMosBasicRules.ndifpSubstrCont, trigger1~ nDifAndPDifTrig1, trigger2~ alwaysErrorTrig2]],

NEW [Rule ← [message~ "channel/buried-contact spacing", extent~ SXCMosBasicRules.ndifChanBurContSpacing, trigger1~ buriedTrig, trigger2~ nDifChannelTrig]],

NEW [Rule ← [message~ "buried-contact/channel spacing", extent~ SXCMosBasicRules.ndifBurContChanSpacing, trigger1~ nDifChannelTrig, trigger2~ buriedTrig]]

];

cMosHandle.rules [pdifSpinifex] ← LIST[

NEW [Rule ← [message~ "p-Diffusion spacing", extent~ CDSimpleRules.MinDist[CMos.pdif, CMos.pdif], okIfConnected~ TRUE, trigger1~ pDifSpaceTrig1A, trigger2~ pDifSpaceTrig2A]],

NEW [Rule ← [message~ "p-Diffusion/unconnected n-Well-contact spacing", extent~ SXCMosBasicRules.pdifUncnWellSpacing, okIfConnected~ TRUE, trigger1~ pDifSpaceTrig1B, trigger2~ pDifSpaceTrig2B]],

NEW [Rule ← [message~ "p-Diffusion width", extent~ CDSimpleRules.MinWidth[CMos.pdif], trigger1~ pDifWidTrig, trigger2~ pDifWidTrig]],

NEW [Rule ← [message~ "p-Diffusion and n-Well-contact", extent~ SXCMosBasicRules.pdifnWellCont, trigger1~ pDifAndNDifTrig1, trigger2~ alwaysErrorTrig2]]

];

cMosHandle.rules [polSpinifex] ← LIST[

NEW [Rule ← [message~ "Poly spacing", extent~ CDSimpleRules.MinDist[CMos.pol, CMos.pol], okIfConnected~ TRUE, trigger1~ polSpaceTrig, trigger2~ polSpaceTrig]],

NEW [Rule ← [message~ "Poly width", extent~ CDSimpleRules.MinWidth[CMos.pol], trigger1~ polWidTrig, trigger2~ polWidTrig]],

NEW [Rule ← [message~ "Poly/unconnected Diffusion spacing", extent~ SXCMosBasicRules.polUncDifSpacing, okIfConnected~ TRUE, trigger1~ polDifSepTrig1, trigger2~ polDifSepTrig2]],

NEW [Rule ← [message~ "Diffusion/unconnected Poly spacing", extent~ SXCMosBasicRules.polDiffUncPolySpacing, okIfConnected~ TRUE, trigger1~ polDifSepTrig2, trigger2~ polDifSepTrig1]],

NEW [Rule ← [message~ "Poly over Diffusion", extent~ SXCMosBasicRules.polOverDiff, trigger1~ polOverDifTrig1, trigger2~ alwaysErrorTrig2]],

NEW [Rule ← [message~ "Insufficient Buried extension over Diffusion", extent~ SXCMosBasicRules.polBuriedExtension, trigger1~ polDifBuriedExitError, trigger2~ alwaysErrorTrig2]]

];

cMosHandle.rules [metSpinifex] ← LIST[

NEW [Rule ← [message~ "Metal spacing", extent~ CDSimpleRules.MinDist[CMos.met, CMos.met], okIfConnected~ TRUE, trigger1~ metSpacing, trigger2~ metSpacing]],

NEW [Rule ← [message~ "Metal width", extent~ CDSimpleRules.MinWidth[CMos.met], trigger1~ metWidth, trigger2~ metWidth]],

NEW [Rule ← [message~ "Cut to Via spacing", extent~ SXCMosBasicRules.metCutViaSpacing, trigger1~ metCutViaSpacing, trigger2~ alwaysErrorTrig2]],

NEW [Rule ← [message~ "Cut to Cut spacing", extent~ SXCMosBasicRules.metCutCutSpacing, trigger1~ metCutCutSpacing, trigger2~ metCutCutSpacing]]

];

cMosHandle.rules [m2Spinifex] ← LIST[

NEW [Rule ← [message~ "Metal 2 spacing", extent~ CDSimpleRules.MinDist[CMos.met2, CMos.met2], okIfConnected~ TRUE, trigger1~ spaceRuleTrig, trigger2~ spaceRuleTrig]],

NEW [Rule ← [message~ "Metal 2 width", extent~ CDSimpleRules.MinWidth[CMos.met2], trigger1~ widthRuleTrig, trigger2~ widthRuleTrig]]

];

};

Init: PROCEDURE ~ {

cMosHandle: REF SX.TechHandle;

ndifResolution: REF SX.ConstraintResolution;

pdifResolution: REF SX.ConstraintResolution;

polyResolution: REF SX.ConstraintResolution;

metalResolution: REF SX.ConstraintResolution;

-- Construction of the Layer Constraints.

Constraint: PUBLIC TYPE ~ RECORD [

name: ATOM,

index: ConstraintIndex, -- index into the constraint array

hasCorrespondingNode: BOOLEAN ← FALSE, -- used where connectivity affects the rule and there is a corresponding layer which has the node associated with this region.

correspondingNodeLayer: SpinifexLayerIndex ← SpinifexLayerIndex.FIRST -- way to attach node values to constraints by looking at other layers.

];

ndCnstr[ndCh] ← NEW [Constraint ← [$NDifChannel, ndCh, TRUE, polSpinifex]];

ndCnstr[ndBur] ← NEW [Constraint ← [$BuriedNDifPol, ndBur]];

ndCnstr[ndInWel] ← NEW [Constraint ← [$NDifInWellError, ndInWel]];

ndCnstr[ndWel] ← NEW [Constraint ← [$ExcludeNDifByWell, ndWel]];

ndCnstr[ndCnt] ← NEW [Constraint ← [$ContactNDif, ndCnt, TRUE, ndifSpinifex]];

ndCnstr[ndPWct] ← NEW [Constraint ← [$ExcludeNDifByPWellCont, ndPWct, TRUE, pdifSpinifex]];

ndCnstr[ndPdErr] ← NEW [Constraint ← [$NDifAndPDifError, ndPdErr]];

pdCnstr[pdCh] ← NEW [Constraint ← [$PDifChannel, pdCh, TRUE, pdifSpinifex]];

pdCnstr[pdNdErr] ← NEW [Constraint ← [$PDifAndNDifError, pdNdErr]];

pdCnstr[pdCnt] ← NEW [Constraint ← [$ContactPDif, pdCnt, TRUE, pdifSpinifex]];

pdCnstr[pdNWct] ← NEW [Constraint ← [$ExcludePDifByNWellCont, pdNWct, TRUE, ndifSpinifex]];

polCnstr[pExnD] ← NEW [Constraint ← [$PolExcludeByNDif, pExnD, TRUE, ndifSpinifex]];

polCnstr[pExpD] ← NEW [Constraint ← [$PolExcludeByPDif, pExpD, TRUE, pdifSpinifex]];

polCnstr[pExNdCon] ← NEW [Constraint ← [$PolExcludeByNDifContact, pExNdCon, TRUE, ndifSpinifex]];

polCnstr[pExPdCon] ← NEW [Constraint ← [$PolExcludeByPDifContact, pExPdCon, TRUE, pdifSpinifex]];

polCnstr[pChE] ← NEW [Constraint ← [$PolChannelEdge, pChE]];

polCnstr[pDxorP] ← NEW [Constraint ← [$PolXorDif, pDxorP]];

polCnstr[pDandP] ← NEW [Constraint ← [$polAndDif, pDandP, TRUE, polSpinifex]];

polCnstr[pDErr] ← NEW [Constraint ← [$PolDifError, pDErr]];

polCnstr[pBur] ← NEW [Constraint ← [$PolBuried, pBur]];

polCnstr[pDExcl] ← NEW [Constraint ← [$PolExcludeNDif, pDExcl]];

polCnstr[pBurErr] ← NEW [Constraint ← [$PolBuriedNDifError, pBurErr]];

metCnstr[mCut] ← NEW [Constraint ← [$MetCut, mCut, TRUE, metSpinifex]];

metCnstr[mVia] ← NEW [Constraint ← [$MetVia, mVia, TRUE, metSpinifex]];

metCnstr[mVC] ← NEW [Constraint ← [$MetViaAndCutError, mVC]];

{

nd: SX.ConstraintIndex ~ SX.nodeIndex;

sp: SX.ConstraintIndex ~ SX.spaceIndex;

ndifResTab: SXTechnology.ResolutionTable ~ [

-- Constraint priority: sp < ndBur < nd < ndCnt < ndCh < ndWel < ndInWel < ndPWct < ndPdErr.

[ sp, nd, ndCh, ndBur, ndInWel, ndWel, ndCnt, ndPWct, ndPdErr, ,,,,,,],

[ nd, nd, ndCh, nd, ndInWel, ndInWel, ndCnt, ndPdErr, ndPdErr, ,,,,,,],

[ ndCh, ndCh, ndCh, ndCh, ndInWel, ndInWel, ndCh, ndPdErr, ndPdErr, ,,,,,,],

[ ndBur, nd, ndCh, ndBur, ndInWel, ndWel, ndCnt, ndPWct, ndPdErr, ,,,,,,],

[ ndInWel, ndInWel, ndInWel, ndInWel, ndInWel, ndInWel, ndCnt, ndPdErr, ndPdErr, ,,,,,,],

[ ndWel, ndInWel, ndInWel, ndWel, ndInWel, ndWel, ndCnt, ndPWct, ndPdErr, ,,,,,,],

[ ndCnt, ndCnt, ndCh, ndCnt, ndCnt, ndCnt, ndCnt, ndPdErr, ndPdErr, ,,,,,,],

[ ndPWct, ndPdErr, ndPdErr, ndPWct, ndPdErr, ndPWct, ndPdErr, ndPWct, ndPdErr, ,,,,,,],

[ ndPdErr, ndPdErr, ndPdErr, ndPdErr, ndPdErr, ndPdErr, ndPdErr, ndPdErr, ndPdErr, ,,,,,,],

,,,,,,

];

pdifResTab: SXTechnology.ResolutionTable ~ [

-- Constraint priority: sp < nd < pdCnt < pdCh < pdNWct < pdNdErr

[ sp, nd, pdCh, pdNdErr, pdCnt, pdNWct, ,,,,,,,,,],

[ nd, nd, pdCh, pdNdErr, pdCnt, pdNdErr, ,,,,,,,,,],

[ pdCh, pdCh, pdCh, pdNdErr, pdCh, pdNdErr, ,,,,,,,,,],

[ pdNdErr, pdNdErr, pdNdErr, pdNdErr, pdNdErr, pdNdErr, ,,,,,,,,,],

[ pdCnt, pdCnt, pdCh, pdNdErr, pdCnt, pdNdErr, ,,,,,,,,,],

[ pdNWct, pdNdErr, pdNdErr, pdNdErr, pdNdErr, pdNWct, ,,,,,,,,,],

,,,,,,,,,

];

polyResTab: SXTechnology.ResolutionTable ~ [

-- Constraint priority: sp < pDxorP < pExnD < pExpD < pChE < pExNdCon < pExPdCon < pDExcl < pBur < nd < pBurErr < pDErr < pDandP

[ sp, nd, pExnD, pExpD, pExNdCon, pExPdCon, pChE, pDExcl, pBur, pBurErr, pDxorP, pDandP, pDErr, ,,],

[ nd, nd, pDErr, pDErr, pDErr, pDErr, pDErr, nd, nd, pDErr, nd, pDandP, pDErr, ,,],

[ pExnD, pDErr, pExnD, pExpD, pExNdCon, pExPdCon, pChE, pBurErr, pBur, pBurErr, pChE, pDandP, pDErr, ,,],

[ pExpD, pDErr, pExpD, pExpD, pExPdCon, pExPdCon, pChE, pBurErr, pBur, pBurErr, pChE, pDandP, pDErr, ,,],

[ pExNdCon, pDErr, pExNdCon, pExPdCon, pExNdCon, pExPdCon, pExNdCon, pBurErr, pBur, pBurErr, pChE, pDandP, pDErr, ,,],

[ pExPdCon, pDErr, pExPdCon, pExPdCon, pExPdCon, pExPdCon, pExPdCon, pBurErr, pBur, pBurErr, pChE, pDandP, pDErr, ,,],

[ pChE, pDErr, pChE, pChE, pExNdCon, pExPdCon, pChE, pBurErr, pBur, pBurErr, pChE, pDandP, pDErr, ,,],

[ pDExcl, nd, pBurErr, pBurErr, pBurErr, pBurErr, pBurErr, pDExcl, pBur, pBurErr, pDExcl, pDandP, pDErr, ,,],

[ pBur, nd, pBur, pBur, pBur, pBur, pBur, pBur, pBur, pBur, pBur, pDandP, pDErr, ,,],

[ pBurErr, pDErr, pBurErr, pBurErr, pBurErr, pBurErr, pBurErr, pBurErr, pBur, pBurErr, pBurErr, pDandP, pDErr, ,,],

[ pDxorP, nd, pChE, pChE, pChE, pChE, pChE, pDExcl, pBur, pBurErr, pDxorP, pDandP, pDErr, ,,],

[ pDandP, pDandP, pDandP, pDandP, pDandP, pDandP, pDandP, pDandP, pDandP, pDandP, pDandP, pDandP, pDandP, ,,],

[ pDErr, pDErr, pDErr, pDErr, pDErr, pDErr, pDErr, pDErr, pDErr, pDErr, pDErr, pDandP, pDErr, ,,],

];

metalResTab: SXTechnology.ResolutionTable ~ [

-- Constraint priority: sp < nd < mCut < mVia < mVC

[ sp, nd, mCut, mVia, mVC, ,,,,,,,,,,],

[ nd, nd, mCut, mVia, mVC, ,,,,,,,,,,],

[ mCut, mCut, mCut, mVC, mVC, ,,,,,,,,,,],

[ mVia, mVia, mVC, mVia, mVC, ,,,,,,,,,,],

[ mVC, mVC, mVC, mVC, mVC, ,,,,,,,,,,],

,,,,,,,,,,

];

ndifResolution ← SXTechnology.SetUpResolution [ndCnstr, ndifResTab];

pdifResolution ← SXTechnology.SetUpResolution [pdCnstr, pdifResTab];

polyResolution ← SXTechnology.SetUpResolution [polCnstr, polyResTab];

metalResolution ← SXTechnology.SetUpResolution [metCnstr, metalResTab];

};

-- Basic cMosHandle & cdLayerMappings.

cMosHandle ← NEW[SX.TechHandle ← [
numSpinifexLayers~ 6,
layerInterestBloat~ [SXCMosBasicRules.nDifLayerSep, (CDSimpleRules.MinDist[CMos.ndif, CMos.ndif]/2), (CDSimpleRules.MinDist[CMos.pol, CMos.pol]/2), (CDSimpleRules.MinDist[CMos.met, CMos.met]/2), (CDSimpleRules.MinDist[CMos.met2, CMos.met2]/2), l,,],
combineNodeProperties~ CopyWellConnections,
cellPostProcess~ CheckWellConnections]
];

cMosHandle.illegalLayer[CMos.nwellCont] ← FALSE;

cMosHandle.illegalLayer[CMos.pwellCont] ← FALSE;

cMosHandle.illegalLayer[CMos.ndif] ← FALSE;

cMosHandle.illegalLayer[CMos.pdif] ← FALSE;

cMosHandle.illegalLayer[CMos.nwell] ← FALSE;

cMosHandle.illegalLayer[CMos.pol] ← FALSE;

cMosHandle.illegalLayer[CMos.met] ← FALSE;

cMosHandle.illegalLayer[CMos.met2] ← FALSE;

cMosHandle.cdLayerMapping[CMos.nwellCont] ← LIST [[ndifSpinifex, (CDSimpleRules.MinDist[CMos.ndif, CMos.ndif]/2)], [wellSpinifex, l, NEW [SX.BoxMapProc ← AttachNWellContact]], [pdifSpinifex, (CDSimpleRules.MinDist[CMos.ndif, CMos.ndif]/2), pdCnstr[pdNWct]], [ndifSpinifex, (CDSimpleRules.MinDist[CMos.ndif, CMos.ndif]/2), ndCnstr[ndCnt]], [polSpinifex, SXCMosBasicRules.difToPolExtSep, polCnstr[pExnD]]]; -- Order Important for well plugging, node is created in first mapping, and used in second.

cMosHandle.cdLayerMapping[CMos.pwellCont] ← LIST [[pdifSpinifex, (CDSimpleRules.MinDist[CMos.ndif, CMos.ndif]/2)], [ndifSpinifex, (CDSimpleRules.MinDist[CMos.ndif, CMos.ndif]/2), ndCnstr[ndPWct]], [pdifSpinifex, (CDSimpleRules.MinDist[CMos.ndif, CMos.ndif]/2), pdCnstr[pdCnt]], [polSpinifex, SXCMosBasicRules.difToPolExtSep, polCnstr[pExpD]]];

cMosHandle.cdLayerMapping[CMos.ndif] ← LIST [[ndifSpinifex, (CDSimpleRules.MinDist[CMos.ndif, CMos.ndif]/2)], [polSpinifex, SXCMosBasicRules.difToPolExtSep, polCnstr[pExnD]]];

cMosHandle.cdLayerMapping[CMos.pdif] ← LIST [[pdifSpinifex, (CDSimpleRules.MinDist[CMos.ndif, CMos.ndif]/2)], [polSpinifex, SXCMosBasicRules.difToPolExtSep, polCnstr[pExpD]]];

cMosHandle.cdLayerMapping[CMos.nwell] ← LIST [[ndifSpinifex, SXCMosBasicRules.nDifToWell-(CDSimpleRules.MinDist[CMos.ndif, CMos.ndif]/2), ndCnstr[ndWel]], [wellSpinifex, l]]; -- INTERIM

cMosHandle.cdLayerMapping[CMos.pol] ← LIST [[polSpinifex, (CDSimpleRules.MinDist[CMos.pol, CMos.pol]/2)]];

cMosHandle.cdLayerMapping[CMos.met] ← LIST [[metSpinifex, (CDSimpleRules.MinDist[CMos.met, CMos.met]/2)]];

cMosHandle.cdLayerMapping[CMos.met2] ← LIST [[m2Spinifex, (CDSimpleRules.MinDist[CMos.met2, CMos.met2]/2)]];

-- Translations for Opaque Cells.

{

conInfl: CD.Number~ lambda; -- Influence distance of contacts.

-- Using value $Opaque ensures we get an error if these are ever used as normal cdLayerMappings.

cMosHandle.cdLayerMapping[CMos.cut] ← LIST [[ndifSpinifex, conInfl, $Opaque], [pdifSpinifex, conInfl, $Opaque], [polSpinifex, conInfl, $Opaque], [metSpinifex, conInfl, $Opaque]];

cMosHandle.cdLayerMapping[CMos.cut2] ← LIST [[metSpinifex, conInfl, $Opaque], [m2Spinifex, conInfl, $Opaque]];

cMosHandle.cdLayerMapping[CMos.bur] ← LIST [[ndifSpinifex, (CDSimpleRules.MinDist[CMos.met2, CMos.met2]/2), $Opaque], [polSpinifex, conInfl, $Opaque]];

};

-- Spinifex Layer Identification.

cMosHandle.spinifexLayerNames[ndifSpinifex].layerId ← $nDiffusion;

cMosHandle.spinifexLayerNames[pdifSpinifex].layerId ← $pDiffusion;

cMosHandle.spinifexLayerNames[polSpinifex].layerId ← $Poly;

cMosHandle.spinifexLayerNames[metSpinifex].layerId ← $Metal;

cMosHandle.spinifexLayerNames[m2Spinifex].layerId ← $Metal2;

cMosHandle.spinifexLayerNames[wellSpinifex].layerId ← $NWell;

-- Thyme stray capacitance layer names.

cMosHandle.spinifexLayerNames[ndifSpinifex].thymeName ← "nD";

cMosHandle.spinifexLayerNames[pdifSpinifex].thymeName ← "pD";

cMosHandle.spinifexLayerNames[polSpinifex].thymeName ← "P";

cMosHandle.spinifexLayerNames[metSpinifex].thymeName ← "M";

cMosHandle.spinifexLayerNames[m2Spinifex].thymeName ← "M2";

-- Set Constraint Resolutions for each layer into the TechHandle.

cMosHandle.constraintResolutions[ndifSpinifex] ← ndifResolution;

cMosHandle.constraintResolutions[pdifSpinifex] ← pdifResolution;

cMosHandle.constraintResolutions[polSpinifex] ← polyResolution;

cMosHandle.constraintResolutions[metSpinifex] ← metalResolution;

-- The geometric rules.

InitRules[cMosHandle];

-- Technology handle is attached to the ChipNDale technology.

SXTechnology.RegisterTechnologyHandle[cdTech~ CMos.cmos, technologyHandle~ cMosHandle];

-- Technology specific objects.

SXTechnology.RegisterSpinifexObjectProcs [cdTech~ CMos.cmos, objectType~ $CMosTransistor, conv~ ConvTransistor, thyme~ ThymeTransistor, rose~ RoseTransistor, core~ MakeCoreTransistor, fini~ SXOutputPrivate.UnNameTransType];

SXTechnology.RegisterSpinifexObjectProcs [cdTech~ CMos.cmos, objectType~ $CMosPTypeTransistor, conv~ ConvTransistor, thyme~ ThymeTransistor, rose~ RoseTransistor, core~ MakeCoreTransistor, fini~ SXOutputPrivate.UnNameTransType];

SXTechnology.RegisterSpinifexObjectProcs [cdTech~ CMos.cmos, objectType~ $CMosATransistor, conv~ ConvTransistor, thyme~ ThymeTransistor, rose~ RoseTransistor, core~ MakeCoreTransistor, fini~ SXOutputPrivate.UnNameTransType];

SXTechnology.RegisterSpinifexObjectProcs [cdTech~ CMos.cmos, objectType~ $CMosPTypeATransistor, conv~ ConvTransistor, thyme~ ThymeTransistor, rose~ RoseTransistor, core~ MakeCoreTransistor, fini~ SXOutputPrivate.UnNameTransType];

SXTechnology.RegisterSpinifexObjectProcs [cdTech~ CMos.cmos, objectType~ $CTrans, conv~ ConvTransistor, thyme~ ThymeTransistor, rose~ RoseTransistor, core~ MakeCoreTransistor, fini~ SXOutputPrivate.UnNameTransType]; -- cd21

SXTechnology.RegisterSpinifexObjectProcs [cdTech~ CMos.cmos, objectType~ $CLTrans, conv~ ConvTransistor, thyme~ ThymeTransistor, rose~ RoseTransistor, core~ MakeCoreTransistor, fini~ SXOutputPrivate.UnNameTransType]; -- cd21

SXTechnology.RegisterSpinifexObjectProcs [cdTech~ CMos.cmos, objectType~ $CWellTrans, conv~ ConvTransistor, thyme~ ThymeTransistor, rose~ RoseTransistor, core~ MakeCoreTransistor, fini~ SXOutputPrivate.UnNameTransType]; -- cd21

SXTechnology.RegisterSpinifexObjectProcs [cdTech~ CMos.cmos, objectType~ $CLWellTrans, conv~ ConvTransistor, thyme~ ThymeTransistor, rose~ RoseTransistor, core~ MakeCoreTransistor, fini~ SXOutputPrivate.UnNameTransType]; -- cd21

SXTechnology.RegisterSpinifexObjectProcs [cdTech~ CMos.cmos, objectType~ $CMosPDifRect, conv~ ConvertPDifRect];

InitContacts[];

SXTechnology.RegisterSpinifexObjectProcs [cdTech~ CMos.cmos, objectType~ $CMosContactDifAndPol, conv~ ConvertContact];

SXTechnology.RegisterSpinifexObjectProcs [cdTech~ CMos.cmos, objectType~ $CMosContactWellDifAndPol, conv~ ConvertContact];

SXTechnology.RegisterSpinifexObjectProcs [cdTech~ CMos.cmos, objectType~ $CMosContactBut, conv~ ConvertContact];

SXTechnology.RegisterSpinifexObjectProcs [cdTech~ CMos.cmos, objectType~ $CMosContactWellBut, conv~ ConvertContact];

SXTechnology.RegisterSpinifexObjectProcs [cdTech~ CMos.cmos, objectType~ $CBurContS, conv~ ConvertBuriedContact];

SXTechnology.RegisterSpinifexObjectProcs [cdTech~ CMos.cmos, objectType~ $CBurContPS, conv~ ConvertBuriedContact];

SXTechnology.RegisterSpinifexObjectProcs [cdTech~ CMos.cmos, objectType~ $CBurContDI, conv~ ConvertBuriedContact];

SXTechnology.RegisterSpinifexObjectProcs [cdTech~ CMos.cmos, objectType~ $CBurContDL, conv~ ConvertBuriedContact];

SXTechnology.RegisterSpinifexObjectProcs [cdTech~ CMos.cmos, objectType~ $CMosWellBurContact, conv~ ConvertContact];

SXTechnology.RegisterSpinifexObjectProcs [cdTech~ CMos.cmos, objectType~ $CMosMmContact, conv~ ConvertContact];

SXTechnology.RegisterSpinifexObjectProcs [cdTech~ CMos.cmos, objectType~ $CMosContactWellDifShort, conv~ ConvertContact];

SXTechnology.RegisterSpinifexObjectProcs [cdTech~ CMos.cmos, objectType~ $CMosContactDifShort, conv~ ConvertContact];

SXTechnology.RegisterSpinifexObjectProcs [cdTech~ CMos.cmos, objectType~ $CSimpleCon, conv~ ConvertContact]; -- cd21

SXTechnology.RegisterSpinifexObjectProcs [cdTech~ CMos.cmos, objectType~ $CWellSimpleCon, conv~ ConvertContact]; -- cd21

SXTechnology.RegisterSpinifexObjectProcs [cdTech~ CMos.cmos, objectType~ $CDifShortCon, conv~ ConvertContact]; -- cd21

SXTechnology.RegisterSpinifexObjectProcs [cdTech~ CMos.cmos, objectType~ $CWellDifShortCon, conv~ ConvertContact]; -- cd21

SXTechnology.RegisterSpinifexObjectProcs [cdTech~ CMos.cmos, objectType~ $CButtingCont, conv~ ConvertContact]; -- cd21

SXTechnology.RegisterSpinifexObjectProcs [cdTech~ CMos.cmos, objectType~ $CWellButtingCont, conv~ ConvertContact]; -- cd21

SXTechnology.RegisterSpinifexObjectProcs [cdTech~ CMos.cmos, objectType~ $CVia, conv~ ConvertContact]; -- cd21

};

Init[];

TerminalIO.WriteRope["cMos technology parameters Loaded\n"];

END.

Edited on February 20, 1985 12:00:53 pm PST, by Shand

Bug in n-Diffusion width rule specification, Added object converters for split contacts (also called DifShort contacts)

changes to: InitRules changed width rule triggers., Init Added object converters

Edited on February 21, 1985 6:19:41 pm PST, by Beretta

changes to: DIRECTORY, Init

Edited on March 7, 1985 1:38:15 am PST, by Shand

Adjust diffusion spacing rules to check diffusion to channel spacing

changes to: InitRules dif spacing rule triggers, Init channel.withNode resolution for conflict detection.

Edited on March 9, 1985 9:35:22 pm PST, by Shand

changes to: Init, DIRECTORY, Constraint, ndCnstr, pdCnstr, polCnstr, InitRules, IMPORTS, InitRules, DIRECTORY

Edited on March 12, 1985 3:16:06 pm PST, by Shand

Now uses registration mechanism of SXTechnology.

changes to: Init, DIRECTORY, IMPORTS, InitRules, polCnstr, InitRules

Edited on March 12, 1985 4:03:10 pm PST, by Shand

Rule extensions to handle Contact rules (DifCon to Poly, PolCon to Gate, Cut to Via)

changes to: metCnstr, InitRules, Init

Edited on March 13, 1985 1:31:13 pm PST, by Shand

Gave an ordering for each set of layer constraints. Added the word unconnected to the messages for rules where it may not be obvious that connectivity affects the checking.

changes to: InitRules, Init

Edited on April 2, 1985 2:57:18 pm PST, by Beretta

Since there is no diffusion in transistor channels, we do not want to test it. Warning: the rule "n-Diffusion/unconnected p-substrate-contact spacing" uses the same trigger.

changes to: InitRules: nDifSpaceTrig2[ndCh] ← pDifSpaceTrig2A[pdCh] ← FALSE

Edited on May 6, 1985 11:26:55 am PDT, by Beretta

Converted to ChipNDale CD20

Last edited by: gbb July 20, 1985 4:05:15 pm PDT

Added the registration of the new contact and transistor types.

gbb August 9, 1985 2:44:09 pm PDT

Added the registration of the transistor output procedure for Core.

changes to: Init