(FILECREATED "18-May-87 10:33:54" ("compiled on " {ERIS}UCODE>TAMARINEMULATOR.;214) "12-Nov-85 14:59:23" tcompl'd in "INTERLISP-D 11-May-86 ..." dated "11-May-86 15:19:08") (FILECREATED "18-May-87 10:32:58" {ERIS}UCODE>TAMARINEMULATOR.;214 62119 changes to: (FNS DoRegMux ClockRdMux DoTest InitEmulator CxtOp LoadIBufByte) (VARS TAMARINEMULATORCOMS VarsList) previous date: "17-Dec-86 16:59:35" {ERIS}UCODE>TAMARINEMULATOR.;209) DoCycle D1 (I 0 log F 0 ClkD35 F 1 Reset F 2 SimLog F 3 #MIR F 4 $MIR F 5 &MIR F 6 oldX F 7 FnCount) @dg c`ccc ldc jc`jd `jd `kj jc`jd `jki `k`kc`Qj`jcH(335Q PrintInstStart 331Q DoPhiClockUOp 325Q DoPhiClockRW 321Q MonitorState 315Q SetSimClocks 305Q DoMemory 275Q MonitorState 271Q SetSimClocks 261Q DoRCMux 255Q ClockD10MemAddr 244Q MonitorState 240Q SetSimClocks 230Q ActOnMem 224Q ClockMemAddr 220Q SetClocks 211Q SetSimClocks 201Q SetClocks 173Q SetSimClocks 163Q DoCombLogicPrecharge 157Q DoPhiPrecharge 153Q ActOnMem 140Q SetClocks 132Q SetSimClocks 122Q SetClocks 114Q CompTransSim 110Q SetSimClocks 100Q ClockClock 74Q DoCombLogic 70Q CycleCheck 64Q CycleSetup 60Q StartDrawClocks 54Q SetClocks 46Q SetupTransSim 10Q OPENFILE) (350Q ResetCycle 345Q Cycles 311Q DoTransSim 265Q DoTransSim 251Q ClkD10 234Q DoTransSim 205Q DoTransSim 167Q DoTransSim 147Q ClkD10 126Q DoTransSim 104Q DoTransSim 42Q DoTransSim 16Q MITYPE# 5 OUTPUT) () SetClocks D1 (I 2 flg I 1 clock I 0 pre F 0 pPre) B @cA(15Q GateClocks 3 MonitorState) (12Q pClock) () GateClocks D1 (P 0 a F 1 pPre F 2 pFirstCy F 3 pSecondCy) ``QH djkkjQ``H djkkj``d```````````````c``c(253Q DoMemory 250Q DoRCMux 77Q Emulator.Error 60Q EvalElt 34Q Emulator.Error 15Q EvalElt) (242Q *SecondCy 237Q pClock 231Q *FirstCy 226Q pClock 223Q pMemWrite 217Q *MemWrite 214Q pClock 211Q pMemRead 205Q *MemRead 202Q pClock 177Q pWrite 173Q *Write 170Q pClock 165Q pRead 161Q *Read 156Q pClock 153Q pOp 147Q *Op 144Q pClock 141Q pMicro&NewOp 135Q $NewOp 132Q pMicro 127Q pMicro&WriteOk 123Q $WriteOk 117Q pMicro 113Q *Micro 110Q pClock 105Q *Pre 51Q pClock 46Q *Pre 42Q *Clock 5 *Clock 2 pClock) () DoCombLogic D1 NIL 5(62Q OpPla 57Q GetUCode 54Q IBufData 51Q DoMemory 46Q DoRCMux 43Q DoVMM 40Q PrepareDecode 35Q SelNextInst 32Q DoCCode3 27Q DoCCode2 24Q DoCCode1 21Q DoIBuf 16Q DoMisc 13Q DecodeRegAddr 10Q DoRegMuxB 5 DoRegMux 2 DoClock) NIL () DoPhiPrecharge D1 NIL (21Q PrechargeWriteSpecial 16Q PrechargeMem 13Q PrechargeEU 10Q PrechargeRegister 5 PrechargeClock 2 PrechargeSync) NIL () DoCombLogicPrecharge D1 NIL (10Q OpPla 5 WriteSpecial 2 DoMemory) NIL () DoPhiClockRW D1 NIL 2(57Q ClockEUW 54Q ClockWriteSpecial 51Q ClockWriteRegister 46Q ClockVMM 43Q ClockMemWrite 40Q NormalCycle 35Q DoRegMuxB 32Q SelNextInst 27Q DoCCode2 24Q DoCCode1 21Q PrepareWrite 16Q CheckCondA 13Q ClockEUR 10Q ClockMemRead 5 ClockReadSpecial 2 ClockReadRegister) NIL () DoPhiClockUOp D1 NIL (24Q ClockClock 21Q ClockSync 16Q ClockMisc 13Q ClockIBuf 10Q ClockSNI 5 ClockRdMux 2 ClockMemAddr) NIL () DoClock D1 (F 12Q @NClockState F 13Q @Op F 14Q @Micro F 15Q @Write-VMM F 16Q @Read F 17Q @MemCycle F 20Q @HoldA F 21Q @DoReset F 22Q @MemDir F 23Q @MemCy F 24Q @CasH) j j `kkl`kmJkl`lmKll`koLkl `koMkl `lmNl`l l_mOllo_HlcHl kcHl kcHl kcHl kHl kHl kHl kcHl lHl kc"Hl kHl kHl kc$Hl kc&Hl kcHl kc Hl kc(_IO HOO(531Q EQP 513Q DoMemory 503Q RSH 470Q RSH 455Q RSH 442Q RSH 427Q RSH 413Q RSH 377Q RSH 364Q RSH 347Q RSH 334Q RSH 320Q RSH 304Q RSH 270Q RSH 255Q RSH 242Q RSH 227Q RSH 152Q RSH) (420Q @SecondCy 404Q @FirstCy 355Q @Quad 325Q @MemWrite 311Q @MemRead 275Q @Write 145Q @ClockState 126Q @ClockState 104Q @Reset 62Q #$Hold 40Q Cycle 20Q @#Fault 6 @#VMRefill) ( 201Q ((1000Q 1000Q 20021Q) (1 1017Q 40Q) (0 3177Q 40122Q) (2 1017Q 100240Q) (40Q 3177Q 4442110Q) (10Q 1617Q 502603Q) (3 1017Q 406604Q) (4 1017Q 412625Q) (5 1017Q 16640Q) (100Q 3177Q 4642111Q) (11Q 1617Q 707106Q) (6 1017Q 613107Q) (7 1017Q 617134Q) (14Q 1017Q 3040Q) (20Q 3177Q 4442132Q) (12Q 1617Q 102640Q) (60Q 3177Q 4642133Q) (13Q 1617Q 103040Q) (410Q 1414Q 1002400Q) (210Q 1614Q 35Q) (15Q 1017Q 40Q) (2000Q 3017Q 2000000Q)) 113Q -1001Q 71Q -2001Q) ClockClock D1 (F 0 *NClockState F 1 *Fault) OkjP````j```j``jhQNIL (114Q @#Fault 102Q *Read 76Q #$NewOp 73Q $NewOp 65Q *Micro 61Q $WriteOk 56Q #WriteOk 52Q $NewOp 47Q #NewOp 41Q *Op 35Q #$Hold 32Q $Hold 26Q @#VMRefill 23Q #VMRefill 17Q @#HoldA 14Q *HoldA 10Q @ClockState) () PrechargeClock D1 (F 0 @NClockState F 1 *NClockState F 2 @HoldA F 3 @Op F 4 @Micro F 5 @Read F 6 @MemDir F 7 @CasH F 10Q @MemCy F 11Q @DoReset F 12Q @Write-VMM F 13Q *Fault) ] kjhVPc`STU`````VWWWRW`cNIL (130Q #Fault 125Q *CasH 120Q *HoldA 114Q *Write-VMM 107Q *DoReset 102Q *MemCy 75Q *MemDir 71Q *SecondCy 66Q @SecondCy 63Q *FirstCy 60Q @FirstCy 55Q *MemWrite 52Q @MemWrite 47Q *MemRead 44Q @MemRead 41Q *Write 36Q @Write 33Q *Read 27Q *Micro 23Q *Op 17Q *Quad 14Q @Quad) () MakeClockPla2 D1 (F 0 ClockPlaSpec) ooo c(16Q MakePlaSpec) NIL ( 13Q ((X X 1 X X X X - 1 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 reset) (0 1 0 X X X X - 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (0 0 0 0 0 X X - 2 1 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0 normal) (0 2 0 X X X X - 0 0 1 0 1 0 0 0 0 0 0 1 0 0 0 0 0) (0 0 0 0 2 X X - 10Q 0 0 1 0 0 0 1 0 0 1 0 0 1 0 0 1 r4) (10Q 0 0 X X 0 0 - 3 0 0 0 1 1 0 1 0 0 0 1 0 1 0 0 0) (0 3 0 X X X X - 4 0 0 0 1 1 0 1 1 0 0 0 0 1 0 0 0) (4 0 0 X X X X - 5 1 0 0 1 1 0 1 2 0 0 0 0 1 0 0 0) (4 1 0 X X X X - 0 0 1 0 1 1 0 1 3 0 0 0 0 0 0 0 0) (0 0 0 0 4 X X - 11Q 0 0 1 0 0 0 1 0 0 1 0 1 1 0 0 1 w4) (10Q 1 0 X X 0 0 - 6 0 0 1 0 0 1 1 1 0 0 1 1 1 0 0 0) (4 2 0 X X X X - 7 0 0 1 0 0 1 1 2 0 0 0 1 1 0 0 0) (4 3 0 X X X X - 14Q 1 0 1 0 0 1 1 3 0 0 0 1 1 0 0 0) (14Q 0 0 X X X X - 0 0 1 0 0 0 1 1 0 0 0 0 0 0 0 0 0) (0 0 0 0 1 X X - 12Q 1 0 1 0 0 0 1 0 0 1 0 0 1 0 0 1 r1) (10Q 2 0 X X 0 0 - 0 0 1 0 1 1 0 1 0 0 0 1 0 0 0 0 0) (0 0 0 0 3 X X - 13Q 1 0 1 0 0 0 1 0 0 1 0 1 1 0 0 1 w1) (10Q 3 0 X X 0 0 - 0 0 1 0 0 0 1 1 0 0 0 1 0 0 0 0 0) (10Q X 0 X X X 1 - 0 0 0 0 0 1 0 1 0 0 0 0 0 0 1 0 0 refill) (10Q X 0 X X 1 0 - 15Q 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 fault1) (14Q 1 0 X X X X - 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 fault2) (0 0 0 1 X X X - 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 hold)) 7 ((@NClockState 0 4 0) (@Op 4 1 0) (@Micro 5 1 0) (@Read 6 1 0) (@Write 7 1 0) (@MemRead 10Q 1 0) (@MemWrite 11Q 1 0) (@MemCycle 12Q 1 0) (@Quad 13Q 2 0) (@DoReset 15Q 1 0) (@FirstCy 16Q 1 0) (@SecondCy 17Q 1 0) (@MemDir 20Q 1 0) (@MemCy 21Q 1 0) (@Write-VMM 22Q 1 0) (@HoldA 23Q 1 0) (@CasH 24Q 1 0)) 3 ((@ClockState 2 2 2) (@ClockState 0 2 0) (@Reset 11Q 1 0) (#$Hold 12Q 1 0) (Cycle 4 3 0) (@#Fault 7 1 0) (@#VMRefill 10Q 1 0))) DoRegMux D1 (F 2 #MIR F 3 #uK) `Rdjmkkl?`Rdjmdkkdlmlll?`k `m `k `m Rc``Hd3jkId3jkd3jk``Hd3jkId3jkd3jk`djRkRlԂdj`dk`dl`dlSdl*`ll`l lHmIlldl`llmdljdljdlmxdl `mdl `bdl `Wdl `Ldl SCdl)`ll`l lHmIlll`llmml?RbdjjEdkSll7dl`,dl`!dl`l`l?l?m?ml`djRkR2lԂdj`lldk`lldl`lldl`lldlSl lludljldljcdljZdl`llIdl `ll8dl `ll'dl `lll Sl llmlRadj`dk`dl`lSmlRdj`dk`dl`lSmlR"ld3jk(1676Q HELP 1607Q HELP 1520Q HELP 1506Q RSH 1325Q RSH 1203Q HELP 1130Q HELP 775Q HELP 724Q RSH 476Q RSH 372Q HELP 174Q CxtOp 161Q CxtOp 147Q CxtOp 134Q CxtOp 116Q HELP 31Q HELP) (1734Q @RdMuxSel 1713Q MI 1707Q #NewBotCxt~ 1664Q #Bot+1Cxt 1651Q #Bot-1Cxt 1637Q #BotCxt 1624Q MI 1620Q #NewTopCxt~ 1575Q #Top-1Cxt 1562Q #Top+1Cxt 1550Q #TopCxt 1535Q MI 1531Q @RegCxt~ 1464Q #BotCxt 1443Q #Top-1Cxt 1422Q #Top+1Cxt 1401Q #TopCxt 1300Q #BotCxt 1256Q #Top-1Cxt 1234Q #Top+1Cxt 1213Q #TopCxt 1171Q MI 1155Q MI 1144Q @Write 1141Q @MuxRdSel~ 1113Q #Tos 1102Q #$Opcode 1067Q #IBufN 1054Q #Arg 1012Q MI 1006Q @RegAddr~ 760Q #$Opcode 717Q #Arg 706Q @Quad 661Q #Tos' 646Q #Arg 633Q #IBufN 620Q #Tos 535Q #$Opcode 471Q #Arg 460Q @Quad 431Q #Arg 415Q #IBufN 402Q #Tos 360Q MI 344Q MI 333Q @Write 330Q #FramesFull 266Q #BotCxt 263Q #Top+1Cxt 260Q #FramesEmpty 216Q #BotCxt 213Q #TopCxt 203Q MI 177Q #Bot-1Cxt 167Q #BotCxt 164Q #Bot+1Cxt 155Q #BotCxt 152Q #Top-1Cxt 142Q #TopCxt 137Q #Top+1Cxt 130Q #TopCxt 125Q #Arg' 47Q MI 43Q #Arg 40Q #Tos' 6 MI 2 #Tos) () CxtOp D1 (L (1 dir 0 cxt)) ,Ak@dlllj@k@djlll@kNIL NIL () DoRegMuxB D1 (F 0 #MIR F 1 #uK) Pdj`\dk`l?l?m?IdlQ@dl`5dl`*dl`llml`l?l?m?mlPdj`.dk`l llldlQl`ml?P2dj`*dk` dlQdl`l`ml?(362Q HELP 260Q HELP 222Q RSH 152Q HELP) (373Q #NewTos~ 356Q D2 346Q #IBufN 322Q #Tos' 310Q #Tos 275Q MI 271Q #NewArg2~ 254Q #Arg 215Q D2 202Q #Arg2 167Q MI 163Q #NewArg~ 135Q #Arg2 113Q #$Opcode 100Q D2 65Q #IBufN 30Q #Arg' 16Q #Arg 3 MI) () ClockRdMux D1 (F 0 $NewArg F 1 $NewArg2 F 2 $NewTos F 3 #Arg=Arg2 F 4 #Arg=0) `mlc`ml?c`ml?c`ml`ml`j,```````dj`jR`jPQ```j`j``jd3jkc``d3jkcNIL (303Q #Arg2 300Q #Arg 261Q #Arg 255Q #$Opcode 252Q $Opcode 244Q $NewOp 236Q *Micro 232Q #BotCxt 227Q $NewBotCxt 223Q #TopCxt 220Q $NewTopCxt 214Q #Arg2 207Q #Arg 177Q *Micro 173Q #Tos 164Q $WriteOk 154Q *Micro 150Q $Opcode 145Q #Opcode 141Q $NewBotCxt~ 136Q #NewBotCxt~ 132Q $NewTopCxt~ 127Q #NewTopCxt~ 123Q $NewTos~ 120Q #NewTos~ 114Q $NewArg2~ 111Q #NewArg2~ 105Q $NewArg~ 102Q #NewArg~ 73Q *Op 70Q $NewBotCxt 57Q $NewBotCxt~ 54Q $NewTopCxt 43Q $NewTopCxt~ 30Q $NewTos~ 15Q $NewArg2~ 2 $NewArg~) () DecodeRegAddr D1 (P 10Q a P 2 raddr0 P 1 OddAddr P 0 BaseAddr F 11Q #MIR F 12Q @RswapFlg F 13Q @WtEven F 14Q @OddWordLines F 15Q @WtOdd F 16Q @EvenWordLines) j `k ll`lmKllmlX`mkZdWpd3jkLd3jkd3jkO djkkjcJjHHdllԇjjHkYWjhd3jkJO djkkjd3jkMd3jkcWjhd3jkJ`d3jkNd3jk_d3jkOd3jkc`j`jHdd3jkld3jkHdhc`j!`jHkHd3jkld3jkIdhch(265Q Emulator.Error 246Q EvalElt 154Q Emulator.Error 135Q EvalElt 11Q RSH) (503Q @Write 474Q @WriteOctal 430Q @Write 421Q @WriteOctal 343Q @WriteOctal 320Q MI 216Q MI 67Q MI 53Q @RegAddr~ 22Q @RegCxt~ 5 @RegAddr~) () ReadRegister D1 (F 0 #MIR F 1 *RswapFlg F 2 EvenRegFile F 3 *EvenWordLines F 4 OddRegFile F 5 *OddWordLines) URS(TU(PjQdj`k`P"jQdj`k`(117Q HELP 54Q HELP) (122Q D2 113Q eDat 104Q oDat 64Q MI 57Q D1 50Q oDat 41Q eDat 21Q MI 15Q oDat 6 eDat) () WriteRegisterA0001 D1 (NAME ERRORSET F 0 SimLog F 1 j F 2 val F 3 MACROY) &oP QP oP R P ci(40Q TERPRI 33Q PrintData 26Q PRIN1 15Q PRIN1 7 PRIN1) NIL ( 22Q " with " 3 "Writing Reg ") WriteRegisterA0002 D1 (NAME ERRORSET F 0 SimLog F 1 j F 2 val F 3 MACROY) &oP QP oP R P ci(40Q TERPRI 33Q PrintData 26Q PRIN1 15Q PRIN1 7 PRIN1) NIL ( 22Q " with " 3 "Writing Reg ") WriteRegister D1 (P 7 RESETSTATE P 6 MACROY P 4 OLDVALUE P 3 i P 1 j P 0 val F 10Q RESETVARSLST F 11Q *EvenWordLines F 12Q *OddWordLines F 13Q SimLog F 14Q STACKFRAMES F 15Q EvenRegFile F 16Q OddRegFile)   `dj`k`X`jWWKdJ`jhWWKdJlhlֹ`BW 1gLhhWcog g_McgM OWKH*WK(Il?H Kk[zlkع`BW 1gLhhWcog g_McgM OWKH*WK(Il?H Kk[*(426Q TS.PUTFRAMEPROP 375Q ERROR! 366Q APPLY 340Q WriteRegisterA0002 304Q OUTPUT 254Q TS.PUTFRAMEPROP 223Q ERROR! 214Q APPLY 166Q WriteRegisterA0001 132Q OUTPUT 30Q HELP) (357Q OUTPUT 344Q ERROR 335Q INTERNAL 312Q OUTPUT 275Q DoSimLog 205Q OUTPUT 172Q ERROR 163Q INTERNAL 140Q OUTPUT 123Q DoSimLog 64Q *WtOdd 34Q *WtEven 24Q D2 15Q D1 5 *MemRead) ( 332Q (WriteRegisterA0002) 160Q (WriteRegisterA0001)) PrechargeRegister D1 (F 0 @EvenWordLines F 1 *EvenWordLines F 2 @OddWordLines F 3 @RswapFlg F 4 *OddWordLines F 5 *RswapFlg F 6 @WtEven F 7 @WtOdd F 10Q *RegAddr) < kjh5ooooPcRcVWSc `cNIL (67Q @RegAddr 61Q *WtOdd 54Q *WtEven 42Q oDat 33Q eDat 24Q D2 15Q D1) ( 37Q 37777777777Q 30Q 37777777777Q 21Q 37777777777Q 12Q 37777777777Q) ClockReadRegister D1 NIL `jh(13Q ReadRegister) (2 *Read) () ClockWriteRegister D1 NIL `jh`jh(24Q WriteRegister) (13Q $WriteOk 2 *Write) () ReadRD1 D1 (F 0 #MIR F 1 #IBufData) =Pdjhdk`dlQl`jh`(72Q HELP) (66Q D1 63Q @Mar 52Q *FirstCy 42Q D1 27Q D1 24Q #PCHiN 3 MI) () ReadRD2 D1 (F 0 #MIR) hP"djhdkdl`dlh dli dlg l`ml(145Q HELP 115Q TamRep 75Q TamRep 57Q TamRep 24Q ReadPc) (141Q D2 130Q @MuxRdSel~ 120Q D2 112Q Unbound 100Q D2 62Q D2 44Q D2 41Q @Tmp1 27Q D2 3 MI) () ReadPc D1 NIL 8`dl kkdj`k`Hd3jkId3jk(37Q HELP 10Q RSH) (33Q #PCHiO 24Q #PCHiE 2 #NCurPc) () ClockReadSpecial D1 NIL `jh(16Q ReadRD2 13Q ReadRD1) (2 *Read) () PrepareWrite D1 NIL &`ll`l ool(23Q RSH) (43Q $XPcHi 16Q D1 13Q $XCurPc 2 D1) ( 34Q 1777777777Q 27Q 1777777777Q) WriteSpecial D1 NIL `ko (12Q Decoder) (2 *W2Addr) ( 7 (none $W2-WriteIBufWord $W2-WriteMarD1 $W2-WriteMarD2 $W2-WritePC $W2-WriteTmpD1 $W2-WriteMarMem)) WriteIBufWord D1 (P 0 reg F 2 SimLog F 3 #OEFlg F 4 IBufReg) i `llSkmIklX`=oR HR oR `R oR `oR R TH`o*h(131Q TERPRI 124Q PRIN1 107Q PRIN1 76Q PRIN1 66Q PRIN1 55Q PRIN1 47Q PRIN1) (137Q D2 113Q D2 72Q D2 35Q DoSimLog 5 *Quad) ( 143Q 37777777777Q 117Q 37777777777Q 103Q " Lnot " 62Q " with " 43Q "Writing IBuf word ") PrechargeWriteSpecial D1 (F 0 #MIR) kjh PRNIL (20Q *W2Addr 12Q MI) () ClockWriteSpecial D1 (P 0 a F 1 $W2-WriteIBufWord F 2 #OEFlg F 3 $W2-WriteMarD1 F 4 $W2-WriteTmpD1 F 5 $W2-WriteMarD2 F 6 $W2-WriteMarMem F 7 $W2-WritePC) `djSj``jTj``jUj``j`jVj``dj Wj```jQj`jQj``djQjRj``j)Qj$RH djkkjj``jh`l kkc(345Q RSH 311Q Emulator.Error 272Q EvalElt 174Q WriteIBufWord) (340Q #PCHiN 327Q *Micro 323Q #PCHiE 320Q $XPcHi 251Q *FirstCy 245Q #PCHiO 242Q $XPcHi 221Q *FirstCy 215Q #PCHiN 212Q $XPcHi 200Q *SecondCy 162Q *Write 156Q #PCHiN 153Q #PCHiO 150Q #PCHiE 145Q $XPcHi 141Q #CurPc 136Q $XCurPc 117Q *Write 113Q @Mar 110Q D2 76Q *SecondCy 67Q *MemRead 63Q @Mar 60Q D2 46Q *FirstCy 42Q @Tmp1 37Q D1 25Q *SecondCy 21Q @Mar 16Q D1 2 *SecondCy) () PrepareDecode D1 NIL `dj`k`l (32Q HELP 26Q RSH) (35Q @VirAddr 21Q #PCHiN 12Q @Mar 2 #$NewOp) () DoVMM D1 (P 11Q a P 1 i P 0 cmpAddr F 12Q VMCmpArray F 13Q VMResArray F 14Q @MemDir) 9 `l ljd3jk`l nXljKJHWK(K iKk[hYdkWI(jm``d3jkLd3jkj``d3jkMd3jk O djkkj``k O djkkjW`k k O djkkjd3jkNd3jk_d3jkOd3jk_d3jkOd3jkh(362Q Emulator.Error 343Q EvalElt 331Q RSH 317Q Emulator.Error 300Q EvalElt 254Q Emulator.Error 235Q EvalElt 173Q HELP 42Q RSH 12Q RSH) (465Q #Fault 325Q @VirData 266Q @VirData 263Q @VirMatch 260Q #VMRefill 202Q @VirMatch 177Q @RealMatch 142Q @VirMatch 137Q @RealMatch 133Q @VirData 125Q @VirMatch 113Q @VirMatch 35Q @VirAddr 32Q @RealMatch 5 @VirAddr) () DoRCMux D1 (P 0 a F 3 vmmRC F 4 vmmRR F 5 vmmVC F 6 vmmVR F 7 vmmMC F 10Q MapConst F 11Q vmmMR F 12Q vmmVRR F 13Q vmmVRC F 14Q @RAddr) < ``H djkkjId3jkJd3jkc``Id3jkJd3jkc``H djkkjId3jkJd3jkc ``Id3jkJd3jkc ``H djkkjId3jkJd3jkc``Id3jkJd3jkcVTId3jkJd3jkcUSId3jkJd3jkcSdjjk`l nnkUdjjLkE`k kk`l lImJlk`l lIoJllWdjjPkI`l kk`l lImJlkWlIoJllon Wdjjk`k kkon Tdjj6k/`l kkl `l lIoJll Vdjj6k/`l kkl `l lIoJll WdjjPkI`l kk`l nIoJnkWl lIoJll Wdjj-k&`kk`l lIoJlkch(1457Q HELP 1427Q RSH 1372Q HELP 1341Q RSH 1304Q RSH 1270Q RSH 1242Q HELP 1211Q RSH 1172Q RSH 1145Q HELP 1114Q RSH 1075Q RSH 1050Q HELP 1027Q RSH 1002Q HELP 714Q RSH 700Q RSH 652Q HELP 621Q RSH 567Q RSH 553Q RSH 527Q HELP 511Q RSH 305Q Emulator.Error 266Q EvalElt 160Q Emulator.Error 141Q EvalElt 33Q Emulator.Error 14Q EvalElt) (1422Q @VirAddr 1413Q @VirAddr 1277Q @VirAddr 1263Q @VirAddr 1204Q @VirData 1165Q @VirData 1107Q @VirAddr 1070Q @VirAddr 1023Q @VirAddr 707Q @VirAddr 673Q @VirAddr 614Q @VirData 562Q @VirData 547Q @VirAddr 504Q @VirAddr 345Q @Ras-Cas~ 342Q #VMRefill 257Q @Ras-Cas~ 254Q #VMRefill 220Q @Ras-Cas~ 215Q @VirMatch 132Q @Ras-Cas~ 127Q @VirMatch 73Q @Ras-Cas~ 70Q @RealMatch 5 @Ras-Cas~ 2 @RealMatch) ( 1442Q -777Q 1354Q -6001Q 1320Q -1777Q 1224Q -6001Q 1127Q -6001Q 1037Q -6001Q 771Q -6001Q 753Q -1741Q 634Q -1401Q) ResetVMM D1 (F 2 VMCmpArray) ljIHRIo*IkYjNIL (34Q @NewVMMPtr) ( 17Q 37777777777Q) Write-VMM D1 (F 0 VMResArray F 1 VMCmpArray) &P``*Q``l n*`k (40Q Mod8 23Q RSH) (43Q @NewVMMPtr 33Q @NewVMMPtr 16Q @VirAddr 13Q @NewVMMPtr 6 D2 3 @NewVMMPtr) () ClockVMM D1 NIL `j`j`jh(33Q Write-VMM 16Q ResetVMM) (22Q *Write-VMM 10Q @Reset-VMM 2 *FirstCy) () ClockMemRead D1 NIL `jh`NIL (16Q D2 13Q *Din 2 *MemRead) () ClockMemWrite D1 (F 0 RD) `jh`cNIL (13Q D2 2 *Read) () DoMemory D1 (P 0 a F 3 *Ras' F 4 *Ras-0~ F 5 ClkD35 F 6 *Ras-1~ F 7 *Ras-2~ F 10Q *Ras-3~ F 11Q *We~ F 12Q pPre) `l k`l k``H djkkjId3jkJd3jkdH djkkjc``H djkkj`H djkkjId3jkJd3jkId3jkJd3jkH djkkjc```H djkkjId3jkJd3jkId3jkJd3jkH djkkjc ``H djkkj`Id3jkJd3jkId3jkJd3jkH djkkjc```Id3jkJd3jkId3jkJd3jkH djkkjc``H djkkjId3jkJd3jkH djkkjc``Id3jkJd3jkW`Id3jkJd3jkU`Id3jkJd3jkId3jkJd3jkH djkkjd(1327Q Emulator.Error 1310Q EvalElt 1120Q Emulator.Error 1101Q EvalElt 1042Q Emulator.Error 1023Q EvalElt 1003Q Emulator.Error 764Q EvalElt 663Q Emulator.Error 644Q EvalElt 553Q Emulator.Error 534Q EvalElt 514Q Emulator.Error 475Q EvalElt 407Q Emulator.Error 370Q EvalElt 345Q Emulator.Error 326Q EvalElt 240Q Emulator.Error 221Q EvalElt 206Q Emulator.Error 167Q EvalElt 147Q Emulator.Error 130Q EvalElt 65Q Emulator.Error 46Q EvalElt 24Q RSH 7 RSH) (1337Q ECAS~ 1333Q CAS~ 1223Q $CasH 1170Q @Cas 1163Q @Cas 1131Q @MemWrite 1126Q @MemRead 1014Q #VMRefill 1011Q *MemDir 677Q RA11 674Q RA10 671Q *Ras 557Q RA11 525Q RA10 522Q *Ras 361Q RA11 356Q RA10 353Q *Ras 212Q RA11 160Q RA10 155Q *Ras 120Q *Ras 37Q #Fault 34Q *MemCy 31Q RA11 17Q @Raddr 14Q RA10 2 @Raddr) () ClockMemAddr D1 (P 0 a F 3 $MemCy~ F 4 *Ras-0~ F 5 *Ras-1~ F 6 *Ras-2~ F 7 *Ras-3~ F 10Q *We~ F 11Q RPADENB~) SjTUVWWkj&`H djkkjc`SjTUVWW`cd`Id3jkJd3jk(100Q Emulator.Error 61Q EvalElt 2 DoMemory) (216Q DPADENB~ 164Q WE~ 156Q @#HoldA 152Q WE~ 144Q RAS-3~ 136Q RAS-2~ 131Q RAS-1~ 124Q RAS-0~ 112Q $CasH 107Q *CasH 52Q *MemCy 41Q WE~ 33Q RAS-3~ 25Q RAS-2~ 20Q RAS-1~ 13Q RAS-0~) () ClockD10MemAddr D1 (F 0 $MemCy~) kjhPNIL (12Q @Ras-Cas~) () ClockD35MemAddr D1 (F 0 *Ras') kjhPNIL (12Q @Ras-Cas~) () PrechargeMem D1 (F 0 RD) kjhPNIL (12Q *Din) () NormalCycle D1 (P 2 TD2 P 1 DD2 P 0 DD1 F 12Q #MIR F 13Q IntPtr) {  `ooX`ooYWdjodl,`dl*`dl<.`ook`l loKlldl=0`k oo`l loLllydl?'`oo`loMllNdl8,`l llWl loNlldl>-`l ool`l_mOldl,/`oo`l l_oOlldl53`k oo`l l_oOlldlHl sdlHI edlHIoki NdlHIoi :dlHl +dl(HI dl.HI l&HI doWadjg 1dk`ll!dl`ol`oh(1163Q HELP 1102Q TamRep 1046Q Emulator.Error 1042Q CombTagD2 1027Q CombTagD2 1011Q CombTagD2 773Q CombTagD2 754Q CombTagD2 730Q CombTagD2 701Q CombTagD2 663Q CombTagD2 617Q RSH 575Q RSH 530Q RSH 432Q RSH 367Q RSH 352Q RSH 234Q RSH 212Q RSH 150Q RSH) (1167Q @V 1152Q D2 1135Q D1 1114Q D2 1077Q Int 1064Q MI 1051Q @V 612Q D1 571Q D1 523Q D2 506Q D1 452Q D2 425Q D1 345Q D1 307Q D2 272Q D1 227Q D1 206Q D1 143Q D1 124Q D1 107Q D2 73Q D1 43Q MI 23Q D2 5 D1) ( 1156Q 30000000000Q 1141Q 30000000000Q 1056Q 7777777777Q 746Q 7777777777Q 720Q 7777777777Q 631Q -34000000001Q 606Q 3777777777Q 601Q 3777777777Q 542Q -30000000001Q 517Q 7777777777Q 512Q 7777777777Q 443Q 77777777Q 436Q 77777777Q 377Q -30000000001Q 317Q -37700000001Q 303Q 77777777Q 276Q 77777777Q 244Q -30000000001Q 223Q 3777777777Q 216Q 3777777777Q 160Q -30000000001Q 135Q 3777777777Q 130Q 3777777777Q 57Q 7777777777Q 34Q 7777777777Q 27Q 7777777777Q 16Q 7777777777Q 11Q 7777777777Q) CombTagD2 D1 (P 4 a P 0 LD2 I 1 inverted I 0 d) A`o`l kA@l k`l kHd3jkId3jkd3jk@l kHd3jkJd3jkd3jk\ djkkjd3jkKd3jk`l k`l k `%`l kd3jkjd3kd3jk@(272Q RSH 254Q EQP 247Q RSH 235Q RSH 177Q Emulator.Error 160Q EvalElt 116Q RSH 52Q RSH 35Q RSH 22Q RSH) (330Q @greaterp 265Q D1 260Q @carry 242Q D2 230Q D1 225Q @overflow 45Q D1 42Q @carry 15Q D2 4 D2) ( 10Q 7777777777Q) PrechargeEU D1 (F 0 *V) kjh`cNIL (11Q @V) () ClockEUR D1 (F 0 *V) `jhPNIL (14Q D1 2 *SecondCy) () ClockEUW D1 (F 0 @@carry F 1 @@greaterp) `jh`c``cNIL (26Q @greaterp 23Q @@overflow 20Q @overflow 13Q @carry 2 *FirstCy) () CheckCondA D1 (F 1 #MIR F 2 CondAArray F 3 @@carry F 4 @@greaterp) RQl(XdgF`H`H`mH`mH``Hj3Qldji!dk`kdlSklTkjd3jkhNIL (226Q #CondA 164Q @@overflow 136Q MI 117Q CondCode 112Q D2 107Q D1 101Q CondCode 72Q D2 64Q CondCode 55Q D1 47Q CondCode 43Q D2 35Q CondCode 31Q D1 23Q condc 7 MI) () MakeCondCodeArray D1 (F 5 CondAArray F 6 CondALst) Al ggj c o U kj2IHUI(K Lh[IkYL&Jc (30Q ARRAYSIZE 24Q MakeCondALst 13Q ARRAY) (7 noop 4 POINTER) ( 21Q ((true condc) (overflow condc) (carry condc) (greaterp condc) (integerp tagD1 Int) (floatp tagD1 Float) (pointerp tagD1 Ptr) (xtypep tagD1 Xtype) (ccodep fulltagD1 Code) (consp fulltagD1 List) (posintegerp tagD1 Int notbitD1 SignBit) (traponexit bitD1 TrapOnExit) (traponreturntod2 bitD2 TrapOnReturnTo) (unbound fulltagD1 Unbound) (ccodep&~nlambdastarp fulltag&flagD1 Code) (flagbitd2 bitD2 Tag) (pointerpd2 tagD2 Ptr) (integerd1d2 tagD1 Int tagD2 Int) (integerpd1&pointerpd2 tagD1 Int tagD2 Ptr) (numberpd1d2 fulltag&flagD1 Number fulltag&flagD2 Number) (d2=int<8&d1=atom tagD2 Int valD2<2:28> 0 fulltagD1 Atm) (d2=int<8&d1=ccodep tagD2 Int valD2<2:28> 0 fulltagD1 Code) (d1=d2 wordEq 37777777777Q) (d1<7x>=d2<7x> wordEq 376Q) (d1<8>=d2<8> wordEq 377Q) (stackp fulltag&flagD1 Stack) (minintd2 D2Eq 4000000000Q))) DoIBuf D1 (P 4 a P 1 selE P 0 selO F 5 #NCurPc<27:29> F 6 IBufReg F 7 #NCurPc<30:31> F 10Q #NCurPc<29:31> F 11Q #IBufWO F 12Q #IBufWE) `@``ldlc`lc`l lc dkXUdkjk YVI(cVH(cj k l l l `l k`l kd3jkJd3jkd3jkL djkkj`ld3jkld3jkd3jkd3jkKd3jkh(266Q Emulator.Error 247Q EvalElt 203Q RSH 171Q RSH 150Q SelectIBufByte 141Q SelectIBufByte 133Q SelectIBufByte 126Q SelectIBufByte 117Q SelectIBufByte 100Q Mod8 53Q RSH) (356Q #ContRefill 272Q #NCurPc 176Q #CurPc 164Q #PCHiN 161Q #IBufSData 122Q #Opcode 46Q #NCurPc 36Q #NCurPc 25Q #NCurPc 16Q #$OpLength 13Q #CurPc 5 &Opcode 2 #Opcode) () SelectIBufByte D1 (P 0 offset I 0 index F 1 #IBufWE F 2 #IBufWO F 3 #NCurPc<29:31>) M@S X`lHQlH RlHl lHQlHl lRlHl l(107Q RSH 70Q RSH 47Q LoadIBufByte 33Q LoadIBufByte 10Q Mod8) (14Q DoIBufSwap) () LoadIBufByte D1 (L (1 Offset 0 IBufWord)) 1@A ljdJIKH`J(jjkJ ԻJkZK(45Q LLSH 4 RSH) (30Q IBufMask) () IBufData D1 NIL O``djj4dkj,dll"dlndlolm`l(77Q HELP) (114Q $IBufN 106Q $IBufSData 103Q $IBufData 5 $OpLength 2 $IBufSData) ( 64Q 77777777Q) ClockIBuf D1 (F 0 $NCurPc F 1 #IBufData) <`j``c`jh `jh``cP`NIL (71Q #$OpLength 66Q $OpLength 63Q #CurPc 55Q $IBufData 52Q #IBufN 47Q $IBufN 36Q $NewOp 25Q *Micro 17Q #NCurPc 13Q $IBufSData 10Q #IBufSData 2 *Op) () ClockSNI D1 (F 0 #MIR F 1 &MIR F 2 $MIR) 4Pc`j```jRc`P#NIL (61Q Cycle 53Q MI 46Q #$uPC 43Q $uPC 31Q *Micro 25Q $OpLength 22Q #OpLength 16Q $uPC 13Q #uPC 5 *Op) () SelNextInst D1 (F 2 #MIR) `jR p`jR a`jW`dj`MkF`d3jkld3jk`d3jkld3jkHd3jkId3jk(174Q HELP) (177Q #uPC 116Q #Opcode 70Q #StartAddr 57Q #StartAddr 47Q #ModStartAddr 40Q #NewOp 30Q MI 21Q #SelNextInstB 11Q MI 2 #SelNextInstA) () OpPla D1 NIL j `kkl`koJkl`koKkl `koLkl `koMkl `koNkl `k_oOkl `k_oOkl`l_mOlYo_0HlHl lHl kHl kh_IO HOO(350Q EQP 324Q RSH 310Q RSH 273Q RSH) (331Q #ForceNewOp 315Q #ModStartAddr 301Q #StartAddr 264Q #OpLength 224Q #Opcode 177Q *DoReset 152Q #Interrupt 130Q #RefillRq 106Q #FramesEmpty 64Q #FramesFull 42Q #$RefCnt 20Q #$Refresh 6 #$StackRefill) ( 250Q ((0 163760Q 4001Q) (20Q 163760Q 4201Q) (40Q 163760Q 4402Q) (60Q 163770Q 4602Q) (70Q 163776Q 4704Q) (72Q 163777Q 3404Q) (73Q 163777Q 3351Q) (74Q 163777Q 3331Q) (75Q 163777Q 1212Q) (76Q 163777Q 1213Q) (77Q 163777Q 3461Q) (100Q 163776Q 5003Q) (102Q 163776Q 3141Q) (104Q 163776Q 3251Q) (106Q 163776Q 3001Q) (110Q 163776Q 141Q) (112Q 163777Q 623Q) (113Q 163777Q 633Q) (114Q 163774Q 5141Q) (120Q 163770Q 3431Q) (130Q 163770Q 1014Q) (140Q 163760Q 3441Q) (160Q 173770Q 3114Q) (10160Q 173770Q 3020Q) (170Q 167776Q 5101Q) (4170Q 167776Q 3200Q) (172Q 167776Q 4722Q) (4172Q 167777Q 1000Q) (4173Q 167777Q 1010Q) (174Q 167777Q 3341Q) (4174Q 167777Q 3200Q) (175Q 173777Q 2751Q) (10175Q 173777Q 3020Q) (176Q 163776Q 3461Q) (200Q 163774Q 3441Q) (204Q 163774Q 1) (210Q 163770Q 3531Q) (220Q 163774Q 5205Q) (4224Q 167776Q 5041Q) (224Q 167776Q 3020Q) (226Q 163776Q 5262Q) (230Q 163770Q 3452Q) (240Q 163760Q 1012Q) (260Q 163770Q 1002Q) (270Q 163770Q 3521Q) (300Q 163774Q 3461Q) (304Q 163774Q 1012Q) (310Q 163770Q 3511Q) (320Q 163760Q 3041Q) (340Q 163760Q 3411Q) (360Q 163777Q 3011Q) (361Q 163777Q 3012Q) (362Q 163777Q 3013Q) (363Q 163777Q 3014Q) (364Q 163777Q 3015Q) (365Q 163777Q 3171Q) (366Q 163776Q 3171Q) (370Q 163770Q 3171Q) (400Q 400Q 403320Q) (40000Q 40400Q 3310Q) (20000Q 70400Q 3260Q) (30000Q 70400Q 3020Q) (100000Q 170400Q 2710Q) (110000Q 170400Q 3020Q) (1000Q 171400Q 3160Q) (11000Q 171400Q 3020Q) (2000Q 163400Q 3210Q)) 210Q -401Q 163Q -1001Q 137Q -2001Q 115Q -4001Q 73Q -10001Q 51Q -20001Q 27Q -40001Q) GetUCode D1 (F 0 UCodeRom F 1 $MIR) P`(cNIL (3 $uPC) () DoCCode1 D1 (F 0 #MIR F 1 #Arg=0 F 2 #Arg=Arg2 F 3 #CondB) 2Pl?dl `dl!`dl"Ql#RjcNIL (35Q @#Fault 22Q #FramesFull 3 MI) () DoCCode2 D1 (P 2 a F 3 #MIR F 4 #ConditionResult F 5 #CondX F 6 #CondB) Sl kdj`kVc Sl kUHd3jkId3jkd3jkJ djkkjcS l kTJ djkkj`Hd3jkId3jkHd3jkId3jkJ djkkjS l kT`Hd3jkId3jkHd3jkId3jkJ djkkj`J djkkj`J djkkjHd3jkId3jkTSJ djkkjHd3jkId3jk(636Q Emulator.Error 617Q EvalElt 545Q Emulator.Error 526Q EvalElt 513Q Emulator.Error 474Q EvalElt 456Q Emulator.Error 437Q EvalElt 344Q RSH 324Q Emulator.Error 305Q EvalElt 214Q Emulator.Error 175Q EvalElt 163Q RSH 144Q Emulator.Error 125Q EvalElt 54Q RSH 36Q HELP 13Q RSH) (671Q #WriteOk 605Q MI 600Q #NewOp 517Q #SelNextInstB 465Q #SelNextInstA 462Q #SelNextInstB 352Q #ForceNewOp 334Q MI 330Q #SelNextInstA 220Q #ForceNewOp 153Q MI 44Q MI 25Q #CondA 3 MI) () DoCCode3 D1 NIL "``Hd3jkId3jkNIL (37Q #RefillRq 5 #ContRefill 2 @InitialRefill) () CheckCondB D1 (F 0 #MIR F 1 #Arg=0 F 2 #Arg=Arg2 F 3 #CondB) $PldjkdlQlRjcNIL (3 MI) () CheckCondC D1 (F 0 #MIR F 1 @@carry F 2 @@greaterp F 3 #CondC) [Pldji?dkQj5dl`jh&dl`jhdl`jlRkjd3jkcNIL (102Q @@overflow 63Q @#Fault 44Q #FramesFull 3 MI) () DoMisc D1 (F 4 #MIR F 5 JustReset F 6 @ResetInitialRefill~ F 7 TS.MAINWINDOW F 10Q @ResetInterrupt F 11Q @ResetRefresh) UT l'U'`lo gWg g c j1T lloZHk kHl kHl kHl kc Hl kHl kHl kHl kHl kHl kHl kHl kHl kcHl kcHl kHl kHl k`VHd3[IK HKJ jkId3jk(463Q EQP 423Q RSH 407Q RSH 373Q RSH 360Q RSH 345Q RSH 331Q RSH 315Q RSH 301Q RSH 265Q RSH 251Q RSH 235Q RSH 221Q RSH 205Q RSH 172Q RSH 156Q RSH 142Q RSH 126Q RSH 57Q TS.MAINMENUSELECTEDFN 51Q GETWINDOWUSERPROP 35Q PRINT) (522Q @InitialRefill 434Q $InitialRefill 430Q @Reset-VMM 414Q @WriteOctal 400Q @OpLength=0 336Q @ResetRefCnt~ 322Q @SetRefCnt~ 306Q @ResetMemLock~ 272Q @SetMemLock~ 256Q @ResetInterruptEnable~ 242Q @SetInterruptEnable~ 226Q @ResetStackRefill~ 212Q @SetStackRefill~ 163Q @SetInitialRefill~ 147Q @ResetOutputInt~ 133Q @SetOutputInt~ 73Q MI 54Q LEFT 46Q DEBUGMENU 41Q Exit 21Q Cycles 3 MI) ( 111Q ((0 37Q 17776Q) (1 37Q 17774Q) (2 37Q 17772Q) (3 37Q 17766Q) (4 37Q 17756Q) (5 37Q 17736Q) (6 37Q 17676Q) (7 37Q 17576Q) (10Q 37Q 17376Q) (11Q 37Q 16776Q) (12Q 37Q 15776Q) (13Q 37Q 13776Q) (14Q 37Q 7776Q) (15Q 37Q 37776Q) (16Q 37Q 57776Q) (17Q 37Q 117776Q) (20Q 37Q 217776Q) (21Q 37Q 417776Q) (22Q 37Q 465262Q) (23Q 37Q 117766Q) (37Q 37Q 17776Q)) 32Q "Emulator stopped") ClockMisc D1 (P 0 a F 1 $OpLength=0 F 2 @ResetInitialRefill~ F 3 $ResetRefresh F 4 $ResetInterrupt F 5 $SetOutputInt~ F 6 $ResetOutputInt~ F 7 $SetInitialRefill~ F 10Q $ResetInterruptEnable~ F 11Q $ResetInitialRefill~ F 12Q @ResetRefresh F 13Q $SetStackRefill~ F 14Q $ResetStackRefill~ F 15Q $SetInterruptEnable~ F 16Q $ResetRefCnt~ F 17Q $SetMemLock~ F 20Q $ResetMemLock~ F 21Q @ResetInterrupt F 22Q $SetRefCnt~) K`jX`c `c `cRc`c`c`c`c`c`c `c$`c`cWcW"c`H djkkjjk`H djkkjjj`H djkkjjkRH djkkjjj`H djkkjjk`H djkkjjj`H djkkjjk`H djkkjjj`H djkkjjk`H djkkjjj`H djkkjjk`H djkkjjj`dj?``````SQT`jh Qjhj(751Q Emulator.Error 732Q EvalElt 707Q Emulator.Error 670Q EvalElt 645Q Emulator.Error 626Q EvalElt 603Q Emulator.Error 564Q EvalElt 541Q Emulator.Error 522Q EvalElt 477Q Emulator.Error 460Q EvalElt 435Q Emulator.Error 416Q EvalElt 373Q Emulator.Error 354Q EvalElt 331Q Emulator.Error 312Q EvalElt 271Q Emulator.Error 252Q EvalElt 227Q Emulator.Error 210Q EvalElt 165Q Emulator.Error 146Q EvalElt) (1110Q #$OpLength 1067Q *Micro 1063Q #$ResetInterrupt 1056Q #OpLength=0 1051Q #$ResetRefresh 1044Q #$RefCnt 1041Q $RefCnt 1035Q #$MemLock 1032Q $MemLock 1026Q #$InterruptEnable 1023Q $InterruptEnable 1017Q #$StackRefill 1014Q $StackRefill 1010Q #$OutputInt 1005Q $OutputInt 1001Q #$StackRefill 776Q $StackRefill 765Q *Micro 761Q $RefCnt 723Q @ResetRefCnt~ 717Q $RefCnt 661Q @SetRefCnt~ 655Q $MemLock 617Q @ResetMemLock~ 613Q $MemLock 555Q @SetMemLock~ 551Q $InterruptEnable 513Q @ResetInterruptEnable~ 507Q $InterruptEnable 451Q @SetInterruptEnable~ 445Q $StackRefill 407Q @ResetStackRefill~ 403Q $StackRefill 345Q @SetStackRefill~ 341Q $InitialRefill 301Q $InitialRefill 243Q @SetInitialRefill~ 237Q $OutputInt 201Q @ResetOutputInt~ 175Q $OutputInt 137Q @SetOutputInt~ 117Q @OpLength=0 111Q @ResetRefCnt~ 103Q @SetRefCnt~ 75Q @ResetMemLock~ 67Q @SetMemLock~ 61Q @ResetInterruptEnable~ 53Q @SetInterruptEnable~ 45Q @ResetStackRefill~ 37Q @SetStackRefill~ 25Q @SetInitialRefill~ 17Q @ResetOutputInt~ 11Q @SetOutputInt~ 2 *Op) () MakeMiscPla D1 (F 0 MiscPlaSpec) ooo c(16Q MakePlaSpec) NIL ( 13Q ((0 - 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0) (1 - 0 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 setoutputint) (2 - 1 0 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 resetoutputint) (3 - 1 1 0 1 1 1 1 1 1 1 1 1 0 0 0 0 0 setinitialrefill) (4 - 1 1 1 0 1 1 1 1 1 1 1 1 0 0 0 0 0 resetinitialrefill) (5 - 1 1 1 1 0 1 1 1 1 1 1 1 0 0 0 0 0 setstackrefill) (6 - 1 1 1 1 1 0 1 1 1 1 1 1 0 0 0 0 0 resetstackrefill) (7 - 1 1 1 1 1 1 0 1 1 1 1 1 0 0 0 0 0 setinterruptenable) (10Q - 1 1 1 1 1 1 1 0 1 1 1 1 0 0 0 0 0 resetinterruptenable) (11Q - 1 1 1 1 1 1 1 1 0 1 1 1 0 0 0 0 0 setmemlock) (12Q - 1 1 1 1 1 1 1 1 1 0 1 1 0 0 0 0 0 resetmemlock) (13Q - 1 1 1 1 1 1 1 1 1 1 0 1 0 0 0 0 0 setrefcnt) (14Q - 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 resetrefcnt) (15Q - 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 resetrefresh) (16Q - 1 1 1 1 1 1 1 1 1 1 1 1 0 1 0 0 0 resetinterrupt) (17Q - 1 1 1 1 1 1 1 1 1 1 1 1 0 0 1 0 0 oplength=0) (20Q - 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 1 0 writeoctal) (21Q - 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 1 reset-vmm) (22Q - 1 0 0 1 1 0 1 0 1 0 1 0 1 1 0 0 1 reset) (23Q - 1 1 0 1 1 1 1 1 1 1 1 1 0 0 1 0 0 oplength=0&setinitialrefill) (37Q - 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 stop)) 7 ((@SetOutputInt~ 1 1 0) (@ResetOutputInt~ 2 1 0) (@SetInitialRefill~ 3 1 0) (@ResetInitialRefill~ 4 1 0) (@SetStackRefill~ 5 1 0) (@ResetStackRefill~ 6 1 0) (@SetInterruptEnable~ 7 1 0) (@ResetInterruptEnable~ 10Q 1 0) (@SetMemLock~ 11Q 1 0) (@ResetMemLock~ 12Q 1 0) (@SetRefCnt~ 13Q 1 0) (@ResetRefCnt~ 14Q 1 0) (@ResetRefresh 15Q 1 0) (@ResetInterrupt 16Q 1 0) (@OpLength=0 17Q 1 0) (@WriteOctal 20Q 1 0) (@Reset-VMM 21Q 1 0)) 3 (((#MIR Misc) 0 5 0))) PrechargeSync D1 (F 0 Reset F 1 pReset F 2 pHold F 3 *SHold) 4kjh-Pc`c`````c`NIL (61Q *#$MemLock 56Q #$MemLock 51Q SHold 46Q pupInterrupt 43Q upInterrupt 40Q pInterrupt 35Q Interrupt 32Q pupRefresh 27Q upRefresh 24Q pRefresh 21Q Refresh 14Q Hold) () ClockSync D1 (P 0 a F 3 #SetRefresh F 4 #SetInterrupt F 5 pReset F 6 pHold F 7 *SHold) #kjUV`j````W`H djkkjId3jkJd3jk``H djkkjId3jkJd3jkc``H djkkjId3jkJd3jkcSjk`jjTjk`jj``Id3jkJd3jk`(270Q Emulator.Error 251Q EvalElt 202Q Emulator.Error 163Q EvalElt 113Q Emulator.Error 74Q EvalElt) (440Q #$Refresh 435Q #Refresh 432Q #Interrupt 400Q #$InterruptEnable 375Q #InterruptLatch 371Q #InterruptLatch 362Q #$ResetInterrupt 356Q #InterruptLatch 345Q #Refresh 336Q #$ResetRefresh 332Q #Refresh 242Q upupInterrupt 237Q upInterrupt 154Q upupRefresh 151Q upRefresh 146Q $Hold 65Q *#$MemLock 57Q upupInterrupt 54Q pupInterrupt 50Q upInterrupt 45Q pInterrupt 41Q upupRefresh 36Q pupRefresh 32Q upRefresh 27Q pRefresh 20Q *Micro 14Q SHold 7 @Reset) () TamRep D1 (I 1 offset I 0 itm) sAjo@dgo[goP@dgoBgo7@ gn )ign @d3g@o (154Q TamTagRep 150Q TamRep 124Q TamRep 106Q TamRep) (137Q Int 116Q Atm 100Q Atm 62Q Tag 46Q TrapOnReturnTo 31Q TrapOnExit 15Q SignBit) ( 144Q 7777777777Q 70Q 100000000Q 55Q 2000000000Q 37Q 4000000000Q 24Q 4000000000Q 7 7777777777Q) TamTagRep D1 (I 1 offset I 0 itm) Aj@dgjtgl@k@dgl_glV@dglJglA@dgl5gl ,@dgl gl @dglgk(200Q Emulator.Error) (171Q Stack 160Q Xtype 145Q Unbound 133Q Number 120Q Frame 106Q Atm 73Q Code 61Q List 46Q Object 34Q Float 21Q Int 10Q Ptr) () DoTestA0001 D1 (NAME ERRORSET) g i(5 DoCycle) (2 {DSK19}SIMLOG) () DoTest D1 NIL oi g o (24Q LISTFILES 15Q CLOSEF 7 DoTestA0001) (12Q {DSK19}SIMLOG) ( 21Q ({DSK19}SIMLOG) 3 (DoTestA0001)) InitEmulator D1 (P 0 i I 0 ReInitial F 4 GLOBALVARS F 5 InitVarLst F 6 @OddWordLines F 7 IntPtr F 10Q @EvenWordLines F 11Q *OddWordLines F 12Q CAS' F 13Q *EvenWordLines F 14Q IBufReg F 15Q SimLog F 16Q MakeTestVectors F 17Q EvenRegFile F 20Q OddRegFile F 21Q BREAKONCYCLE F 22Q MemoryArray F 23Q VMCmpArray F 24Q VMResArray F 25Q sigList F 26Q LastRas' F 27Q BREAKONUMC)  U!dHj HgHT HTcoc coccod lgjd cn@gjd cn@gjd c ngjd c$lgjd c&lgjd c(lgjd ojIRio c*hc.dc"g ckdcdc,dhcnhdc@`JK*JkԺIYh(366Q InitEmulatorWindow 360Q MakeCondCodeArray 355Q ClearMemoryArray 312Q TamRep 274Q COPY 265Q MakeMiscPla 262Q MakeRegMuxSpec 257Q MakeClockPla2 230Q ARRAY 214Q ARRAY 200Q ARRAY 164Q ARRAY 147Q ARRAY 132Q ARRAY 115Q ARRAY 76Q CLDISABLE 30Q MEMB 14Q SET) (374Q IBufMask 347Q DoTransSim 343Q RefreshAfter 332Q LastCas' 320Q RAS' 307Q Int 254Q DoIBufSwap 233Q IBufMask 223Q FIXP 207Q POINTER 173Q POINTER 157Q SMALLP 142Q POINTER 125Q POINTER 110Q POINTER 21Q X) ( 271Q (PHIPRE PHIPRE7 PHICLOCK PHIOP PHIMICRO PHIMICRO&NEWOP PHIFIRSTCY PHISECONDCY +READ +WRITE) 237Q (1 20Q 400Q 10000Q 200000Q 4000000Q 100000000Q 2000000000Q) 70Q (+ - * $ # @ < > :) 60Q (0 0) 50Q (0 0)) ActOnMem D1 (F 2 RasAddr F 3 noCas F 4 RamAddr F 5 @RAddr F 6 sel F 7 cas F 10Q RD) N`j`jUcjc ic`j`jUckc ic`j`jUclc ic`j`jUclc ic`j`j`j`j`j`djSoUcRkkWkHmIkkRk nHoInlWk nHoInl VlHoIllc`jT cTW hcToTklc`````(430Q MemoryAccess 417Q MemoryAccess 325Q RSH 270Q RSH) (513Q LastRas-3~ 510Q RAS-3~ 505Q LastRas-2~ 502Q RAS-2~ 477Q LastRas-1~ 474Q RAS-1~ 471Q LastRas-0~ 466Q RAS-0~ 463Q LastCas~ 460Q CAS~ 410Q WE~ 215Q CAS~ 204Q LastCas~ 173Q RAS-3~ 165Q RAS-2~ 157Q RAS-1~ 150Q RAS-0~ 125Q RAS-3~ 116Q LastRas-3~ 73Q RAS-2~ 64Q LastRas-2~ 42Q RAS-1~ 33Q LastRas-1~ 11Q RAS-0~ 2 LastRas-0~) ( 442Q 7777777774Q 370Q -14000001Q 341Q -3774001Q 304Q -3775Q) (PRETTYCOMPRINT TAMARINEMULATORCOMS) (RPAQQ TAMARINEMULATORCOMS ((* * Top Level - Abbreviations - $ = OP - # = Micro - * = Pre - @ = Clock) (FNS DoCycle SetClocks GateClocks DoCombLogic DoPhiPrecharge DoCombLogicPrecharge DoPhiClockRW DoPhiClockUOp) (* * Clock Pla) (FNS DoClock ClockClock PrechargeClock MakeClockPla2) (* * Register Mux ) (FNS DoRegMux CxtOp DoRegMuxB ClockRdMux) (* * Register Access) (FNS DecodeRegAddr ReadRegister WriteRegister PrechargeRegister ClockReadRegister ClockWriteRegister) (* * Special Register Read Access) (FNS ReadRD1 ReadRD2 ReadPc ClockReadSpecial) (* * Special Register Write Access) (FNS PrepareWrite WriteSpecial WriteIBufWord PrechargeWriteSpecial ClockWriteSpecial) (* * Virtual Memory) (FNS PrepareDecode DoVMM DoRCMux ResetVMM Write-VMM ClockVMM) (* * Memory Access) (FNS ClockMemRead ClockMemWrite DoMemory ClockMemAddr ClockD10MemAddr ClockD35MemAddr PrechargeMem) (* * Execution Units ) (FNS NormalCycle CombTagD2 PrechargeEU ClockEUR ClockEUW) (* * Condition Code in Data Path) (FNS CheckCondA MakeCondCodeArray) (* * Next Opcode Functions) (FNS DoIBuf SelectIBufByte LoadIBufByte IBufData ClockIBuf) (* * Micro Control) (FNS ClockSNI SelNextInst OpPla GetUCode DoCCode1 DoCCode2 DoCCode3 CheckCondB CheckCondC) (* * Misc Actions) (FNS DoMisc ClockMisc MakeMiscPla PrechargeSync ClockSync) (* * Config) (FNS TamRep TamTagRep) (* * INIT) (FNS DoTest InitEmulator ActOnMem) (* * UCode fields) (PROP uField addr label newbotcxt rcxt rd1addr rd2addr wcxt cycle euop tag w2addr dswap raddr waddr newarg newarg2 newtopcxt newtos arg' tos' k condcode muxrdsel cwrite nextinsta nextinstb misc) (* * OpPla Fields) (PROP uField2 forcenewop length modstartaddr opcnt opname opnbr precond start ) (RECORDS MI OpD CondCode) (VARS InitVarLst fulltagmsk tagmsk fulltag&flagmsk VarsList MapConst))) (PUTPROPS addr uField val) (PUTPROPS label uField atom) (PUTPROPS newbotcxt uField ((cur 0) (bot=in 1) (bot=out 2) (k 3))) (PUTPROPS rcxt uField ((cur 0) (next 1) (prev 2) (last 3) (k 4))) (PUTPROPS rd1addr uField ((pcaddr 1) (ibufdata 2) (mar 3))) (PUTPROPS rd2addr uField ((raddr-1 0) (pc 1) (tmp1 2) (nil 3) (t 4) (unbound 5) (muxrdsel 7))) (PUTPROPS wcxt uField ((cur 0) (next 1) (prev 2) (last 3) (k 4))) (PUTPROPS cycle uField ((norm 0) (r1 1) (r4 2) (w1 3) (w4 4))) (PUTPROPS euop uField ((nop 0) (d1 44) (d2 42) (lshft1 60) (rshft1 61) (d2<8>shl24/d1<24> 63) ( d1<8>shr24 56) (d1<24>/d2<8> 62) (d2<2>shl24/d1<30> 44) (arsh1 53) (4 18) (+ 16) (diff2s 21) (diff1s 20) (16 22) (and 40) (or 46) (xor 38))) (PUTPROPS tag uField ((int 0) (d2<8:7> 1) (d1 2) (d2 3))) (PUTPROPS w2addr uField ((nowrite 0) (ibufd2pcd1 1) (mard1 2) (mard2 3) (pcd1 4) (tmp1d1 5) (marmem 6) )) (PUTPROPS dswap uField Flag) (PUTPROPS raddr uField ((tos 0) (ibufn 1) (arg 2) (k 3) (arg<6>/qw<2> 4) (0<4>/opcode<4> 5))) (PUTPROPS waddr uField ((nowrite 0) (tos 1) (ibufn 2) (arg 3) (tos' 4) (k 5) (arg<6>/qw<2> 6) ( 0<4>/opcode<4> 7))) (PUTPROPS newarg uField ((arg 0) (arg' 1) (k 2) (ibufn 3) (d2 4) (0<4>/opcode<4> 5) (arg2 6))) (PUTPROPS newarg2 uField ((arg2 0) (d2<6>/0<2> 1) (k 2) (arg 3))) (PUTPROPS newtopcxt uField ((cur 0) (next 1) (prev 2) (k 3))) (PUTPROPS newtos uField ((tos 0) (tos' 1) (k 2) (ibufn 3) (d2 4))) (PUTPROPS arg' uField ((arg-1 0) (arg+1 1) (arg-4 2) (arg+4 3))) (PUTPROPS tos' uField ((tos-1 0) (tos+1 1))) (PUTPROPS k uField ((0 0) (fx 13) (stkhdr 0) (pc 1) (clink 5) (ivar 8) (ivar-1 7) (pvar 16) ( valuecelloffset 1) (defcelloffset 2) (nextlink 3) (inttypebits (TamTagRep (QUOTE Int))) (symbtypebits (TamTagRep (QUOTE Atm))) (floattypebits (TamTagRep (QUOTE Float))) (ptrtypebits (TamTagRep (QUOTE Ptr) )) (xtypebits (TamTagRep (QUOTE Xtype))) (unboundbits (TamTagRep (QUOTE Unbound))) (ufnbase 256) ( undeffn 257) (pfcode 258) (intcode 259) (frameflagcode 260) (rtmp1 261) (irqcount 262) (decref 263) ( incref 264) (refcountcode 265) (quadwrap 288))) (PUTPROPS condcode uField ((unbound 4) (boundp 68) (stackp 5) (integerp 6) (~integerp 70) (floatp 8) ( ~floatp 72) (xtypep 9) (~xtypep 73) (pointerp 10) (~pointerp 74) (integerd1d2 11) (numberpd1d2 12) ( ~numberpd1d2 76) (consp 13) (~consp 77) (d1=d2 14) (d1#d2 78) (ccodep 16) (d2=int<8&d1=ccodep 17) ( d2=int<8&d1=atom 18) (ccodep&~nlambdastarp 19) (flagbitd2 20) (noflagbitd2 84) (d1<7x>=d2<7x> 21) ( d1<8>=d2<8> 22) (minintd2 24) (~minintd2 88) (pointerpd2 25) (integerpd1&pointerpd2 26) ( traponreturntod2 27) (~traponreturntod2 91) (traponexit 28) (posintegerp 29) (~posintegerp 93) (true 0 ) (overflow 1) (nooverflow 65) (carry 2) (greaterp 3) (notgreaterp 67) (arg=arg2 35) (arg=0 34) (arg#0 98) (nofault 97) (framesfull 32) (framesavail 96))) (PUTPROPS muxrdsel uField ((k 1) (arg 2) (ibufn 3) (opcode 4) (tos 5))) (PUTPROPS cwrite uField Flag) (PUTPROPS nextinsta uField Label) (PUTPROPS nextinstb uField Label) (PUTPROPS misc uField ((setoutputint 1) (resetoutputint 2) (setinitialrefill 3) (resetinitialrefill 4) (setstackrefill 5) (resetstackrefill 6) (setinterruptenable 7) (resetinterruptenable 8) (setmemlock 9 ) (resetmemlock 10) (setrefcount 11) (resetrefcount 12) (resetrefresh 13) (resetinterrupt 14) ( oplength=0 15) (writeoctal 16) (reset-vmm 17) (reset 18) (oplength=0&setinitialrefill 19) (stop 31))) (PUTPROPS forcenewop uField2 Flag) (PUTPROPS length uField2 val) (PUTPROPS modstartaddr uField2 Flag) (PUTPROPS opcnt uField2 val) (PUTPROPS opname uField2 atom) (PUTPROPS opnbr uField2 val) (PUTPROPS precond uField2 ((reset (256 256)) (notreset (0 256)) (interrupt (512 512)) (notinterrupt (0 512)) (refill (1024 1024)) (notrefill (0 1024)) (framesempty (2048 2048)) (notframesempty (0 2048)) ( framesfull (4096 4096)) (notframesfull (0 4096)) (refcount (8192 8192)) (notrefcount (0 8192)) ( refresh (16384 16384)) (notrefresh (0 16384)) (stackrefill (32768 32768)) (notstackrefill (0 32768)))) (PUTPROPS start uField2 Label) (DATATYPE MI ((Addr POINTER) (Ucode POINTER) (Label POINTER) (RCxt BITS 3) (WCxt BITS 3) (NewTopCxt BITS 2) (NewBotCxt BITS 2) (Cycle BITS 4) (EUop BITS 7) (Tag BITS 2) (RD1addr BITS 2) (RD2addr BITS 3) (W2addr BITS 3) (Dswap BITS 1) (Raddr BITS 3) (Waddr BITS 3) (NewArg BITS 3) (NewArg2 BITS 2) (NewTos BITS 3) (MuxRdSel BITS 3) (Tos' BITS 1) (Arg' BITS 2) (K BITS 9) (CondCode BITS 7) (CWrite BITS 1) ( NextInstA BITS 9) (NextInstB BITS 9) (Misc BITS 5))) (DATATYPE OpD ((OpName POINTER) (OpNbr POINTER) (Val BITS 16) (Mask BITS 16) (Start BITS 10) ( ModStartAddr BITS 1) (Length BITS 3) (Precond BITS 3) (NSel BITS 1) (Const BITS 4) (ForceNewOp BITS 1) )) (DATATYPE CondCode ((D1 POINTER) (nD1 POINTER) (D2 POINTER) (nD2 POINTER) (D1xorD2 POINTER))) (/DECLAREDATATYPE (QUOTE MI) (QUOTE (POINTER POINTER POINTER (BITS 3) (BITS 3) (BITS 2) (BITS 2) (BITS 4) (BITS 7) (BITS 2) (BITS 2) (BITS 3) (BITS 3) (BITS 1) (BITS 3) (BITS 3) (BITS 3) (BITS 2) (BITS 3) (BITS 3) (BITS 1) (BITS 2) (BITS 9) (BITS 7) (BITS 1) (BITS 9) (BITS 9) (BITS 5))) (QUOTE ((MI 0 POINTER) (MI 2 POINTER) (MI 4 POINTER) (MI 4 (BITS . 2)) (MI 4 (BITS . 50)) (MI 4 (BITS . 97)) (MI 2 ( BITS . 1)) (MI 2 (BITS . 35)) (MI 0 (BITS . 6)) (MI 2 (BITS . 97)) (MI 6 (BITS . 1)) (MI 6 (BITS . 34) ) (MI 6 (BITS . 82)) (MI 0 (BITS . 112)) (MI 6 (BITS . 130)) (MI 6 (BITS . 178)) (MI 7 (BITS . 2)) (MI 6 (BITS . 225)) (MI 7 (BITS . 50)) (MI 7 (BITS . 98)) (MI 7 (BITS . 144)) (MI 7 (BITS . 161)) (MI 8 ( BITS . 8)) (MI 8 (BITS . 150)) (MI 7 (BITS . 192)) (MI 9 (BITS . 8)) (MI 10 (BITS . 8)) (MI 9 (BITS . 148)))) (QUOTE 12)) (/DECLAREDATATYPE (QUOTE OpD) (QUOTE (POINTER POINTER (BITS 16) (BITS 16) (BITS 10) (BITS 1) (BITS 3) (BITS 3) (BITS 1) (BITS 4) (BITS 1))) (QUOTE ((OpD 0 POINTER) (OpD 2 POINTER) (OpD 4 (BITS . 15)) (OpD 5 (BITS . 15)) (OpD 6 (BITS . 9)) (OpD 2 (BITS . 0)) (OpD 2 (BITS . 18)) (OpD 2 (BITS . 66)) (OpD 2 ( BITS . 112)) (OpD 0 (BITS . 3)) (OpD 0 (BITS . 64)))) (QUOTE 8)) (/DECLAREDATATYPE (QUOTE CondCode) (QUOTE (POINTER POINTER POINTER POINTER POINTER)) (QUOTE ((CondCode 0 POINTER) (CondCode 2 POINTER) (CondCode 4 POINTER) (CondCode 6 POINTER) (CondCode 8 POINTER))) ( QUOTE 10)) (RPAQQ InitVarLst (#$NewOp #$OpLength #$Opcode #$uPC #Arg #Arg2 #Bot+1Cxt #Bot-1Cxt #BotCxt #CCodeA #CCodeB #CCodeC #CurPc #Fault #FramesEmpty #FramesFull #IBufN #IBufSData #InitialRefill #InitialRefill' #Interrupt #Misc-Reset #NCurPc #NewOp #PCHiE #PCHiN #PCHiO #RefCnt #RefillRq #Refresh #StackRefill #Top+1Cxt #Top-1Cxt #TopCxt #Tos #VMMRefill $ConditionResult $ExternalInterrupt $IBufData $IBufN $IBufSData $Misc-DisableInts $Misc-EnableInts $Misc-Reset $NewBotCxt $NewIntEnb $NewTopCxt $OpLength $Opcode $uPC *Din *MemCy *MemDir *MemRead *MemWrite *Micro *Op *Quad *Ras *Read *W2Addr *We *Write *Write *Write-VMM *WtEven *WtOdd @#Fault @#VMRefill @CAS @Cas @ClockState @FirstCy @Mar @MemRead @MemWrite @NewVMMPtr @PhyAddr @Quad @RegAddr @SecondCy @V @VirAddr @Write @carry @greaterp @nocarry @nooverflow @overflow BREAK CAS Cycle D1 D2 Din Hold LastCas' RAS' WE' X eDat lastaddr oDat pClock pMemRead pMemWrite pMicro pOp pRead pWrite s2 s3 s4 #StackRefill $StackRefill @Tmp1 NOBIND DoSimLog DoOpcodeTrace DoEmulatorVars DoEmulatorLog #ContRefill #VMRefill @RegCxt @WriteOctal #NewTopCxt #NewBotCxt #NewArg #NewArg2 #NewTos $TopCxt $Top+1Cxt $Top-1Cxt $BotCxt $Bot+1Cxt $Bot-1Cxt $FramesEmpty $FramesFull $InitialRefill $NewTopCxt~ $NewBotCxt~ $NewArg~ $NewArg2~ $NewTos~ @RegCxt~ @RegAddr~ $XCurPc $XPcHi #$Hold @Reset #$RefCnt #RefCnt #$StackRefill @Resetinterrupt $OutputInt $InterruptEnable~ $MemLock $RefCnt Refresh #Refresh #$Refresh #$ResetRefresh pRefresh upRefresh pupRefresh Interrupt $Interrupt pInterrupt upInterrupt pupInterrupt #InterruptLatch #$InterruptEnable~ #$ResetInterrupt #$MemLock RefreshCount RefreshAfter RefreshEnable Eval DoTransSim @@overflow @RdMuxSel lastclock<>0 DoTransSim ResetCycle CondX Cycles @VirData LastRas-0~ LastRas-1~ RAS-0~ RAS-1~ LastRas-2~ RAS-2~ LastRas-3~ RAS-3~ CAS~ WE~ LastCas~ IBufMask DoIBufSwap #Opcode lastwrd @RealMatch @Ras-Cas~ @VirMatch *CasH #ForceNewOp SHold $#MemLock *#$MemLock upupRefresh upupInterrupt #$InterruptEnable $InterruptEnable RA10 RA11 @Raddr MISC.MISCLOGIC.SYNCS.HOLDFF.#$MEMLOCK~ $MISC.MISCLOGIC.FFS.$INITIALREFILL~ pMicro&WriteOk pMicro&NewOp &Opcode $NewOp $WriteOk *Clock *Pre #Tos' #Arg' #NewArg2~ #NewArg~ #NewTos~ @MuxRdSel~ #NewBotCxt~ #NewTopCxt~ #OpLength #StartAddr #uPC *DoReset @InitialRefill #OpLength=0 #$OutputInt $Hold @Reset-VMM @OpLength=0 @ResetInterruptEnable~ @ResetMemLock~ @ResetOutputInt~ @ResetRefCnt~ @ResetStackRefill~ @SetInitialRefill~ @SetInterruptEnable~ @SetMemLock~ @SetOutputInt~ @SetRefCnt~ @SetStackRefill~ #CondA #ModStartAddr #SelNextInstA #SelNextInstB #WriteOk @INITIALREFILL #CONTREFILL #REFILLRQ $CasH *MemCy~ ClkD10 DPADENB~ ECAS~ *FirstCy *SecondCy *HoldA @#HoldA BreakOnAll D1-0 RE RO PC PHIPRE #$OPLENGTH=0 PHIPRE7 PHICLOCK PHIOP PHIMICRO PHIMICRO&NEWOP PHIFIRSTCY PHISECONDCY +READ +WRITE #UW2ADDR-0 #UW2ADDR-1 #UW2ADDR-2 D1-1 D1-2 D1-3 DATAPATH.RESTOFDP.#NCURPC-0 DATAPATH.RESTOFDP.#NCURPC-1 DATAPATH.RESTOFDP.#NCURPC-2 DATAPATH.RESTOFDP.#NCURPC-3 ClkD35 *NClockState RD $MemCy~)) (RPAQQ fulltagmsk 4261412864) (RPAQQ tagmsk 3221225472) (RPAQQ fulltag&flagmsk 4278190080) (RPAQQ VarsList (Cycles IBufLoads FnCount FrameDumps FrameLoads #TopCxt ErrorCycles ErrorCount RefreshCount RefreshAfter Refreshes)) (RPAQQ MapConst 0) (PUTPROPS TAMARINEMULATOR COPYRIGHT ("Xerox Corporation" 1985 1986 1987)) NIL