(FILECREATED "18-Jul-86 18:15:27" {ERIS}<TAMARIN>UCODE>TAMARINEMULATOR.;158 150707Q
changes to: (FNS DoIBuf ReadRD2 CheckCondA DoCycle)
(PROPS (rd2addr uField))
(VARS InitVarLst)
previous date: "15-Jul-86 12:12:31" {ERIS}<TAMARIN>UCODE>TAMARINEMULATOR.;153)
(* Copyright (c) 1985, 1986 by Xerox Corporation. All rights reserved.)
(PRETTYCOMPRINT TAMARINEMULATORCOMS)
(RPAQQ TAMARINEMULATORCOMS ((FNS)
(* * Top Level - Abbreviations - $ = OP - # = Micro - * = Pre - @ = Clock)
(FNS DoCycle SetClocks GateClocks DoCombLogic DoPhiPrecharge DoCombLogicPrecharge
DoPhiClockRW DoPhiClockUOp)
(* * Clock Pla)
(FNS DoClock ClockClock PrechargeClock MakeClockPla2)
(* * Register Mux)
(FNS DoRegMux DoRegMuxB ClockRdMux)
(* * Register Access)
(FNS DecodeRegAddr ReadRegister WriteRegister PrechargeRegister ClockReadRegister
ClockWriteRegister)
(* * Special Register Read Access)
(FNS ReadRD1 ReadRD2 ReadPc ClockReadSpecial)
(* * Special Register Write Access)
(FNS PrepareWrite WriteSpecial WriteIBufWord PrechargeWriteSpecial ClockWriteSpecial)
(* * Memory Access)
(FNS PrepareDecode DoVMM ResetVMM Write-VMM ClockMemRead ClockMemWrite DoMemory ClockMemAddr
PrechargeMem)
(* * Execution Units)
(FNS NormalCycle CombTagD2 PrechargeEU ClockEUR ClockEUW)
(* * Condition Code in Data Path)
(FNS CheckCondA MakeCondCodeArray)
(* * Next Opcode Functions)
(FNS DoIBuf SelectIBufByte IBufData ClockIBuf)
(* * Micro Control)
(FNS ClockSNI SelNextInst OpPla GetUCode DoCCode1 DoCCode2 CheckCondB CheckCondC)
(* * Misc Actions)
(FNS DoMisc ClockMisc MakeMiscPla PrechargeSync ClockSync)
(* * Config)
(FNS TamRep TamTagRep)
(* * INIT)
(FNS DoTest InitEmulator ActOnMem)
(* * UCode fields)
(PROP uField addr label newbotcxt rcxt rd1addr rd2addr wcxt cycle euop tag w2addr dswap raddr
waddr newarg newarg2 newtopcxt newtos arg' tos' k condcode muxrdsel cwrite nextinsta
nextinstb misc)
(* * OpPla Fields)
(PROP uField2 forcenewop length modstartaddr opcnt opname opnbr precond start)
(RECORDS MI OpD CondCode)
(VARS InitVarLst fulltagmsk tagmsk fulltag&flagmsk VarsList sigList MapConst)))
(* * Top Level - Abbreviations - $ = OP - # = Micro - * = Pre - @ = Clock)
(DEFINEQ
(DoCycle
[LAMBDA (log) (* rtk "15-Jul-86 18:14")
(PROG NIL
(if log
then (SETQ SimLog (OPENFILE log (QUOTE OUTPUT)))
else (SETQ SimLog NIL)) (* SETQ #ClockState 0)
(SETQ #MIR (create MI))
(SETQ $MIR #MIR)
(SETQ oldX 144Q)
(SETQ FnCount 0)
(if DoTransSim
then (SetupTransSim))
(SetClocks 0 0)
(StartDrawClocks)
(CycleSetup)
L1 (CycleCheck)
(DoCombLogic)
(if DoTransSim
then (SetSymClocks))
(SetClocks 0 0)
(if DoTransSim
then (SetSymClocks)
(CompTransSim))
(SetClocks 1 0)
(ActOnMem)
(DoPhiPrecharge)
(DoCombLogicPrecharge)
(if DoTransSim
then (SetSymClocks))
(SetClocks 0 0)
(if DoTransSim
then (SetSymClocks))
(SetClocks 0 1 T)
(DoPhiClockRW)
(DoPhiClockUOp)
(ActOnMem)
(PrintInstStart)
(if (TF Reset)
then (SETQ ResetCycle Cycles))
(SETQ Reset 0)
(GO L1])
(SetClocks
[LAMBDA (pre clock flg) (* rtk " 9-Jul-86 14:35")
(MonitorState flg)
(SETQ pPre pre)
(SETQ pClock clock)
(GateClocks])
(GateClocks
[LAMBDA NIL (* agb: "23-May-86 21:22")
(SETQ pMicro (LOGAND pClock *Micro))
(SETQ pOp (LOGAND pClock *Op))
(SETQ pRead (LOGAND pClock *Read))
(SETQ pWrite (LOGAND pClock *Write))
(SETQ pMemRead (LOGAND pClock *MemRead))
(SETQ pMemWrite (LOGAND pClock *MemWrite))
(SETQ CAS' (LNOT (LAND pPre @Cas])
(DoCombLogic
[LAMBDA NIL (* rtk "15-Jul-86 11:14")
(DoClock)
(DoRegMux)
(DoRegMuxB)
(DecodeRegAddr)
(DoMisc)
(DoIBuf)
(PrepareDecode)
(DoVMM)
(DoMemory) (* These happen after phiMicro)
(IBufData)
(GetUCode)
(DoCCode1])
(DoPhiPrecharge
[LAMBDA NIL (* agb: "12-Jun-86 22:08")
(PrechargeSync)
(PrechargeClock)
(PrechargeRegister)
(PrechargeEU)
(PrechargeMem)
(PrechargeWriteSpecial])
(DoCombLogicPrecharge
[LAMBDA NIL (* rtk " 8-Jul-86 18:08")
(DoMemory)
(WriteSpecial)
(OpPla])
(DoPhiClockRW
[LAMBDA NIL (* rtk "15-Jul-86 11:15")
(ClockReadRegister)
(ClockReadSpecial)
(ClockMemRead)
(ClockEUR)
(CheckCondA)
(PrepareWrite)
(DoCCode2)
(SelNextInst)
(DoRegMuxB)
(NormalCycle)
(ClockMemWrite)
(ClockWriteRegister)
(ClockWriteSpecial)
(ClockEUW])
(DoPhiClockUOp
[LAMBDA NIL (* rtk " 8-Jul-86 18:19")
(ClockMemAddr)
(ClockRdMux)
(ClockSNI)
(ClockIBuf)
(ClockMisc)
(ClockSync)
(ClockClock])
)
(* * Clock Pla)
(DEFINEQ
(DoClock
[LAMBDA NIL (* agb: "23-May-86 21:23")
(EvaluatePLA ClockPlaSpec (QUOTE ClockPla))
(DoMemory])
(ClockClock
[LAMBDA NIL (* agb: " 5-Jul-86 13:36")
(ExecuteClock (QUOTE (((T)
(*NClockState @ClockState)
(#VMRefill @#VMRefill)
(#Fault @#Fault)
($Hold #$Hold))
((*Op)
(#NewOp $NewOp)
(#WriteOk $WriteOk))
((*Micro)
($NewOp #$NewOp])
(PrechargeClock
[LAMBDA NIL (* agb: "23-May-86 21:19")
(ExecuteClock (QUOTE (((T)
(@NClockState *NClockState)
(@Quad *Quad)
(@Op *Op)
(@Micro *Micro)
(@Read *Read)
(@Write *Write)
(@MemRead *MemRead)
(@MemWrite *MemWrite)
(@FirstCy *FirstCy)
(@SecondCy *SecondCy)
(@MemDir *MemDir)
(@MemCy *MemCy)
(@DoReset *DoReset)
(@Write-VMM *Write-VMM])
(MakeClockPla2
[LAMBDA NIL (* rtk "13-Jun-86 08:59")
(SETQ ClockPlaSpec
(MakePlaSpec (QUOTE ((@ClockState 2 2 2)
(@ClockState 0 2 0)
(@Reset 11Q 1 0)
(#$Hold 12Q 1 0)
(Cycle 4 3 0)
(@#Fault 7 1 0)
(@#VMRefill 10Q 1 0)))
(QUOTE ((@NClockState 0 4 0)
(@Op 4 1 0)
(@Micro 5 1 0)
(@Read 6 1 0)
(@Write 7 1 0)
(@MemRead 10Q 1 0)
(@MemWrite 11Q 1 0)
(@MemCycle 12Q 1 0)
(@Quad 13Q 2 0)
(@DoReset 15Q 1 0)
(@FirstCy 16Q 1 0)
(@SecondCy 17Q 1 0)
(@MemDir 20Q 1 0)
(@MemCy 21Q 1 0)
(@Write-VMM 22Q 1 0)
(@HoldA 23Q 1 0)))
(QUOTE ((X X 1 X X X X - 1 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 reset)
(0 1 0 X X X X - 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0)
(0 0 0 0 0 X X - 2 1 0 1 0 0 0 0 0 0 1 0 0 0 0 0 normal)
(0 2 0 X X X X - 0 0 1 0 1 0 0 0 0 0 0 1 0 0 0 0)
(0 0 0 0 2 X X - 10Q 0 0 1 0 0 0 1 0 0 1 0 0 1 0 0 r4)
(10Q 0 0 X X 0 0 - 3 0 0 0 1 1 0 1 0 0 0 1 0 1 0 0)
(0 3 0 X X X X - 4 0 0 0 1 1 0 1 1 0 0 0 0 1 0 0)
(4 0 0 X X X X - 5 1 0 0 1 1 0 1 2 0 0 0 0 1 0 0)
(4 1 0 X X X X - 0 0 1 0 1 1 0 1 3 0 0 0 0 0 0 0)
(0 0 0 0 4 X X - 11Q 0 0 1 0 0 0 1 0 0 0 0 1 1 0 0 w4)
(10Q 1 0 X X 0 0 - 6 0 0 1 0 0 1 1 1 0 0 1 1 1 0 0)
(4 2 0 X X X X - 7 0 0 1 0 0 1 1 2 0 0 0 1 1 0 0)
(4 3 0 X X X X - 14Q 1 0 1 0 0 1 1 3 0 0 0 1 1 0 0)
(14Q 0 0 X X X X - 0 0 1 0 0 0 1 1 0 0 0 0 0 0 0 0)
(0 0 0 0 1 X X - 12Q 1 0 1 0 0 0 1 0 0 0 0 0 1 0 0 r1)
(10Q 2 0 X X 0 0 - 0 0 1 0 1 1 0 1 0 0 0 1 0 0 0 0)
(0 0 0 0 3 X X - 13Q 1 0 1 0 0 0 1 0 0 0 0 1 1 0 0 w1)
(10Q 3 0 X X 0 0 - 0 0 1 0 0 0 1 1 0 0 0 1 0 0 0 0)
(10Q X 0 X X X 1 - 0 0 0 0 0 1 0 1 0 0 0 0 0 0 1 0 refill)
(10Q X 0 X X 1 0 - 15Q 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 fault1)
(14Q 1 0 X X X X - 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 fault2)
(0 0 0 1 X X X - 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 hold])
)
(* * Register Mux)
(DEFINEQ
(DoRegMux
[LAMBDA NIL (* rtk " 8-Jul-86 17:33")
[SETQ #Tos' (LOGAND 77Q (PLUS #Tos (Mux-1 (fetch (MI Tos') of #MIR)
-1 1]
[SETQ #Arg' (LOGAND 77Q (PLUS #Arg (Mux-2 (fetch (MI Arg') of #MIR)
-1 1 -4 4]
(SETQ #Top+1Cxt (LOGAND 3 (PLUS 1 #TopCxt)))
(SETQ #Top-1Cxt (LOGAND 3 (PLUS -1 #TopCxt)))
(SETQ #Bot+1Cxt (LOGAND 3 (PLUS 1 #BotCxt)))
(SETQ #Bot-1Cxt (LOGAND 3 (PLUS -1 #BotCxt)))
(SETQ #uK (fetch (MI K) of #MIR))
(SETQ #FramesEmpty (LEQV #TopCxt #BotCxt))
(SETQ #FramesFull (LEQV (LOGAND 3 (ADD1 #TopCxt))
#BotCxt))
[RegMux (QUOTE @RegAddr~)
(QUOTE (Mux-1 @Write (fetch (MI Raddr) of #MIR)
(PLUS 10Q (fetch (MI Waddr) of #MIR]
(RegMux (QUOTE @MuxRdSel~)
(QUOTE (fetch (MI MuxRdSel)
of #MIR)))
[RegMux (QUOTE @RegCxt~)
(QUOTE (Mux-1 @Write (fetch (MI RCxt) of #MIR)
(PLUS 10Q (fetch (MI WCxt) of #MIR]
(RegMux (QUOTE #NewTopCxt~)
(QUOTE (fetch (MI NewTopCxt)
of #MIR)))
(RegMux (QUOTE #NewBotCxt~)
(QUOTE (fetch (MI NewBotCxt)
of #MIR)))
(SETQ @RdMuxSel (OZ (EQ (fetch (MI RD2addr) of #MIR)
7])
(DoRegMuxB
[LAMBDA NIL (* agb: "10-Jun-86 19:12")
(RegMux (QUOTE #NewArg~)
(QUOTE (fetch (MI NewArg)
of #MIR)))
(RegMux (QUOTE #NewArg2~)
(QUOTE (fetch (MI NewArg2)
of #MIR)))
(RegMux (QUOTE #NewTos~)
(QUOTE (fetch (MI NewTos)
of #MIR])
(ClockRdMux
[LAMBDA NIL (* agb: " 5-Jul-86 13:30")
(SETQ $NewArg (LOGAND 255 (LOGNOT $NewArg~)))
(SETQ $NewArg2 (LOGAND 63 (LOGNOT $NewArg2~)))
(SETQ $NewTos (LOGAND 63 (LOGNOT $NewTos~)))
(SETQ $NewTopCxt (LOGAND 3 (LOGNOT $NewTopCxt~)))
(SETQ $NewBotCxt (LOGAND 3 (LOGNOT $NewBotCxt~)))
[ExecuteClock (QUOTE (((*Op)
(#NewArg~ $NewArg~)
(#NewArg2~ $NewArg2~)
(#NewTos~ $NewTos~)
(#NewTopCxt~ $NewTopCxt~)
(#NewBotCxt~ $NewBotCxt~)
(#Opcode $Opcode))
((*Micro $WriteOk)
($NewTos #Tos))
((*Micro)
($NewArg #Arg)
($NewArg2 #Arg2)
($NewTopCxt #TopCxt)
($NewBotCxt #BotCxt))
((*Micro $NewOp)
($Opcode #$Opcode]
(SETQ #Arg=0 (OZ (EQ #Arg 0)))
(SETQ #Arg=Arg2 (OZ (EQ #Arg #Arg2])
)
(* * Register Access)
(DEFINEQ
(DecodeRegAddr
[LAMBDA NIL (* rtk "12-Jun-86 12:32")
(PROG (BaseAddr OddAddr raddr0) (* PRINTOUT T "CXT,ADDR= " @RegCxt~ , @RegAddr~ T)
[SETQ BaseAddr (LOGAND 255 (LOGNOT (ConcatBits (QUOTE ((@RegCxt~ 5 3 0)
(@RegAddr~ 0 5 1]
(SETQ raddr0 (LOGAND 1 (LOGNOT @RegAddr~)))
(* PRINTOUT T "BaseAddr= " BaseAddr , raddr0 T)
(* if (NEQ 7 @RegCxt~) then
(BREAK1 NIL T (DecodeRegAddr) NIL))
[SETQ @RswapFlg (LNOT (LEQV raddr0 (fetch (MI Dswap) of #MIR]
(SETQ OddAddr (if (TF raddr0)
then BaseAddr
elseif (EQ BaseAddr 144)
then (PLUS BaseAddr 3)
elseif (EQ BaseAddr 0)
then 0
else (SUB1 BaseAddr)))
(SETQ @WtEven (LAND (OZ (NEQ 0 (fetch (MI Waddr) of #MIR)))
(LNOT raddr0)))
(SETQ @WtOdd (LAND (OZ (NEQ 0 (fetch (MI Waddr) of #MIR)))
(LOR raddr0 @WriteOctal)))
(SETQ @EvenWordLines (if (TF @WriteOctal)
then (LIST BaseAddr (LOR BaseAddr 3))
else (LIST BaseAddr BaseAddr)))
(SETQ @OddWordLines (if (TF @WriteOctal)
then (LIST BaseAddr (LOR BaseAddr 3))
else (LIST OddAddr OddAddr])
(ReadRegister
[LAMBDA NIL (* agb: "18-May-86 21:26")
(SETQ eDat (ELT EvenRegFile (CAR *EvenWordLines)))
(SETQ oDat (ELT OddRegFile (CAR *OddWordLines)))
(if (EQ 0 (fetch (MI RD1addr) of #MIR))
then (SETQ D1 (Mux-1 *RswapFlg eDat oDat)))
(if (EQ 0 (fetch (MI RD2addr) of #MIR))
then (SETQ D2 (Mux-1 *RswapFlg oDat eDat])
(WriteRegister
[LAMBDA NIL (* rtk " 2-Jun-86 11:20")
(PROG (val j)
(SETQ val (Mux-1 *MemRead D1 D2))
(if (TF *WtEven)
then (for i from (CAR *EvenWordLines) to (CADR *EvenWordLines)
do (SETQ j (TIMES 2 i))
(if DoSimLog
then (PRINTOUT SimLog "Writing Reg " j " with " # (PrintData
val)
T))
(SETA EvenRegFile i val)
(TS.PUTFRAMEPROP (ELT STACKFRAMES (LRSH i 5))
(LOGAND 77Q j)
val)))
(if (TF *WtOdd)
then (for i from (CAR *OddWordLines) to (CADR *OddWordLines)
do (SETQ j (ADD1 (TIMES i 2)))
(if DoSimLog
then (PRINTOUT SimLog "Writing Reg " j " with " # (PrintData
val)
T))
(SETA OddRegFile i val)
(TS.PUTFRAMEPROP (ELT STACKFRAMES (LRSH i 5))
(LOGAND 77Q j)
val])
(PrechargeRegister
[LAMBDA NIL (* agb: "23-May-86 21:30")
(ExecuteClock (QUOTE (((T)
(4294967295 D1)
(4294967295 D2)
(@EvenWordLines *EvenWordLines)
(@OddWordLines *OddWordLines)
(@WtEven *WtEven)
(@WtOdd *WtOdd)
(@RswapFlg *RswapFlg)
(@RegAddr *RegAddr])
(ClockReadRegister
[LAMBDA NIL (* agb: "18-May-86 13:17")
(ExecuteClock (QUOTE (((*Read)
((Eval (ReadRegister])
(ClockWriteRegister
[LAMBDA NIL (* agb: "17-May-86 11:06")
(ExecuteClock (QUOTE (((*Write $WriteOk)
((Eval (WriteRegister])
)
(* * Special Register Read Access)
(DEFINEQ
(ReadRD1
[LAMBDA NIL (* rtk " 2-Jun-86 16:07")
(SELECTQ (fetch (MI RD1addr) of #MIR)
(0 NIL)
(1 (SETQ D1 #PCHiN))
(2 (SETQ D1 #IBufData))
(3 (SETQ D1 @Mar))
(HELP])
(ReadRD2
[LAMBDA NIL (* rtk "17-Jul-86 10:09")
(SELECTQ (fetch (MI RD2addr) of #MIR)
(0 NIL)
(1 (SETQ D2 (ReadPc)))
(2 (SETQ D2 @Tmp1))
[3 (SETQ D2 (TamRep (QUOTE NIL]
[4 (SETQ D2 (TamRep (QUOTE T]
[5 (SETQ D2 (TamRep (QUOTE Unbound]
[7 (SETQ D2 (LOGAND (LOGNOT @MuxRdSel~)
(MASK.1'S 0 10Q]
(HELP])
(ReadPc
[LAMBDA NIL (* agb: "16-May-86 08:11")
(LOR #NCurPc (Mux-1 [ConcatBits (QUOTE ((#NCurPc 0 1 4]
#PCHiE #PCHiO])
(ClockReadSpecial
[LAMBDA NIL (* agb: "18-May-86 13:18")
(ExecuteClock (QUOTE (((*Read)
((Eval (ReadRD1)))
((Eval (ReadRD2])
)
(* * Special Register Write Access)
(DEFINEQ
(PrepareWrite
[LAMBDA NIL (* agb: "24-May-86 14:04")
[SETQ $XCurPc (ConcatBits (QUOTE ((D1 0 5 0]
(SETQ $XPcHi (ConcatBits (QUOTE ((D1 4 28 4])
(WriteSpecial
[LAMBDA NIL (* rtk " 9-Jun-86 17:03")
(Decoder *W2Addr 1 (QUOTE (none $W2-WriteIBufWord $W2-WriteMarD1 $W2-WriteMarD2 $W2-WritePC
$W2-WriteTmpD1 $W2-WriteMarMem])
(WriteIBufWord
[LAMBDA NIL (* rtk " 2-Jun-86 11:21")
(PROG (reg)
[SETQ reg (ConcatBits (QUOTE ((#OEFlg 2 1 0)
(*Quad 0 2 0]
(if DoSimLog
then (PRINTOUT SimLog "Writing IBuf word " reg " with " D2 T))
(SETA IBufReg reg D2])
(PrechargeWriteSpecial
[LAMBDA NIL (* agb: "24-May-86 12:34")
(ExecuteClock (QUOTE (((T)
((Rec #MIR - W2addr)
*W2Addr])
(ClockWriteSpecial
[LAMBDA NIL (* rtk "13-Jun-86 15:33")
(ExecuteClock (QUOTE (((*SecondCy $W2-WriteMarD1)
(D1 @Mar))
((*SecondCy $W2-WriteTmpD1)
(D1 @Tmp1))
((*FirstCy $W2-WriteMarD2)
(D2 @Mar))
((*MemRead *SecondCy $W2-WriteMarMem)
(D2 @Mar))
((*Write $W2-WritePC)
($XCurPc #CurPc)
($XPcHi #PCHiE)
($XPcHi #PCHiO)
($XPcHi #PCHiN))
[(*Write $W2-WriteIBufWord)
((Eval (WriteIBufWord]
((*SecondCy $W2-WriteIBufWord)
($XPcHi #PCHiN))
((*FirstCy $W2-WriteIBufWord #OEFlg)
($XPcHi #PCHiO))
((*FirstCy $W2-WriteIBufWord (Not #OEFlg))
($XPcHi #PCHiE))
((*Micro)
((Concat ((#PCHiN 0 1 4)))
#OEFlg])
)
(* * Memory Access)
(DEFINEQ
(PrepareDecode
[LAMBDA NIL (* agb: "24-May-86 13:14")
(SETQ @VirAddr (Mux-1 #$NewOp @Mar (RSH #PCHiN 2])
(DoVMM
[LAMBDA NIL (* rtk " 6-Jun-86 11:01")
(PROG (AddrLo cmpAddr i (res 0)
(RealMatch 0))
(SETQ AddrLo (LOADBYTE @VirAddr 0 11Q))
(SETQ cmpAddr (LOADBYTE @VirAddr 10Q 17Q))
(if (EQ 0 (LOADBYTE @VirAddr 25Q 3))
then (SETQ #VMRefill 0)
(SETQ RealMatch 1)
(SETQ res 0)
elseif [SETQ i (for i from 0 to 7 thereis (EQ cmpAddr (ELT VMCmpArray i]
then (SETQ #VMRefill 0)
(SETQ res (ELT VMResArray i))
else (SETQ #VMRefill 1)
(SETQ RealMatch 0))
(SETQ #Fault (LAND (LNOT #VMRefill)
(LOADBYTE res 14Q 1)))
[SETQ cas (Mux-1 RealMatch [Mux-1 #VMRefill [ConcatBits (QUOTE ((res 3 6 0)
(res 1 2 30Q)
(@VirAddr
0 1 1]
(ConcatBits (QUOTE ((MapConst 6 3 0)
(@VirAddr 1 5 23Q)
(@VirAddr 0 1 12Q]
(ConcatBits (QUOTE ((@VirAddr 1 10Q 12Q)
(@VirAddr 0 1 1]
[SETQ ras (Mux-1 RealMatch [Mux-1 #VMRefill [ConcatBits (QUOTE ((@VirAddr
1 10Q 2)
(@VirAddr
0 1 0]
(ConcatBits (QUOTE ((@VirAddr 1 10Q 13Q)
(@VirAddr 0 1 11Q]
(ConcatBits (QUOTE ((@VirAddr 1 10Q 2)
(@VirAddr 0 1 0]
(SETQ sel (Mux-1 RealMatch [Mux-1 #VMRefill [ConcatBits (QUOTE ((res 0 3 6]
(ConcatBits (QUOTE ((MapConst 0 3 3]
(ConcatBits (QUOTE ((@VirAddr 0 3 22Q])
(ResetVMM
[LAMBDA NIL (* agb: "20-May-86 15:46")
(for i from 0 to 7 do (SETA VMCmpArray i 4294967295))
(SETQ @NewVMMPtr 0])
(Write-VMM
[LAMBDA NIL (* agb: "20-May-86 19:40")
(SETA VMResArray @NewVMMPtr D2)
(SETA VMCmpArray @NewVMMPtr (LOADBYTE @VirAddr 8 15))
(SETQ @NewVMMPtr (Mod8 (ADD1 @NewVMMPtr])
(ClockMemRead
[LAMBDA NIL (* agb: "18-May-86 17:16")
(ExecuteClock (QUOTE (((*MemRead)
(*Din D2])
(ClockMemWrite
[LAMBDA NIL (* agb: "23-May-86 21:32")
(ExecuteClock (QUOTE (((*Read)
(D2 Dout))
[(*FirstCy @Reset-VMM)
((Eval (ResetVMM]
((*Write-VMM)
((Eval (Write-VMM])
(DoMemory
[LAMBDA NIL (* agb: "24-May-86 11:23")
[SETQ @Ras'(LNOT (LAND @MemCy (LNOT #Fault]
[SETQ @We'(LNOT (LAND @MemDir (LNOT #VMRefill]
(SETQ @Cas (LOR @MemRead @MemWrite])
(ClockMemAddr
[LAMBDA NIL (* agb: "23-May-86 22:31")
(ExecuteClock (QUOTE (((T)
(*Ras' RAS')
(*We' WE'])
(PrechargeMem
[LAMBDA NIL (* agb: "24-May-86 11:23")
(ExecuteClock (QUOTE (((T)
(@Ras' *Ras')
(@We' *We')
(Din *Din])
)
(* * Execution Units)
(DEFINEQ
(NormalCycle
[LAMBDA NIL (* rtk "24-Jun-86 10:30")
(PROG (DD1 DD2 TD2)
[SETQ DD1 (ConcatBits (QUOTE ((D1 0 36Q 0]
[SETQ DD2 (ConcatBits (QUOTE ((D2 0 36Q 0]
(SETQ @V (SELECTQ (fetch (MI EUop) of #MIR)
(0 0)
(1 D1)
(2 D2)
[3 (ConcatBits (QUOTE ((D1 36Q 2 36Q)
(D1 1 35Q 0]
[4 (ConcatBits (QUOTE ((D1 36Q 2 36Q)
(D1 0 35Q 1]
[5 (ConcatBits (QUOTE ((D2 30Q 10Q 0)
(D1 0 30Q 0]
[6 (ConcatBits (QUOTE ((IntPtr 36Q 2 36Q)
(D1 0 10Q 30Q]
[7 (ConcatBits (QUOTE ((D2 0 10Q 0)
(D1 10Q 30Q 10Q]
[10Q (ConcatBits (QUOTE ((D2 36Q 2 6)
(D1 0 36Q 0]
[11Q (ConcatBits (QUOTE ((D1 35Q 3 35Q)
(D1 0 35Q 1]
(40Q (CombTagD2 (IPLUS 4 DD1)))
(41Q (CombTagD2 (IPLUS DD1 DD2)))
(42Q (CombTagD2 (DIFFERENCE DD1 DD2)
T))
(43Q (CombTagD2 (IPLUS DD1 (LOGXOR DD2 7777777777Q))
T))
(44Q (CombTagD2 (IPLUS 20Q DD1)))
(100Q (CombTagD2 (LOGAND DD1 DD2)))
(101Q (CombTagD2 (LOGOR DD1 DD2)))
(102Q (CombTagD2 (LOGXOR DD1 DD2)))
(Emulator.Error)))
(SETQ @V (LOGOR (LOGAND @V 7777777777Q)
(SELECTQ (fetch (MI Tag) of #MIR)
(0 (TamRep (QUOTE Int)))
(1 (LSH (LOGAND D2 300Q)
30Q))
(2 (LOGAND D1 30000000000Q))
(3 (LOGAND D2 30000000000Q))
(HELP])
(CombTagD2
[LAMBDA (d inverted) (* rtk "24-Jun-86 11:34")
(PROG ((LD2 (LOADBYTE (if inverted
then (LOGXOR D2 (MASK.1'S 0 36Q))
else D2)
35Q 1)))
(SETQ @carry (LOADBYTE d 36Q 1))
[SETQ @overflow (LAND (LEQV (LOADBYTE D1 35Q 1)
LD2)
(LNOT (LEQV (LOADBYTE d 35Q 1)
LD2]
(SETQ @greaterp (if (EQP (LOADBYTE D1 35Q 1)
(LOADBYTE D2 35Q 1))
then @carry
else (LEQV (LOADBYTE D1 35Q 1)
0))) (* ConcatBits (QUOTE ((D2 36Q 2 36Q)
(d 0 36Q 0))))
(RETURN d])
(PrechargeEU
[LAMBDA NIL (* agb: "17-May-86 11:41")
(ExecuteClock (QUOTE (((T)
(@V *V])
(ClockEUR
[LAMBDA NIL (* agb: "23-May-86 22:30")
(ExecuteClock (QUOTE (((*SecondCy)
(*V D1])
(ClockEUW
[LAMBDA NIL (* agb: "24-May-86 12:59")
(ExecuteClock (QUOTE (((*FirstCy)
(@carry @@carry)
(@overflow @@overflow)
(@greaterp @@greaterp])
)
(* * Condition Code in Data Path)
(DEFINEQ
(CheckCondA
[LAMBDA NIL (* rtk "16-Jul-86 14:10")
(PROG (r)
(SETQ r (ELT CondAArray (LOADBYTE (fetch (MI CondCode) of #MIR)
0 5)))
(SETQ #CondA (OZ (if (NEQ r (QUOTE condc))
then (if (EQ r (QUOTE noop))
then (SETQ #CondA 0)
(RETURN))
[EQ 0 (LOGOR (LOGAND D1 (fetch (CondCode D1)
of r))
(LOGAND D2 (fetch (CondCode D2)
of r))
(LOGAND (LOGNOT D1)
(fetch (CondCode nD1)
of r))
(LOGAND (LOGNOT D2)
(fetch (CondCode nD2)
of r))
(LOGAND (LOGXOR D1 D2)
(fetch (CondCode D1xorD2)
of r]
else (SELECTQ (LOADBYTE (fetch (MI CondCode) of #MIR)
0 3)
(0 T)
(1 (EQ @@overflow 1))
(2 (EQ @@carry 1))
(3 (EQ @@greaterp 1))
0])
(MakeCondCodeArray
[LAMBDA NIL (* rtk "14-Jul-86 13:43")
(SETQ CondAArray (ARRAY 40Q (QUOTE POINTER)
(QUOTE noop)
0))
[MakeCondALst (QUOTE ((true condc)
(overflow condc)
(carry condc)
(greaterp condc)
(integerp tagD1 Int)
(floatp tagD1 Float)
(pointerp tagD1 Ptr)
(xtypep tagD1 Xtype)
(ccodep fulltagD1 Code)
(consp fulltagD1 List)
(posintegerp tagD1 Int notbitD1 SignBit)
(traponexit bitD1 TrapOnExit)
(traponreturntod2 bitD2 TrapOnReturnTo)
(unbound fulltagD1 Unbound)
(ccodep&~nlambdastarp fulltag&flagD1 Code)
(flagbitd2 bitD2 Tag)
(pointerpd2 tagD2 Ptr)
(integerd1d2 tagD1 Int tagD2 Int)
(integerpd1&pointerpd2 tagD1 Int tagD2 Ptr)
(numberpd1d2 fulltag&flagD1 Number fulltag&flagD2 Number)
(d2=int<8&d1=atom tagD2 Int valD2<2:28> 0 fulltagD1 Atm)
(d2=int<8&d1=ccodep tagD2 Int valD2<2:28> 0 fulltagD1 Code)
(d1=d2 wordEq 37777777777Q)
(d1<7x>=d2<7x> wordEq 376Q)
(d1<8>=d2<8> wordEq 377Q)
(stackp fulltag&flagD1 Stack)
(minintd2 D2Eq 4000000000Q]
(SETQ CondALst (for i from 0 to (DIFFERENCE (ARRAYSIZE CondAArray)
1)
collect (ELT CondAArray i])
)
(* * Next Opcode Functions)
(DEFINEQ
(DoIBuf
[LAMBDA NIL (* rtk "18-Jul-86 14:43")
(PROG (selO selE)
(SETQ #NCurPc (LOADBYTE (PLUS #CurPc #$OpLength)
0 5))
(SETQ #NCurPc<30:31> (LOADBYTE #NCurPc 0 2))
(SETQ #NCurPc<29:31> (LOADBYTE #NCurPc 0 3))
(SETQ #NCurPc<27:29> (LOADBYTE #NCurPc 2 3))
(SETQ selO (LOGOR #NCurPc<27:29> 1))
(SETQ selE (if (ODDP #NCurPc<27:29>)
then (Mod8 (ADD1 #NCurPc<27:29>))
else #NCurPc<27:29>))
(SETQ #IBufWE (ELT IBufReg selE))
(SETQ #IBufWO (ELT IBufReg selO))
(SETQ #Opcode (SelectIBufByte 0))
(SETQ #IBufSData (LOGOR (LLSH (SelectIBufByte 1)
0)
(LLSH (SelectIBufByte 2)
10Q)
(LLSH (SelectIBufByte 3)
20Q)
(LLSH (SelectIBufByte 4)
30Q)))
(SETQ #ContRefill (LAND (LNOT (LEQV (LOADBYTE #PCHiN 4 1)
(LOADBYTE #CurPc 4 1)))
(LCMP (LOADBYTE #NCurPc 0 4)
3])
(SelectIBufByte
[LAMBDA (index) (* agb: " 7-May-86 08:55")
(PROG (offset)
(SETQ offset (Mod8 (PLUS index #NCurPc<29:31>)))
(if (ILESSP offset 4)
then (RETURN (LOADBYTE #IBufWE (TIMES 8 (DIFFERENCE 3 offset))
8))
else (RETURN (LOADBYTE #IBufWO (TIMES 8 (DIFFERENCE 7 offset))
8])
(IBufData
[LAMBDA NIL (* rtk "14-May-86 12:44")
[SETQ $IBufData (LOGAND $IBufSData (SELECTQ $OpLength
(0 0)
(1 0)
(2 255)
(3 65535)
(4 16777215)
(5 -1)
(HELP]
(SETQ $IBufN (LOGAND $IBufSData 255])
(ClockIBuf
[LAMBDA NIL (* agb: "23-May-86 21:28")
(ExecuteClock (QUOTE (((*Op)
(#IBufSData $IBufSData)
(#Opcode $Opcode)
(#NCurPc $NCurPc))
((*Micro $NewOp)
($IBufN #IBufN)
($IBufData #IBufData)
($NCurPc #CurPc)
($OpLength #$OpLength])
)
(* * Micro Control)
(DEFINEQ
(ClockSNI
[LAMBDA NIL (* agb: " 5-Jul-86 13:38")
[ExecuteClock (QUOTE (((*Op)
(#uPC $uPC)
(#OpLength $OpLength))
((*Micro)
($MIR #MIR)
($uPC #$uPC]
(SETQ Cycle (fetch (MI Cycle) of #MIR])
(SelNextInst
[LAMBDA NIL (* agb: " 6-Jul-86 11:37")
(SETQ #uPC (IF (TF #SelNextInstA)
THEN (fetch (MI NextInstA) of #MIR)
ELSEIF (TF #SelNextInstB)
THEN (fetch (MI NextInstB) of #MIR)
ELSEIF (TF #NewOp)
THEN (Mux-1 #ModStartAddr #StartAddr (LOR (LAND #StartAddr 240)
(LAND #Opcode 15)))
ELSE (HELP])
(OpPla
[LAMBDA NIL (* agb: "23-May-86 21:36")
(* * This uses #Opcode #Reset #Interrupt #RefillRq #FramesFull #FramesEmpty. It sets #OpLength #StartAddr
#ModStartAddr #ForceNewOp.)
(EvaluatePLA OpPlaSpec (QUOTE OpPla])
(GetUCode
[LAMBDA NIL (* rtk "27-May-86 19:26")
(SETQ $MIR (ELT UCodeRom $uPC])
(DoCCode1
[LAMBDA NIL (* rtk "15-Jul-86 11:30")
(SETQ #CondB (SELECTQ (LOADBYTE (fetch (MI CondCode) of #MIR)
0 6)
(40Q #Arg=Arg2)
(41Q #Arg=0)
(42Q #Fault)
(43Q #FramesFull)
0])
(DoCCode2
[LAMBDA NIL (* rtk "15-Jul-86 11:30")
(SETQ #CondX (Mux-2 (LOADBYTE (fetch (MI CondCode) of #MIR)
5 1)
#CondA #CondB))
(SETQ #RefillRq (LOR @InitialRefill #ContRefill))
(SETQ #ConditionResult (LNOT (LEQV (LOADBYTE (fetch (MI CondCode) of #MIR)
6 1)
#CondX)))
[SETQ #SelNextInstA (LNOT (LOR (LOADBYTE (fetch (MI NextInstA) of #MIR)
10Q 1)
(LOR (LNOT #ConditionResult)
#ForceNewOp]
[SETQ #SelNextInstB (LNOT (LOR (LOADBYTE (fetch (MI NextInstB) of #MIR)
10Q 1)
(LOR #ConditionResult #ForceNewOp]
(SETQ #NewOp (LAND (LNOT #SelNextInstA)
(LNOT #SelNextInstB)))
(SETQ #WriteOk (LOR #ConditionResult (LNOT (fetch (MI CWrite) of #MIR])
(CheckCondB
[LAMBDA NIL (* agb: " 5-Jul-86 13:27")
(SETQ #CondB (SELECTQ (LOADBYTE (fetch (MI CondCode) of #MIR)
0 3)
(0 1)
(3 #Arg=0)
(4 #Arg=Arg2)
0])
(CheckCondC
[LAMBDA NIL (* agb: "23-May-86 21:35")
(SETQ #CondC (OZ (SELECTQ (LOADBYTE (fetch (MI CondCode) of #MIR)
0 3)
(0 T)
(1 (EQ @@carry 0))
(2 (TF #FramesFull))
(3 (TF @#Fault))
(4 (EQ @@overflow 0))
(5 (EQ @@greaterp 1))
0])
)
(* * Misc Actions)
(DEFINEQ
(DoMisc
[LAMBDA NIL (* rtk " 7-Jul-86 17:05")
(if (EQ 37Q (fetch (MI Misc) of #MIR))
then (if (AND (NOT JustReset)
(GREATERP Cycles 2))
then (PRINT "Emulator stopped")
(TS.MAINMENUSELECTEDFN (QUOTE Exit)
(WINDOWPROP TS.MAINWINDOW (QUOTE DEBUGMENU))
(QUOTE LEFT)))
else (SETQ JustReset NIL))
(EvaluatePLA MiscPlaSpec (QUOTE MiscPla))
(SETQ @InitialRefill (LAND $InitialRefill @ResetInitialRefill~])
(ClockMisc
[LAMBDA NIL (* agb: " 5-Jul-86 13:58")
(ExecuteClock (QUOTE (((*Op)
(@SetOutputInt~ $SetOutputInt~)
(@ResetOutputInt~ $ResetOutputInt~)
(@SetInitialRefill~ $SetInitialRefill~)
(@ResetInitialRefill~ $ResetInitialRefill~)
(@SetStackRefill~ $SetStackRefill~)
(@ResetStackRefill~ $ResetStackRefill~)
(@SetInterruptEnable~ $SetInterruptEnable~)
(@ResetInterruptEnable~ $ResetInterruptEnable~)
(@SetMemLock~ $SetMemLock~)
(@ResetMemLock~ $ResetMemLock~)
(@SetRefCnt~ $SetRefCnt~)
(@ResetRefCnt~ $ResetRefCnt~)
(@OpLength=0 $OpLength=0)
(@ResetRefresh $ResetRefresh)
(@ResetInterrupt $ResetInterrupt))
(((Not @SetOutputInt~))
(1 $OutputInt))
(((Not @ResetOutputInt~))
(0 $OutputInt))
(((Not @SetInitialRefill~))
(1 $InitialRefill))
(((Not @ResetInitialRefill~))
(0 $InitialRefill))
(((Not @SetStackRefill~))
(1 $StackRefill))
(((Not @ResetStackRefill~))
(0 $StackRefill))
(((Not @SetInterruptEnable~))
(1 $InterruptEnable))
(((Not @ResetInterruptEnable~))
(0 $InterruptEnable))
(((Not @SetMemLock~))
(1 $MemLock))
(((Not @ResetMemLock~))
(0 $MemLock))
(((Not @SetRefCnt~))
(1 $RefCnt))
(((Not @ResetRefCnt~))
(0 $RefCnt))
((*Micro)
($StackRefill #$StackRefill)
($OutputInt #$OutputInt)
($StackRefill #$StackRefill)
($InterruptEnable #$InterruptEnable)
($MemLock #$MemLock)
($RefCnt #$RefCnt)
($ResetRefresh #$ResetRefresh)
($OpLength=0 #OpLength=0)
($ResetInterrupt #$ResetInterrupt))
((*Micro $OpLength=0)
(0 #$OpLength])
(MakeMiscPla
[LAMBDA NIL (* rtk "16-Jun-86 10:56")
(SETQ MiscPlaSpec
(MakePlaSpec (QUOTE (((#MIR Misc)
0 5 0)))
(QUOTE ((@SetOutputInt~ 1 1 0)
(@ResetOutputInt~ 2 1 0)
(@SetInitialRefill~ 3 1 0)
(@ResetInitialRefill~ 4 1 0)
(@SetStackRefill~ 5 1 0)
(@ResetStackRefill~ 6 1 0)
(@SetInterruptEnable~ 7 1 0)
(@ResetInterruptEnable~ 10Q 1 0)
(@SetMemLock~ 11Q 1 0)
(@ResetMemLock~ 12Q 1 0)
(@SetRefCnt~ 13Q 1 0)
(@ResetRefCnt~ 14Q 1 0)
(@ResetRefresh 15Q 1 0)
(@ResetInterrupt 16Q 1 0)
(@OpLength=0 17Q 1 0)
(@WriteOctal 20Q 1 0)
(@Reset-VMM 21Q 1 0)))
(QUOTE ((0 - 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0)
(1 - 0 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 setoutputint)
(2 - 1 0 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 resetoutputint)
(3 - 1 1 0 1 1 1 1 1 1 1 1 1 0 0 0 0 0 setinitialrefill)
(4 - 1 1 1 0 1 1 1 1 1 1 1 1 0 0 0 0 0 resetinitialrefill)
(5 - 1 1 1 1 0 1 1 1 1 1 1 1 0 0 0 0 0 setstackrefill)
(6 - 1 1 1 1 1 0 1 1 1 1 1 1 0 0 0 0 0 resetstackrefill)
(7 - 1 1 1 1 1 1 0 1 1 1 1 1 0 0 0 0 0 setinterruptenable)
(10Q - 1 1 1 1 1 1 1 0 1 1 1 1 0 0 0 0 0 resetinterruptenable)
(11Q - 1 1 1 1 1 1 1 1 0 1 1 1 0 0 0 0 0 setmemlock)
(12Q - 1 1 1 1 1 1 1 1 1 0 1 1 0 0 0 0 0 resetmemlock)
(13Q - 1 1 1 1 1 1 1 1 1 1 0 1 0 0 0 0 0 setrefcnt)
(14Q - 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 resetrefcnt)
(15Q - 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 resetrefresh)
(16Q - 1 1 1 1 1 1 1 1 1 1 1 1 0 1 0 0 0 resetinterrupt)
(17Q - 1 1 1 1 1 1 1 1 1 1 1 1 0 0 1 0 0 oplength=0)
(20Q - 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 1 0 writeoctal)
(21Q - 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 1 reset-vmm)
(22Q - 1 0 0 1 1 0 1 0 1 0 1 0 1 1 0 0 1 reset)
(23Q - 1 1 0 1 1 1 1 1 1 1 1 1 0 0 1 0 0 oplength=0&setinitialrefill)
(37Q - 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 stop])
(PrechargeSync
[LAMBDA NIL (* agb: " 5-Jul-86 13:59")
(ExecuteClock (QUOTE (((T)
(Reset pReset)
(Hold pHold)
(Refresh pRefresh)
(upRefresh pupRefresh)
(Interrupt pInterrupt)
(upInterrupt pupInterrupt)
(SHold *SHold)
($#MemLock *$#MemLock])
(ClockSync
[LAMBDA NIL (* agb: " 5-Jul-86 14:01")
[ExecuteClock (QUOTE (((T)
(pReset @Reset)
(pHold SHold))
((*Micro)
(pRefresh upRefresh)
(pupRefresh upupRefresh)
(pInterrupt upInterrupt)
(pupInterrupt upupInterrupt]
(SETQ $Hold (LAND *SHold *#$MemLock))
(SETQ #SetRefresh (LAND upRefresh (LNOT upupRefresh)))
(SETQ #SetInterrupt (LAND upInterrupt (LNOT upupInterrupt)))
[ExecuteClock (QUOTE (((#SetRefresh)
(1 #Refresh))
((#$ResetRefresh)
(0 #Refresh))
((#SetInterrupt)
(1 #InterruptLatch))
((#$ResetInterrupt)
(0 #InterruptLatch]
(SETQ #Interrupt (LAND #InterruptLatch #$InterruptEnable])
)
(* * Config)
(DEFINEQ
(TamRep
[LAMBDA (itm offset) (* rtk " 3-Jun-86 18:06")
(* Some of these values are wrong)
(PLUS (LOGAND (OR offset 0)
(MASK.1'S 0 36Q))
(SELECTQ itm
(SignBit (MASK.1'S 35Q 1))
(TrapOnExit (MASK.1'S 35Q 1))
(TrapOnReturnTo (MASK.1'S 34Q 1))
(Tag (MASK.1'S 30Q 1))
(NIL (TamRep (QUOTE Atm)
0))
(T (TamRep (QUOTE Atm)
1))
(COND
[(NUMBERP itm)
(TamRep (QUOTE Int)
(LOGAND itm (MASK.1'S 0 36Q]
(T (LLSH (TamTagRep itm)
30Q])
(TamTagRep
[LAMBDA (itm offset) (* rtk "16-May-86 14:52")
(PLUS (OR offset 0)
(SELECTQ itm
(Ptr 0)
(Int 64)
(Float 128)
(Object 2)
(List 4)
(Code 6)
(Atm 8)
(Frame 10)
(Number 3)
(Unbound 32)
(Xtype 192)
(Stack 1)
(Emulator.Error])
)
(* * INIT)
(DEFINEQ
(DoTest
[LAMBDA NIL (* agb "25-Sep-85 08:01")
(ERSETQ (DoCycle (QUOTE {DSK}SIMLOG)))
(CLOSEF (QUOTE {DSK}SIMLOG))
(LISTFILES {DSK}SIMLOG])
(InitEmulator
[LAMBDA (ReInitial) (* rtk " 7-Jul-86 11:23")
[for i in InitVarLst
do (SET i 0)
(if (AND (NEQ i (QUOTE X))
(NOT (MEMB i GLOBALVARS)))
then (SETQ GLOBALVARS (CONS i GLOBALVARS]
[SETQ @EvenWordLines (SETQ @OddWordLines (QUOTE (0 0]
[SETQ *EvenWordLines (SETQ *OddWordLines (QUOTE (0 0]
(for i in (QUOTE (+ - * $ # @ < > :)) do (CLDISABLE i))
(SETQ IBufReg (ARRAY 10Q (QUOTE FIXP)
0 0))
(SETQ EvenRegFile (ARRAY 500Q (QUOTE POINTER)
0 0))
(SETQ OddRegFile (ARRAY 500Q (QUOTE POINTER)
0 0))
(SETQ MemoryArray (ARRAY 100000Q (QUOTE SMALLP)
0 0))
(SETQ VMCmpArray (ARRAY 10Q (QUOTE POINTER)
0 0))
(SETQ VMResArray (ARRAY 10Q (QUOTE POINTER)
0 0))
(MakeClockPla2)
(MakeRegMuxSpec)
(MakeMiscPla)
(SETQ BREAKONUMC NIL)
(SETQ BREAKONCYCLE NIL)
(SETQ IntPtr (TamRep (QUOTE Int)))
(SETQ RAS' 1)
(SETQ CAS' 1)
(SETQ LastRas' 1)
(SETQ LastCas' 1)
(SETQ SimLog NIL)
(SETQ RefreshAfter 7640Q)
(SETQ DoTransSim NIL)
(ClearMemoryArray)
(* if (OR (NOT (BOUNDP (QUOTE logWindow))) (NOT (WINDOWP logWindow))) then (printout T "Create logWindow" T)
(SETQ logWindow (CREATEW NIL "Tamarin Emulator Log")))
(MakeCondCodeArray)
(if (NOT ReInitial)
then (InitEmulatorWindow])
(ActOnMem
[LAMBDA NIL (* rtk " 6-Jun-86 11:00")
(if (AND (TF LastRas')
(NOT (TF RAS')))
then (SETQ RasAddr ras)
(SETQ noCas T))
[if (AND (NOT (TF RAS'))
(TF LastCas')
(NOT (TF CAS')))
then [if noCas
then (SETQ RamAddr (ConcatBits (QUOTE ((sel 22Q 3 0)
(cas 12Q 10Q 1)
(RasAddr 2 10Q 1)
(cas 1 1 0)
(RasAddr 0 1 0]
(if (TF WE')
then (SETQ Din (MemoryAccess RamAddr))
else (MemoryAccess RamAddr Dout))
(SETQ noCas NIL)
(SETQ RamAddr (LOGOR (LOGAND 7777777774Q RamAddr)
(LOGAND 3 (ADD1 RamAddr]
(SETQ LastCas' CAS')
(SETQ LastRas' RAS'])
)
(* * UCode fields)
(PUTPROPS addr uField val)
(PUTPROPS label uField atom)
(PUTPROPS newbotcxt uField ((cur 0)
(bot=in 1)
(bot=out 2)
(k 3)))
(PUTPROPS rcxt uField ((cur 0)
(next 1)
(prev 2)
(last 3)
(k 4)))
(PUTPROPS rd1addr uField ((pcaddr 1)
(ibufdata 2)
(mar 3)))
(PUTPROPS rd2addr uField ((raddr-1 0)
(pc 1)
(tmp1 2)
(nil 3)
(t 4)
(unbound 5)
(muxrdsel 7)))
(PUTPROPS wcxt uField ((cur 0)
(next 1)
(prev 2)
(last 3)
(k 4)))
(PUTPROPS cycle uField ((norm 0)
(r1 1)
(r4 2)
(w1 3)
(w4 4)))
(PUTPROPS euop uField ((nop 0)
(d1 1)
(d2 2)
(lshft1 3)
(rshft1 4)
(d2<8>shl24/d1<24> 5)
(d1<8>shr24 6)
(d1<24>/d2<8> 7)
(d2<2>shl24/d1<30> 10Q)
(arsh1 11Q)
(4 40Q)
(+ 41Q)
(diff2s 42Q)
(diff1s 43Q)
(20Q 44Q)
(and 100Q)
(or 101Q)
(xor 102Q)))
(PUTPROPS tag uField ((int 0)
(d2<8:7> 1)
(d1 2)
(d2 3)))
(PUTPROPS w2addr uField ((nowrite 0)
(ibufd2pcd1 1)
(mard1 2)
(mard2 3)
(pcd1 4)
(tmp1d1 5)
(marmem 6)))
(PUTPROPS dswap uField Flag)
(PUTPROPS raddr uField ((tos 0)
(ibufn 1)
(arg 2)
(k 3)
(arg<6>/qw<2> 4)
(0<4>/opcode<4> 5)))
(PUTPROPS waddr uField ((nowrite 0)
(tos 1)
(ibufn 2)
(arg 3)
(tos' 4)
(k 5)
(arg<6>/qw<2> 6)
(0<4>/opcode<4> 7)))
(PUTPROPS newarg uField ((arg 0)
(arg' 1)
(k 2)
(ibufn 3)
(d2 4)
(0<4>/opcode<4> 5)
(arg2 6)))
(PUTPROPS newarg2 uField ((arg2 0)
(d2<6>/0<2> 1)
(k 2)
(arg 3)))
(PUTPROPS newtopcxt uField ((cur 0)
(next 1)
(prev 2)
(k 3)))
(PUTPROPS newtos uField ((tos 0)
(tos' 1)
(k 2)
(ibufn 3)
(d2 4)))
(PUTPROPS arg' uField ((arg-1 0)
(arg+1 1)
(arg-4 2)
(arg+4 3)))
(PUTPROPS tos' uField ((tos-1 0)
(tos+1 1)))
(PUTPROPS k uField ((0 0)
(fx 15Q)
(stkhdr 0)
(pc 1)
(clink 5)
(ivar 10Q)
(ivar-1 7)
(pvar 20Q)
(valuecelloffset 1)
(defcelloffset 2)
(nextlink 3)
(inttypebits (TamTagRep (QUOTE Int)))
(symbtypebits (TamTagRep (QUOTE Atm)))
(floattypebits (TamTagRep (QUOTE Float)))
(ptrtypebits (TamTagRep (QUOTE Ptr)))
(xtypebits (TamTagRep (QUOTE Xtype)))
(unboundbits (TamTagRep (QUOTE Unbound)))
(ufnbase 400Q)
(undeffn 401Q)
(pfcode 402Q)
(intcode 403Q)
(frameflagcode 404Q)
(rtmp1 405Q)
(irqcount 406Q)
(decref 407Q)
(incref 410Q)
(refcountcode 411Q)
(quadwrap 440Q)))
(PUTPROPS condcode uField ((unbound 4)
(boundp 104Q)
(stackp 5)
(integerp 6)
(~integerp 106Q)
(floatp 10Q)
(~floatp 110Q)
(xtypep 11Q)
(~xtypep 111Q)
(pointerp 12Q)
(~pointerp 112Q)
(integerd1d2 13Q)
(numberpd1d2 14Q)
(~numberpd1d2 141Q)
(consp 15Q)
(~consp 115Q)
(d1=d2 16Q)
(d1#d2 116Q)
(ccodep 20Q)
(d2=int<8&d1=ccodep 21Q)
(d2=int<8&d1=atom 22Q)
(ccodep&~nlambdastarp 23Q)
(flagbitd2 24Q)
(noflagbitd2 124Q)
(d1<7x>=d2<7x> 25Q)
(d1<8>=d2<8> 26Q)
(minintd2 30Q)
(~minintd2 130Q)
(pointerpd2 31Q)
(integerpd1&pointerpd2 32Q)
(traponreturntod2 33Q)
(~traponreturntod2 133Q)
(traponexit 34Q)
(posintegerp 35Q)
(~posintegerp 135Q)
(true 0)
(overflow 1)
(nooverflow 101Q)
(carry 2)
(greaterp 3)
(notgreaterp 103Q)
(arg=arg2 40Q)
(arg=0 41Q)
(arg#0 141Q)
(nofault 142Q)
(framesfull 43Q)
(framesavail 143Q)))
(PUTPROPS muxrdsel uField ((k 1)
(arg 2)
(ibufn 3)
(opcode 4)
(tos 5)))
(PUTPROPS cwrite uField Flag)
(PUTPROPS nextinsta uField Label)
(PUTPROPS nextinstb uField Label)
(PUTPROPS misc uField ((setoutputint 1)
(resetoutputint 2)
(setinitialrefill 3)
(resetinitialrefill 4)
(setstackrefill 5)
(resetstackrefill 6)
(setinterruptenable 7)
(resetinterruptenable 10Q)
(setmemlock 11Q)
(resetmemlock 12Q)
(setrefcount 13Q)
(resetrefcount 14Q)
(resetrefresh 15Q)
(resetinterrupt 16Q)
(oplength=0 17Q)
(writeoctal 20Q)
(reset-vmm 21Q)
(reset 22Q)
(oplength=0&setinitialrefill 23Q)
(stop 37Q)))
(* * OpPla Fields)
(PUTPROPS forcenewop uField2 Flag)
(PUTPROPS length uField2 val)
(PUTPROPS modstartaddr uField2 Flag)
(PUTPROPS opcnt uField2 val)
(PUTPROPS opname uField2 atom)
(PUTPROPS opnbr uField2 val)
(PUTPROPS precond uField2 ((reset (400Q 400Q))
(notreset (0 400Q))
(interrupt (1000Q 1000Q))
(notinterrupt (0 1000Q))
(refill (2000Q 2000Q))
(notrefill (0 2000Q))
(framesempty (4000Q 4000Q))
(notframesempty (0 4000Q))
(framesfull (10000Q 10000Q))
(notframesfull (0 10000Q))
(refcount (20000Q 20000Q))
(notrefcount (0 20000Q))
(refresh (40000Q 40000Q))
(notrefresh (0 40000Q))
(stackrefill (100000Q 100000Q))
(notstackrefill (0 100000Q))))
(PUTPROPS start uField2 Label)
[DECLARE: EVAL@COMPILE
(DATATYPE MI ((Addr POINTER)
(Ucode POINTER)
(Label POINTER)
(RCxt BITS 3)
(WCxt BITS 3)
(NewTopCxt BITS 2)
(NewBotCxt BITS 2)
(Cycle BITS 4)
(EUop BITS 7)
(Tag BITS 2)
(RD1addr BITS 2)
(RD2addr BITS 3)
(W2addr BITS 3)
(Dswap BITS 1)
(Raddr BITS 3)
(Waddr BITS 3)
(NewArg BITS 3)
(NewArg2 BITS 2)
(NewTos BITS 3)
(MuxRdSel BITS 3)
(Tos' BITS 1)
(Arg' BITS 2)
(K BITS 11Q)
(CondCode BITS 7)
(CWrite BITS 1)
(NextInstA BITS 11Q)
(NextInstB BITS 11Q)
(Misc BITS 5)))
(DATATYPE OpD ((OpName POINTER)
(OpNbr POINTER)
(Val BITS 20Q)
(Mask BITS 20Q)
(Start BITS 12Q)
(ModStartAddr BITS 1)
(Length BITS 3)
(Precond BITS 3)
(NSel BITS 1)
(Const BITS 4)
(ForceNewOp BITS 1)))
(DATATYPE CondCode ((D1 POINTER)
(nD1 POINTER)
(D2 POINTER)
(nD2 POINTER)
(D1xorD2 POINTER)))
]
(/DECLAREDATATYPE (QUOTE MI)
(QUOTE (POINTER POINTER POINTER (BITS 3)
(BITS 3)
(BITS 2)
(BITS 2)
(BITS 4)
(BITS 7)
(BITS 2)
(BITS 2)
(BITS 3)
(BITS 3)
(BITS 1)
(BITS 3)
(BITS 3)
(BITS 3)
(BITS 2)
(BITS 3)
(BITS 3)
(BITS 1)
(BITS 2)
(BITS 11Q)
(BITS 7)
(BITS 1)
(BITS 11Q)
(BITS 11Q)
(BITS 5)))
[QUOTE ((MI 0 POINTER)
(MI 2 POINTER)
(MI 4 POINTER)
(MI 4 (BITS . 2))
(MI 4 (BITS . 62Q))
(MI 4 (BITS . 141Q))
(MI 2 (BITS . 1))
(MI 2 (BITS . 43Q))
(MI 0 (BITS . 6))
(MI 2 (BITS . 141Q))
(MI 6 (BITS . 1))
(MI 6 (BITS . 42Q))
(MI 6 (BITS . 122Q))
(MI 0 (BITS . 160Q))
(MI 6 (BITS . 202Q))
(MI 6 (BITS . 262Q))
(MI 7 (BITS . 2))
(MI 6 (BITS . 341Q))
(MI 7 (BITS . 62Q))
(MI 7 (BITS . 142Q))
(MI 7 (BITS . 220Q))
(MI 7 (BITS . 241Q))
(MI 10Q (BITS . 10Q))
(MI 10Q (BITS . 226Q))
(MI 7 (BITS . 300Q))
(MI 11Q (BITS . 10Q))
(MI 12Q (BITS . 10Q))
(MI 11Q (BITS . 224Q]
(QUOTE 14Q))
(/DECLAREDATATYPE (QUOTE OpD)
(QUOTE (POINTER POINTER (BITS 20Q)
(BITS 20Q)
(BITS 12Q)
(BITS 1)
(BITS 3)
(BITS 3)
(BITS 1)
(BITS 4)
(BITS 1)))
[QUOTE ((OpD 0 POINTER)
(OpD 2 POINTER)
(OpD 4 (BITS . 17Q))
(OpD 5 (BITS . 17Q))
(OpD 6 (BITS . 11Q))
(OpD 2 (BITS . 0))
(OpD 2 (BITS . 22Q))
(OpD 2 (BITS . 102Q))
(OpD 2 (BITS . 160Q))
(OpD 0 (BITS . 3))
(OpD 0 (BITS . 100Q]
(QUOTE 10Q))
(/DECLAREDATATYPE (QUOTE CondCode)
(QUOTE (POINTER POINTER POINTER POINTER POINTER))
(QUOTE ((CondCode 0 POINTER)
(CondCode 2 POINTER)
(CondCode 4 POINTER)
(CondCode 6 POINTER)
(CondCode 10Q POINTER)))
(QUOTE 12Q))
(RPAQQ InitVarLst (#$NewOp #$OpLength #$Opcode #$uPC #Arg #Arg2 #Bot+1Cxt #Bot-1Cxt #BotCxt #CCodeA
#CCodeB #CCodeC #CurPc #Fault #FramesEmpty #FramesFull #IBufN #IBufSData
#InitialRefill #InitialRefill' #Interrupt #Misc-Reset #NCurPc #NewOp
#PCHiE #PCHiN #PCHiO #RefCnt #RefillRq #Refresh #StackRefill #Top+1Cxt
#Top-1Cxt #TopCxt #Tos #VMMRefill $ConditionResult $ExternalInterrupt
$IBufData $IBufN $IBufSData $Misc-DisableInts $Misc-EnableInts
$Misc-Reset $NewBotCxt $NewIntEnb $NewTopCxt $OpLength $Opcode $uPC *Din
*MemCy *MemDir *MemRead *MemWrite *Micro *Op *Quad *Ras *Read *W2Addr
*We *Write *Write *Write-VMM *WtEven *WtOdd @#Fault @#VMRefill @CAS @Cas
@ClockState @FirstCy @Mar @MemRead @MemWrite @NewVMMPtr @PhyAddr @Quad
@RegAddr @SecondCy @V @VirAddr @Write @carry @greaterp @nocarry
@nooverflow @overflow BREAK CAS Cycle D1 D2 Din Hold LastCas' RAS' WE' X
eDat lastaddr oDat pClock pMemRead pMemWrite pMicro pOp pRead pWrite s2
s3 s4 #StackRefill $StackRefill @Tmp1 NOBIND DoSimLog DoOpcodeTrace
DoEmulatorVars DoEmulatorLog #ContRefill #VMRefill @RegCxt @WriteOctal
#NewTopCxt #NewBotCxt #NewArg #NewArg2 #NewTos $TopCxt $Top+1Cxt
$Top-1Cxt $BotCxt $Bot+1Cxt $Bot-1Cxt $FramesEmpty $FramesFull
$InitialRefill $NewTopCxt~ $NewBotCxt~ $NewArg~ $NewArg2~ $NewTos~
@RegCxt~ @RegAddr~ $XCurPc $XPcHi #$Hold @Reset #$RefCnt #RefCnt
#$StackRefill @Resetinterrupt $OutputInt $InterruptEnable~ $MemLock
$RefCnt Refresh #Refresh #$Refresh #$ResetRefresh pRefresh upRefresh
pupRefresh Interrupt $Interrupt pInterrupt upInterrupt pupInterrupt
#InterruptLatch #$InterruptEnable~ #$ResetInterrupt #$MemLock
RefreshCount RefreshAfter RefreshEnable Eval DoTransSim @@overflow
@RdMuxSel lastclock<>0 DoTransSim ResetCycle CondX Cycles))
(RPAQQ fulltagmsk 37600000000Q)
(RPAQQ tagmsk 30000000000Q)
(RPAQQ fulltag&flagmsk 37700000000Q)
(RPAQQ VarsList (Cycles FnCount #TopCxt @Mar @PhyAddr $IBufN $IBufData #NCurPc #PCHiE #PCHiO #PCHiN
#Arg #Arg2 @Tmp1 @overflow @@overflow @greaterp))
(RPAQQ sigList (Reset @Reset @DoReset *DoReset #ForceNewOp pPre pClock pOp pMicro pRead pWrite
pMemRead pMemWrite RAS' CAS' WE' #Fault #VMRefill #Fault *Write-VMM))
(RPAQQ MapConst 0)
(PUTPROPS TAMARINEMULATOR COPYRIGHT ("Xerox Corporation" 3701Q 3702Q))
(DECLARE: DONTCOPY
(FILEMAP (NIL (4324Q 13113Q (DoCycle 4336Q . 6634Q) (SetClocks 6636Q . 7154Q) (GateClocks 7156Q .
10064Q) (DoCombLogic 10066Q . 10731Q) (DoPhiPrecharge 10733Q . 11345Q) (DoCombLogicPrecharge 11347Q .
11626Q) (DoPhiClockRW 11630Q . 12511Q) (DoPhiClockUOp 12513Q . 13111Q)) (13142Q 21011Q (DoClock 13154Q
. 13440Q) (ClockClock 13442Q . 14177Q) (PrechargeClock 14201Q . 15124Q) (MakeClockPla2 15126Q .
21007Q)) (21043Q 26417Q (DoRegMux 21055Q . 23763Q) (DoRegMuxB 23765Q . 24572Q) (ClockRdMux 24574Q .
26415Q)) (26454Q 36124Q (DecodeRegAddr 26466Q . 31530Q) (ReadRegister 31532Q . 32464Q) (WriteRegister
32466Q . 34544Q) (PrechargeRegister 34546Q . 35312Q) (ClockReadRegister 35314Q . 35610Q) (
ClockWriteRegister 35612Q . 36122Q)) (36176Q 40512Q (ReadRD1 36210Q . 36655Q) (ReadRD2 36657Q . 37651Q
) (ReadPc 37653Q . 40165Q) (ClockReadSpecial 40167Q . 40510Q)) (40565Q 44253Q (PrepareWrite 40577Q .
41147Q) (WriteSpecial 41151Q . 41544Q) (WriteIBufWord 41546Q . 42265Q) (PrechargeWriteSpecial 42267Q
. 42574Q) (ClockWriteSpecial 42576Q . 44251Q)) (44306Q 53151Q (PrepareDecode 44320Q . 44601Q) (DoVMM
44603Q . 50036Q) (ResetVMM 50040Q . 50364Q) (Write-VMM 50366Q . 51004Q) (ClockMemRead 51006Q . 51260Q)
(ClockMemWrite 51262Q . 51711Q) (DoMemory 51713Q . 52350Q) (ClockMemAddr 52352Q . 52637Q) (
PrechargeMem 52641Q . 53147Q)) (53206Q 61050Q (NormalCycle 53220Q . 56436Q) (CombTagD2 56440Q . 57770Q
) (PrechargeEU 57772Q . 60232Q) (ClockEUR 60234Q . 60501Q) (ClockEUW 60503Q . 61046Q)) (61121Q 66165Q
(CheckCondA 61133Q . 63303Q) (MakeCondCodeArray 63305Q . 66163Q)) (66230Q 72571Q (DoIBuf 66242Q .
70366Q) (SelectIBufByte 70370Q . 71254Q) (IBufData 71256Q . 72037Q) (ClockIBuf 72041Q . 72567Q)) (
72624Q 101031Q (ClockSNI 72636Q . 73310Q) (SelNextInst 73312Q . 74263Q) (OpPla 74265Q . 74754Q) (
GetUCode 74756Q . 75202Q) (DoCCode1 75204Q . 75673Q) (DoCCode2 75675Q . 77560Q) (CheckCondB 77562Q .
100206Q) (CheckCondC 100210Q . 101027Q)) (101063Q 113660Q (DoMisc 101075Q . 102221Q) (ClockMisc
102223Q . 105612Q) (MakeMiscPla 105614Q . 111456Q) (PrechargeSync 111460Q . 112204Q) (ClockSync
112206Q . 113656Q)) (113704Q 116104Q (TamRep 113716Q . 115237Q) (TamTagRep 115241Q . 116102Q)) (
116126Q 123416Q (DoTest 116140Q . 116507Q) (InitEmulator 116511Q . 121662Q) (ActOnMem 121664Q .
123414Q)))))
STOP