*pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 26 #$Opcode 26 #NCurPc: 3
D1: -- D2: -- Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011000 $Opcode: 26 #$Opcode 26 #NCurPc: 3
D1: -- D2: -- Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010100 $Opcode: 26 #$Opcode 26 #NCurPc: 3
D1: -- D2: -- Tos: 18 RegAddr: 0
New Opcode: 26 Length: 1 Data: Object/0 N: 26 PC: 3 OldOpLength: 0
Executing uInst: reset:0
#MIR: (Label_Reset Misc_Reset EUop_D2 Tag_Int RD2addr_MuxRdSel MuxRdSel_K K_0 NewArg_K W2addr_PcD1 
NewBotCxt_K NewtopCxt_K)
****************** Errors ******************
#IBUFN-7: 1 _ 0
#IBUFN-6: 1 _ 0
#IBUFN-5: 1 _ 0
#IBUFN-2: 1 _ 0
#IBUFN-0: 1 _ 0
VAD'-2: 1 _ 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 26 #$Opcode 26 #NCurPc: 3
D1: -- D2: Object/0 Tos: 18 RegAddr: 0
****************** Errors ******************
#IBUFN-7: 1 _ 0
#IBUFN-6: 1 _ 0
#IBUFN-5: 1 _ 0
#IBUFN-2: 1 _ 0
#IBUFN-0: 1 _ 0
VAD'-2: 1 _ 0
****************** Errors ******************
#OPCODE-7: 1 _ 0
#OPCODE-6: 1 _ 0
#OPCODE-5: 1 _ 0
#OPCODE-2: 1 _ 0
#OPCODE-0: 1 _ 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 26 #$Opcode 26 #NCurPc: 3
D1: Int/0 D2: -- Tos: 18 RegAddr: 0
Executing uInst: LAB0083:157
#MIR: (EUop_D2 Tag_Int RD2addr_MuxRdSel MuxRdSel_Arg Waddr_K WCxt_K K_IrqCount)
****************** Errors ******************
#IBUFN-7: 1 _ 0
#IBUFN-6: 1 _ 0
#IBUFN-5: 1 _ 0
#IBUFN-2: 1 _ 0
#IBUFN-0: 1 _ 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 26 #$Opcode 26 #NCurPc: 0
D1: -- D2: Object/0 Tos: 18 RegAddr: 0
****************** Errors ******************
#IBUFN-7: 1 _ 0
#IBUFN-6: 1 _ 0
#IBUFN-5: 1 _ 0
#IBUFN-2: 1 _ 0
#IBUFN-0: 1 _ 0
****************** Errors ******************
#OPCODE-7: 1 _ 0
#OPCODE-6: 1 _ 0
#OPCODE-5: 1 _ 0
#OPCODE-2: 1 _ 0
#OPCODE-0: 1 _ 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 26 #$Opcode 26 #NCurPc: 0
D1: Int/0 D2: -- Tos: 18 RegAddr: 0
Executing uInst: LAB0084:158
#MIR: (K_Pvar NewTos_K NextInstA_Done)
****************** Errors ******************
#IBUFN-7: 1 _ 0
#IBUFN-6: 1 _ 0
#IBUFN-5: 1 _ 0
#IBUFN-2: 1 _ 0
#IBUFN-0: 1 _ 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 26 #$Opcode 26 #NCurPc: 0
D1: -- D2: -- Tos: 18 RegAddr: 0
****************** Errors ******************
#IBUFN-7: 1 _ 0
#IBUFN-6: 1 _ 0
#IBUFN-5: 1 _ 0
#IBUFN-2: 1 _ 0
#IBUFN-0: 1 _ 0
****************** Errors ******************
#OPCODE-7: 1 _ 0
#OPCODE-6: 1 _ 0
#OPCODE-5: 1 _ 0
#OPCODE-2: 1 _ 0
#OPCODE-0: 1 _ 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 26 #$Opcode 26 #NCurPc: 0
D1: Int/1073741823 D2: -- Tos: 16 RegAddr: 0
New Opcode: 26 Length: 0 Data: Object/0 N: 26 PC: 0 OldOpLength: 0
Executing uInst: loadibuf:209
#MIR: (Label_LoadIBuf Cycle_R4 RD1addr_PcAddr W2addr_IBufD2PcD1 EUop_+16 Tag_Int 
Misc_ResetInitialRefill CondCode_NoFault NextInstA_Done NextInstB_IBufPageFault)
****************** Errors ******************
#IBUFN-7: 1 _ 0
#IBUFN-6: 1 _ 0
#IBUFN-5: 1 _ 0
#IBUFN-2: 1 _ 0
#IBUFN-0: 1 _ 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010010 $Opcode: 26 #$Opcode 26 #NCurPc: 0
D1: Int/0 D2: -- Tos: 16 RegAddr: 0
****************** Errors ******************
#IBUFN-7: 1 _ 0
#IBUFN-6: 1 _ 0
#IBUFN-5: 1 _ 0
#IBUFN-2: 1 _ 0
#IBUFN-0: 1 _ 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010001 $Opcode: 26 #$Opcode 26 #NCurPc: 0
D1: Int/16 D2: Ptr-63/133693439 Tos: 16 RegAddr: 0
****************** Errors ******************
#IBUFN-7: 1 _ 0
#IBUFN-6: 1 _ 0
#IBUFN-5: 1 _ 0
#IBUFN-2: 1 _ 0
#IBUFN-0: 1 _ 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010000 $Opcode: 26 #$Opcode 26 #NCurPc: 0
D1: -- D2: XType/801043291 Tos: 16 RegAddr: 0
****************** Errors ******************
#IBUFN-7: 1 _ 0
#IBUFN-6: 1 _ 0
#IBUFN-5: 1 _ 0
#IBUFN-2: 1 _ 0
#IBUFN-0: 1 _ 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011000 $Opcode: 144 #$Opcode 26 #NCurPc: 0
D1: -- D2: XType/939523823 Tos: 16 RegAddr: 0
****************** Errors ******************
#IBUFN-7: 1 _ 0
#IBUFN-6: 1 _ 0
#IBUFN-5: 1 _ 0
#IBUFN-2: 1 _ 0
#IBUFN-0: 1 _ 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010100 $Opcode: 144 #$Opcode 144 #NCurPc: 0
D1: -- D2: XType/1046321139 Tos: 16 RegAddr: 0
New Opcode: 144 Length: 5 Data: Code/100663424 N: 128 PC: 0 OldOpLength: 5
Executing uInst: pconst:80
#MIR: (Label_PConst EUop_D2<2>Shl24/D1<30> Tag_D2<8:7> RD2addr_MuxRdSel MuxRdSel_K K_PtrTypeBits 
RD1addr_IBufData Waddr_TOS' TOS'_TOS+1 NewTos_Tos' NextInstA_Done)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 37 #$Opcode 144 #NCurPc: 5
D1: Code/100663424 D2: Object/0 Tos: 16 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 37 #$Opcode 37 #NCurPc: 5
D1: Code/100663424 D2: -- Tos: 17 RegAddr: 0
New Opcode: 37 Length: 0 Data: Object/0 N: 2 PC: 5 OldOpLength: 0
Executing uInst: loadibuf:209
#MIR: (Label_LoadIBuf Cycle_R4 RD1addr_PcAddr W2addr_IBufD2PcD1 EUop_+16 Tag_Int 
Misc_ResetInitialRefill CondCode_NoFault NextInstA_Done NextInstB_IBufPageFault)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010010 $Opcode: 37 #$Opcode 37 #NCurPc: 5
D1: Int/16 D2: -- Tos: 17 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010001 $Opcode: 37 #$Opcode 37 #NCurPc: 5
D1: Int/32 D2: XType/1052630751 Tos: 17 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010000 $Opcode: 37 #$Opcode 37 #NCurPc: 5
D1: -- D2: XType/996638711 Tos: 17 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011000 $Opcode: 37 #$Opcode 37 #NCurPc: 5
D1: -- D2: Int/1072168443 Tos: 17 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010100 $Opcode: 37 #$Opcode 37 #NCurPc: 5
D1: -- D2: XType/1054604287 Tos: 17 RegAddr: 0
New Opcode: 37 Length: 2 Data: Object/2 N: 2 PC: 5 OldOpLength: 2
Executing uInst: ireg.x_:37
#MIR: (Label_IReg.X_ EUop_D1 Tag_D1 Raddr_Tos Waddr_IBufN WCxt_K K_256 NextInstA_Done)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 144 #$Opcode 37 #NCurPc: 7
D1: Code/100663424 D2: -- Tos: 17 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 144 #$Opcode 144 #NCurPc: 7
D1: Code/100663424 D2: -- Tos: 17 RegAddr: 0
New Opcode: 144 Length: 5 Data: Code/100663360 N: 64 PC: 7 OldOpLength: 5
Executing uInst: pconst:80
#MIR: (Label_PConst EUop_D2<2>Shl24/D1<30> Tag_D2<8:7> RD2addr_MuxRdSel MuxRdSel_K K_PtrTypeBits 
RD1addr_IBufData Waddr_TOS' TOS'_TOS+1 NewTos_Tos' NextInstA_Done)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 37 #$Opcode 144 #NCurPc: 12
D1: Code/100663360 D2: Object/0 Tos: 17 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 37 #$Opcode 37 #NCurPc: 12
D1: Code/100663360 D2: -- Tos: 18 RegAddr: 0
New Opcode: 37 Length: 2 Data: Object/9 N: 9 PC: 12 OldOpLength: 2
Executing uInst: ireg.x_:37
#MIR: (Label_IReg.X_ EUop_D1 Tag_D1 Raddr_Tos Waddr_IBufN WCxt_K K_256 NextInstA_Done)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 56 #$Opcode 37 #NCurPc: 14
D1: Code/100663360 D2: Code/100663424 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 56 #$Opcode 56 #NCurPc: 14
D1: Code/100663360 D2: -- Tos: 18 RegAddr: 0
New Opcode: 56 Length: 4 Data: Object/2097216 N: 64 PC: 14 OldOpLength: 4
Executing uInst: gvar:56
#MIR: (Label_GVar EUop_+ Tag_Int RD1addr_IBufData RD2addr_MuxRdSel MuxRdSel_K K_ValueCellOffset 
W2addr_MarD1)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 26 #$Opcode 56 #NCurPc: 18
D1: Object/2097216 D2: Object/1 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 26 #$Opcode 56 #NCurPc: 18
D1: Int/2097217 D2: -- Tos: 18 RegAddr: 0
Executing uInst: LAB0002:60
#MIR: (Cycle_R1 W2addr_MarMem CondCode_NoFault NextInstB_PageFault)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 26 #$Opcode 56 #NCurPc: 18
D1: Code/100663360 D2: Code/100663424 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010000 $Opcode: 26 #$Opcode 56 #NCurPc: 18
D1: -- D2: Int/16 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 26 #$Opcode 56 #NCurPc: 18
D1: Code/100663360 D2: Code/100663424 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011000 $Opcode: 26 #$Opcode 56 #NCurPc: 18
D1: -- D2: -- Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010100 $Opcode: 26 #$Opcode 56 #NCurPc: 18
D1: -- D2: -- Tos: 18 RegAddr: 0
Executing uInst: pagefault:212
#MIR: (Label_PageFault EUop_D1 Tag_Int RD1addr_Mar Waddr_Tos' Tos'_Tos+1 NewTos_Tos' NewArg_K K_1 
Misc_OpLength=0 CondCode_FramesAvail Cwrite NextInstB_DumpFrame)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 26 #$Opcode 56 #NCurPc: 18
D1: Int/2097217 D2: Code/100663424 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 26 #$Opcode 56 #NCurPc: 18
D1: Int/2097217 D2: -- Tos: 19 RegAddr: 0
Executing uInst: LAB0072:146
#MIR: (EUop_D1 Tag_D1 Raddr_K K_PFCode RCxt_K W2addr_MarD1 NextInstA_Fn1)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 56 #$Opcode 56 #NCurPc: 14
D1: Code/100663424 D2: -- Tos: 19 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 56 #$Opcode 56 #NCurPc: 14
D1: Code/100663424 D2: -- Tos: 19 RegAddr: 0
Executing uInst: fn1:197
#MIR: (Label_Fn1 EUop_+4 Tag_D1 RD1addr_Mar W2addr_MarD1 NewArg2_Arg NewArg_K K_StkHdr CondCode_CCodeP
 NextInstB_Fn5)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 56 #$Opcode 56 #NCurPc: 14
D1: Code/100663424 D2: Code/100663360 Tos: 19 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 56 #$Opcode 56 #NCurPc: 14
D1: Code/100663428 D2: -- Tos: 19 RegAddr: 0
Executing uInst: LAB0041:115
#MIR: (Cycle_R4 WCxt_Next Waddr_Arg<6>/QW<2> EUop_+4 Tag_D1 RD1addr_Mar W2addr_MarD1 CondCode_NoFault 
NextInstB_PageFault)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010010 $Opcode: 56 #$Opcode 56 #NCurPc: 14
D1: Code/100663428 D2: Code/100663360 Tos: 19 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010001 $Opcode: 56 #$Opcode 56 #NCurPc: 14
D1: Code/100663432 D2: Int/16 Tos: 19 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010000 $Opcode: 56 #$Opcode 56 #NCurPc: 14
D1: -- D2: Int/0 Tos: 19 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011000 $Opcode: 56 #$Opcode 56 #NCurPc: 14
D1: -- D2: Code/100663424 Tos: 19 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010100 $Opcode: 56 #$Opcode 56 #NCurPc: 14
D1: -- D2: Code/100663424 Tos: 19 RegAddr: 0
Executing uInst: LAB0042:116
#MIR: (EUop_D2 Tag_D2 RD2addr_Unbound Waddr_K K_PVar WCxt_Next Misc_WriteOctal NewArg_Arg2)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 56 #$Opcode 56 #NCurPc: 14
D1: Int/2097217 D2: Ptr-32/0 Tos: 19 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 56 #$Opcode 56 #NCurPc: 14
D1: Ptr-32/0 D2: -- Tos: 19 RegAddr: 0
Executing uInst: fn2:198
#MIR: (Label_Fn2 EUop_D2 Tag_D2 RD2addr_Nil Waddr_K K_IVar WCxt_Next Misc_WriteOctal)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 56 #$Opcode 56 #NCurPc: 14
D1: Int/2097217 D2: Atm/3584 Tos: 19 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 56 #$Opcode 56 #NCurPc: 14
D1: Atm/3584 D2: -- Tos: 19 RegAddr: 0
Executing uInst: LAB0043:117
#MIR: (EUop_D2 Tag_Int RD2addr_PC Waddr_K K_Pc Misc_Oplength=0&SetInitialRefill)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 56 #$Opcode 56 #NCurPc: 14
D1: Int/2097217 D2: Int/14 Tos: 19 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 56 #$Opcode 56 #NCurPc: 14
D1: Int/14 D2: -- Tos: 19 RegAddr: 0
Executing uInst: LAB0044:118
#MIR: (EUop_+ Tag_Int RD1addr_Mar RD2addr_MuxRdSel MuxRdSel_Arg W2Addr_MarD1)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 56 #$Opcode 56 #NCurPc: 14
D1: Code/100663432 D2: Object/1 Tos: 19 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 56 #$Opcode 56 #NCurPc: 14
D1: Int/100663433 D2: -- Tos: 19 RegAddr: 0
Executing uInst: LAB0045:119
#MIR: (Cycle_R1 Waddr_K WCxt_Next K_Pc)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 56 #$Opcode 56 #NCurPc: 14
D1: Int/2097217 D2: Code/100663360 Tos: 19 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 56 #$Opcode 56 #NCurPc: 14
D1: Int/1073741823 D2: Int/560 Tos: 19 RegAddr: 0
Executing uInst: LAB0046:120
#MIR: (EUop_D1 Tag_Int Raddr_K RCxt_Next K_PC W2addr_PCD1)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 56 #$Opcode 56 #NCurPc: 14
D1: Int/560 D2: Int/16 Tos: 19 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 56 #$Opcode 56 #NCurPc: 14
D1: Int/560 D2: -- Tos: 19 RegAddr: 0
Executing uInst: LAB0047:121
#MIR: (EUop_D2 Tag_Int RD2addr_MuxRdSel MuxRdSel_K K_Ivar NewArg2_K W2addr_MarD1 NewArg_Arg' 
Arg'_Arg-1 CondCode_Arg#0 NextInstB_Fn3)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 0 #$Opcode 56 #NCurPc: 16
D1: Int/2097217 D2: Object/8 Tos: 19 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 0 #$Opcode 56 #NCurPc: 16
D1: Int/8 D2: -- Tos: 19 RegAddr: 0
Executing uInst: LAB0048:122
#MIR: (EUop_+ Tag_Int RD1addr_Mar RD2addr_MuxRdSel MuxRdSel_Arg W2addr_Tmp1D1)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 0 #$Opcode 56 #NCurPc: 16
D1: Int/8 D2: Object/0 Tos: 19 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 0 #$Opcode 56 #NCurPc: 16
D1: Int/8 D2: -- Tos: 19 RegAddr: 0
Executing uInst: LAB0049:123
#MIR: (RD2addr_Tmp1 NewArg_D2)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 0 #$Opcode 56 #NCurPc: 16
D1: Int/2097217 D2: Int/8 Tos: 19 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 0 #$Opcode 56 #NCurPc: 16
D1: Int/1073741823 D2: -- Tos: 19 RegAddr: 0
Executing uInst: LAB0050:124
#MIR: (EUop_D1 Tag_D1 Raddr_Tos WCxt_Next Waddr_Arg NewTos_Tos' Tos'_Tos-1 NewArg_Arg' Arg'_Arg-1 
CondCode_Arg=Arg2 NextInstB_Rpt)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 0 #$Opcode 56 #NCurPc: 16
D1: Int/2097217 D2: Code/100663360 Tos: 19 RegAddr: 0
****************** Errors ******************
#CONDA: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 0 #$Opcode 56 #NCurPc: 16
D1: Int/2097217 D2: -- Tos: 18 RegAddr: 0
Executing uInst: fn3:199
#MIR: (Label_Fn3 EUop_D1<24>/D2<8> Tag_D1 RD2addr_MuxRdSel MuxRdSel_Tos Raddr_K Waddr_K K_StkHdr)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 0 #$Opcode 56 #NCurPc: 16
D1: -- D2: Object/18 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 0 #$Opcode 56 #NCurPc: 16
D1: XType/1073741586 D2: -- Tos: 18 RegAddr: 0
Executing uInst: LAB0051:125
#MIR: (EUop_D2 Tag_D2 Dswap Raddr_K K_StkHdr RCxt_Next WCxt_Next NewTos_D2 NewTopCxt_Next 
NextInstA_Done)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 0 #$Opcode 56 #NCurPc: 16
D1: -- D2: Int/16 Tos: 18 RegAddr: 0
****************** Errors ******************
D1-31: 0 _ 1
D1-29: 0 _ 1
D1-28: 0 _ 1
D1-27: 0 _ 1
D1-26: 0 _ 1
D1-25: 0 _ 1
D1-24: 0 _ 1
D1-23: 0 _ 1
D1-22: 0 _ 1
D1-21: 0 _ 1
D1-20: 0 _ 1
D1-19: 0 _ 1
D1-18: 0 _ 1
D1-17: 0 _ 1
D1-16: 0 _ 1
D1-15: 0 _ 1
D1-14: 0 _ 1
D1-13: 0 _ 1
D1-12: 0 _ 1
D1-11: 0 _ 1
D1-10: 0 _ 1
D1-9: 0 _ 1
D1-8: 0 _ 1
D1-7: 0 _ 1
D1-6: 0 _ 1
D1-5: 0 _ 1
D1-3: 0 _ 1
D1-2: 0 _ 1
D1-1: 0 _ 1
D1-0: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 0 #$Opcode 0 #NCurPc: 16
D1: Int/16 D2: -- Tos: 16 RegAddr: 0
New Opcode: 0 Length: 0 Data: Object/0 N: 32 PC: 16 OldOpLength: 0
Executing uInst: loadibuf:209
#MIR: (Label_LoadIBuf Cycle_R4 RD1addr_PcAddr W2addr_IBufD2PcD1 EUop_+16 Tag_Int 
Misc_ResetInitialRefill CondCode_NoFault NextInstA_Done NextInstB_IBufPageFault)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010010 $Opcode: 0 #$Opcode 0 #NCurPc: 16
D1: Int/560 D2: Atm/3584 Tos: 16 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010001 $Opcode: 0 #$Opcode 0 #NCurPc: 16
D1: Int/576 D2: List/80235720 Tos: 16 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010000 $Opcode: 0 #$Opcode 0 #NCurPc: 16
D1: -- D2: Int/862283366 Tos: 16 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011000 $Opcode: 200 #$Opcode 0 #NCurPc: 16
D1: -- D2: XType/1069448763 Tos: 16 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010100 $Opcode: 200 #$Opcode 200 #NCurPc: 16
D1: -- D2: XType/526176237 Tos: 16 RegAddr: 0
New Opcode: 200 Length: 1 Data: Object/0 N: 145 PC: 16 OldOpLength: 1
Executing uInst: vark:233
#MIR: (Label_Vark EUop_D1 Tag_D1 Raddr_0<4>/OpCode<4> Waddr_Tos' Tos'_Tos+1 NewTos_Tos' NextInstA_Done
)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 145 #$Opcode 200 #NCurPc: 17
D1: Int/2097217 D2: -- Tos: 16 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 145 #$Opcode 145 #NCurPc: 17
D1: Int/2097217 D2: -- Tos: 17 RegAddr: 0
New Opcode: 145 Length: 5 Data: Int/16777215 N: 255 PC: 17 OldOpLength: 5
Executing uInst: intconst:81
#MIR: (Label_IntConst EUop_D1 Tag_Int RD1addr_IBufData Waddr_TOS' TOS'_TOS+1 NewTos_Tos' 
NextInstA_Done)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 16 #$Opcode 145 #NCurPc: 22
D1: Int/16777215 D2: Ptr-32/0 Tos: 17 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 16 #$Opcode 16 #NCurPc: 22
D1: Int/16777215 D2: -- Tos: 18 RegAddr: 0
New Opcode: 16 Length: 0 Data: Object/0 N: 47 PC: 22 OldOpLength: 0
Executing uInst: loadibuf:209
#MIR: (Label_LoadIBuf Cycle_R4 RD1addr_PcAddr W2addr_IBufD2PcD1 EUop_+16 Tag_Int 
Misc_ResetInitialRefill CondCode_NoFault NextInstA_Done NextInstB_IBufPageFault)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010010 $Opcode: 16 #$Opcode 16 #NCurPc: 22
D1: Int/576 D2: Int/2097217 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010001 $Opcode: 16 #$Opcode 16 #NCurPc: 22
D1: Int/592 D2: XType/1071816350 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010000 $Opcode: 16 #$Opcode 16 #NCurPc: 22
D1: -- D2: Float/1073477457 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011000 $Opcode: 16 #$Opcode 16 #NCurPc: 22
D1: -- D2: XType/1004404446 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010100 $Opcode: 16 #$Opcode 16 #NCurPc: 22
D1: -- D2: Int/1073217523 Tos: 18 RegAddr: 0
New Opcode: 16 Length: 1 Data: Object/0 N: 47 PC: 22 OldOpLength: 1
Executing uInst: and:16
#MIR: (Label_And EUop_And Tag_Int Raddr_Tos RD2addr_Raddr-1 Waddr_Tos' Tos'_Tos-1 NewTos_Tos' 
CondCode_IntegerD1D2 CWrite NextInstA_Done NextInstB_Ufn-2)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 47 #$Opcode 16 #NCurPc: 23
D1: Int/16777215 D2: Int/2097217 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 47 #$Opcode 47 #NCurPc: 23
D1: Int/2097217 D2: -- Tos: 17 RegAddr: 0
New Opcode: 47 Length: 2 Data: Object/10 N: 10 PC: 23 OldOpLength: 2
Executing uInst: lrsh.n:228
#MIR: (Label_Lrsh.N EUop_D1 Tag_Int Raddr_Tos W2addr_MarD1 NewArg_IBufN CondCode_Integerp 
NextInstB_Ufn-1d)
****************** Errors ******************
D1-23: 1 _ 0
D1-22: 1 _ 0
D1-20: 1 _ 0
D1-19: 1 _ 0
D1-18: 1 _ 0
D1-17: 1 _ 0
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/2097217 D2: Ptr-32/0 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-23: 1 _ 0
D1-22: 1 _ 0
D1-20: 1 _ 0
D1-19: 1 _ 0
D1-18: 1 _ 0
D1-17: 1 _ 0
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/2097217 D2: -- Tos: 17 RegAddr: 0
Executing uInst: LAB0031:105
#MIR: (Arg'_Arg-1 NewArg_Arg' CondCode_Arg=0 NextInstA_Done)
****************** Errors ******************
D1-23: 1 _ 0
D1-22: 1 _ 0
D1-20: 1 _ 0
D1-19: 1 _ 0
D1-18: 1 _ 0
D1-17: 1 _ 0
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-11: 1 _ 0
VAD-10: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-11: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/2097217 D2: Ptr-32/0 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-23: 1 _ 0
D1-22: 1 _ 0
D1-20: 1 _ 0
D1-19: 1 _ 0
D1-18: 1 _ 0
D1-17: 1 _ 0
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-11: 1 _ 0
VAD-10: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-11: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/1073741823 D2: -- Tos: 17 RegAddr: 0
Executing uInst: LAB0032:106
#MIR: (EUop_Rshft1 Tag_Int Raddr_Tos Waddr_Tos NewArg_Arg' Arg'_Arg-1 CondCode_Arg=0 NextInstA_Done 
NextInstB_Rpt)
****************** Errors ******************
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-11: 1 _ 0
VAD-10: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-11: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/2097217 D2: Ptr-32/0 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-23: 1 _ 0
D1-22: 1 _ 0
D1-20: 1 _ 0
D1-19: 1 _ 0
D1-18: 1 _ 0
D1-17: 1 _ 0
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-11: 1 _ 0
VAD-10: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-11: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/1048608 D2: -- Tos: 17 RegAddr: 0
Executing uInst: LAB0032:106
#MIR: (EUop_Rshft1 Tag_Int Raddr_Tos Waddr_Tos NewArg_Arg' Arg'_Arg-1 CondCode_Arg=0 NextInstA_Done 
NextInstB_Rpt)
****************** Errors ******************
D1-22: 1 _ 0
D1-21: 1 _ 0
D1-19: 1 _ 0
D1-18: 1 _ 0
D1-17: 1 _ 0
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-11: 1 _ 0
VAD-10: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-11: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/1048608 D2: Ptr-32/0 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-22: 1 _ 0
D1-21: 1 _ 0
D1-19: 1 _ 0
D1-18: 1 _ 0
D1-17: 1 _ 0
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-11: 1 _ 0
VAD-10: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-11: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/524304 D2: -- Tos: 17 RegAddr: 0
Executing uInst: LAB0032:106
#MIR: (EUop_Rshft1 Tag_Int Raddr_Tos Waddr_Tos NewArg_Arg' Arg'_Arg-1 CondCode_Arg=0 NextInstA_Done 
NextInstB_Rpt)
****************** Errors ******************
D1-21: 1 _ 0
D1-20: 1 _ 0
D1-18: 1 _ 0
D1-17: 1 _ 0
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-11: 1 _ 0
VAD-10: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-11: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/524304 D2: Ptr-32/0 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-21: 1 _ 0
D1-20: 1 _ 0
D1-18: 1 _ 0
D1-17: 1 _ 0
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-11: 1 _ 0
VAD-10: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-11: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/262152 D2: -- Tos: 17 RegAddr: 0
Executing uInst: LAB0032:106
#MIR: (EUop_Rshft1 Tag_Int Raddr_Tos Waddr_Tos NewArg_Arg' Arg'_Arg-1 CondCode_Arg=0 NextInstA_Done 
NextInstB_Rpt)
****************** Errors ******************
D1-20: 1 _ 0
D1-19: 1 _ 0
D1-17: 1 _ 0
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-11: 1 _ 0
VAD-10: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-11: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/262152 D2: Ptr-32/0 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-20: 1 _ 0
D1-19: 1 _ 0
D1-17: 1 _ 0
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-11: 1 _ 0
VAD-10: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-11: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/131076 D2: -- Tos: 17 RegAddr: 0
Executing uInst: LAB0032:106
#MIR: (EUop_Rshft1 Tag_Int Raddr_Tos Waddr_Tos NewArg_Arg' Arg'_Arg-1 CondCode_Arg=0 NextInstA_Done 
NextInstB_Rpt)
****************** Errors ******************
D1-19: 1 _ 0
D1-18: 1 _ 0
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-11: 1 _ 0
VAD-10: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-11: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/131076 D2: Ptr-32/0 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-19: 1 _ 0
D1-18: 1 _ 0
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-11: 1 _ 0
VAD-10: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-11: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/65538 D2: -- Tos: 17 RegAddr: 0
Executing uInst: LAB0032:106
#MIR: (EUop_Rshft1 Tag_Int Raddr_Tos Waddr_Tos NewArg_Arg' Arg'_Arg-1 CondCode_Arg=0 NextInstA_Done 
NextInstB_Rpt)
****************** Errors ******************
D1-18: 1 _ 0
D1-17: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-11: 1 _ 0
VAD-10: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-11: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/65538 D2: Ptr-32/0 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-18: 1 _ 0
D1-17: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-11: 1 _ 0
VAD-10: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-11: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/32769 D2: -- Tos: 17 RegAddr: 0
Executing uInst: LAB0032:106
#MIR: (EUop_Rshft1 Tag_Int Raddr_Tos Waddr_Tos NewArg_Arg' Arg'_Arg-1 CondCode_Arg=0 NextInstA_Done 
NextInstB_Rpt)
****************** Errors ******************
D1-17: 1 _ 0
D1-16: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-11: 1 _ 0
VAD-10: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-11: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/32769 D2: Ptr-32/0 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-17: 1 _ 0
D1-16: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-11: 1 _ 0
VAD-10: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-11: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/16384 D2: -- Tos: 17 RegAddr: 0
Executing uInst: LAB0032:106
#MIR: (EUop_Rshft1 Tag_Int Raddr_Tos Waddr_Tos NewArg_Arg' Arg'_Arg-1 CondCode_Arg=0 NextInstA_Done 
NextInstB_Rpt)
****************** Errors ******************
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-11: 1 _ 0
VAD-10: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-11: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/16384 D2: Ptr-32/0 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-11: 1 _ 0
VAD-10: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-11: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/8192 D2: -- Tos: 17 RegAddr: 0
Executing uInst: LAB0032:106
#MIR: (EUop_Rshft1 Tag_Int Raddr_Tos Waddr_Tos NewArg_Arg' Arg'_Arg-1 CondCode_Arg=0 NextInstA_Done 
NextInstB_Rpt)
****************** Errors ******************
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-11: 1 _ 0
VAD-10: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-11: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/8192 D2: Ptr-32/0 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-11: 1 _ 0
VAD-10: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-11: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/4096 D2: -- Tos: 17 RegAddr: 0
Executing uInst: LAB0032:106
#MIR: (EUop_Rshft1 Tag_Int Raddr_Tos Waddr_Tos NewArg_Arg' Arg'_Arg-1 CondCode_Arg=0 NextInstA_Done 
NextInstB_Rpt)
****************** Errors ******************
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-11: 1 _ 0
VAD-10: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-11: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/4096 D2: Ptr-32/0 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-11: 1 _ 0
VAD-10: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-11: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 35 #$Opcode 35 #NCurPc: 25
D1: Int/2048 D2: -- Tos: 17 RegAddr: 0
New Opcode: 35 Length: 2 Data: Object/0 N: 0 PC: 25 OldOpLength: 2
Executing uInst: settype:35
#MIR: (Label_SetType EUop_D2<2>Shl24/D1<30> Tag_D2<8:7> Raddr_Tos RD2addr_MuxRdSel MuxRdSel_IBufN 
Waddr_Tos NextInstA_Done)
****************** Errors ******************
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 20 #$Opcode 35 #NCurPc: 27
D1: Int/2048 D2: Object/0 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 20 #$Opcode 20 #NCurPc: 27
D1: Object/2048 D2: -- Tos: 17 RegAddr: 0
New Opcode: 20 Length: 1 Data: Object/0 N: 32 PC: 27 OldOpLength: 1
Executing uInst: copy:20
#MIR: (Label_Copy EUop_D1 Tag_D1 Raddr_Tos Waddr_Tos' Tos'_Tos+1 NewTos_Tos' NextInstA_Done)
****************** Errors ******************
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 32 #$Opcode 20 #NCurPc: 28
D1: Object/2048 D2: Ptr-32/0 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 32 #$Opcode 32 #NCurPc: 28
D1: Object/2048 D2: -- Tos: 18 RegAddr: 0
New Opcode: 32 Length: 2 Data: Object/0 N: 0 PC: 28 OldOpLength: 2
Executing uInst: getptr:32
#MIR: (Label_Getptr EUop_+ Tag_D2 Dswap Raddr_Tos RD1addr_IBufData W2addr_MarD1 Condcode_PointerpD2 
NextInstB_Ufn-1d)
****************** Errors ******************
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 185 #$Opcode 32 #NCurPc: 30
D1: Object/0 D2: Object/2048 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 185 #$Opcode 32 #NCurPc: 30
D1: Object/2048 D2: -- Tos: 18 RegAddr: 0
Executing uInst: LAB0033:65
#MIR: (Cycle_R1 Waddr_Tos CondCode_NoFault Cwrite NextInstA_Done NextInstB_PageFault)
****************** Errors ******************
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-10: 1 _ 0
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-6: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
VAD'-0: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 185 #$Opcode 32 #NCurPc: 30
D1: Object/2048 D2: Object/2048 Tos: 18 RegAddr: 0
****************** Errors ******************
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-10: 1 _ 0
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-6: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
VAD'-0: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 185 #$Opcode 185 #NCurPc: 30
D1: Int/1073741823 D2: Int/16 Tos: 18 RegAddr: 0
New Opcode: 185 Length: 1 Data: Object/0 N: 26 PC: 30 OldOpLength: 1
Executing uInst: vark_:234
#MIR: (Label_Vark_ EUop_D1 Tag_D1 Raddr_Tos Waddr_0<4>/OpCode<4> NextInstA_Done)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 26 #$Opcode 185 #NCurPc: 31
D1: Int/16 D2: Object/2048 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 26 #$Opcode 26 #NCurPc: 31
D1: Int/16 D2: -- Tos: 18 RegAddr: 0
New Opcode: 26 Length: 1 Data: Object/0 N: 16 PC: 31 OldOpLength: 1
Executing uInst: '1:26
#MIR: (Label_'1 EUop_D2 Tag_Int RD2addr_MuxRdSel MuxRdSel_K K_1 Waddr_Tos' Tos'_Tos+1 NewTos_Tos' 
NextInstA_Done)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 16 #$Opcode 26 #NCurPc: 0
D1: Int/16 D2: Object/1 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 16 #$Opcode 16 #NCurPc: 0
D1: Int/1 D2: -- Tos: 19 RegAddr: 0
New Opcode: 16 Length: 1 Data: Object/0 N: 26 PC: 0 OldOpLength: 1
Executing uInst: and:16
#MIR: (Label_And EUop_And Tag_Int Raddr_Tos RD2addr_Raddr-1 Waddr_Tos' Tos'_Tos-1 NewTos_Tos' 
CondCode_IntegerD1D2 CWrite NextInstA_Done NextInstB_Ufn-2)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 26 #$Opcode 16 #NCurPc: 1
D1: Int/1 D2: Int/16 Tos: 19 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 26 #$Opcode 26 #NCurPc: 1
D1: Int/0 D2: -- Tos: 18 RegAddr: 0
New Opcode: 26 Length: 1 Data: Object/0 N: 10 PC: 1 OldOpLength: 1
Executing uInst: '1:228
#MIR: (Label_'1 EUop_D2 Tag_Int RD2addr_MuxRdSel MuxRdSel_K K_1 Waddr_Tos' Tos'_Tos+1 NewTos_Tos' 
NextInstA_Done)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 10 #$Opcode 26 #NCurPc: 2
D1: Int/0 D2: Object/1 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 10 #$Opcode 10 #NCurPc: 2
D1: Int/1 D2: -- Tos: 19 RegAddr: 0
New Opcode: 10 Length: 1 Data: Object/0 N: 53 PC: 2 OldOpLength: 1
Executing uInst: eq:10
#MIR: (Label_Eq Raddr_Tos RD2addr_Raddr-1 Tos'_Tos-1 NewTos_Tos' CondCode_D1=D2 NextInstA_SetT 
NextInstB_SetNil)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 53 #$Opcode 10 #NCurPc: 3
D1: Int/1 D2: Int/0 Tos: 19 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 53 #$Opcode 10 #NCurPc: 3
D1: Int/1073741823 D2: -- Tos: 18 RegAddr: 0
Executing uInst: setnil:222
#MIR: (Label_SetNil EUop_D2 Tag_D2 RD2addr_Nil Waddr_Tos NextInstA_Done)
****************** Errors ******************
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-10: 1 _ 0
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-6: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
VAD'-0: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 53 #$Opcode 10 #NCurPc: 3
D1: Int/0 D2: Atm/3584 Tos: 18 RegAddr: 0
****************** Errors ******************
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-10: 1 _ 0
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-6: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
VAD'-0: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 53 #$Opcode 53 #NCurPc: 3
D1: Atm/3584 D2: -- Tos: 18 RegAddr: 0
New Opcode: 53 Length: 2 Data: Object/7 N: 7 PC: 3 OldOpLength: 2
Executing uInst: fjump:53
#MIR: (Label_FJump EUop_nop Raddr_Tos Tos'_Tos-1 NewTos_Tos' Rd2addr_Nil Condcode_D1#D2 NextInstA_Done
 NextInstB_DoJmp)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 145 #$Opcode 53 #NCurPc: 5
D1: Atm/3584 D2: Atm/3584 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 145 #$Opcode 53 #NCurPc: 5
D1: Int/1073741823 D2: -- Tos: 17 RegAddr: 0
Executing uInst: dojmp:209
#MIR: (Label_DoJmp EUop_+ Tag_Int RD2addr_PC RD1addr_IBufData W2addr_PCD1 
Misc_Oplength=0&SetInitialRefill NextInstA_Dojmp1)
****************** Errors ******************
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-10: 1 _ 0
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-6: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
VAD'-0: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 145 #$Opcode 53 #NCurPc: 5
D1: Object/7 D2: Int/581 Tos: 17 RegAddr: 0
****************** Errors ******************
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-10: 1 _ 0
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-6: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
VAD'-0: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 145 #$Opcode 53 #NCurPc: 5
D1: Int/588 D2: -- Tos: 17 RegAddr: 0
Executing uInst: dojmp1:193
#MIR: (Label_DoJmp1 NextInstA_Done)
****************** Errors ******************
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-10: 1 _ 0
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-6: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
VAD'-0: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 145 #$Opcode 53 #NCurPc: 12
D1: Object/2048 D2: Ptr-32/0 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-30: 1 _ 0
D1-11: 0 _ 1
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-10: 1 _ 0
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-6: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
VAD'-0: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 145 #$Opcode 145 #NCurPc: 12
D1: Int/1073741823 D2: -- Tos: 17 RegAddr: 0
New Opcode: 145 Length: 0 Data: Object/0 N: 1 PC: 12 OldOpLength: 0
Executing uInst: loadibuf:209
#MIR: (Label_LoadIBuf Cycle_R4 RD1addr_PcAddr W2addr_IBufD2PcD1 EUop_+16 Tag_Int 
Misc_ResetInitialRefill CondCode_NoFault NextInstA_Done NextInstB_IBufPageFault)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010010 $Opcode: 145 #$Opcode 145 #NCurPc: 12
D1: Int/576 D2: Ptr-32/0 Tos: 17 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010001 $Opcode: 145 #$Opcode 145 #NCurPc: 12
D1: Int/592 D2: XType/1071816350 Tos: 17 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010000 $Opcode: 145 #$Opcode 145 #NCurPc: 12
D1: -- D2: Float/1073477457 Tos: 17 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011000 $Opcode: 145 #$Opcode 145 #NCurPc: 12
D1: -- D2: XType/1004404446 Tos: 17 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010100 $Opcode: 145 #$Opcode 145 #NCurPc: 12
D1: -- D2: Int/1073217523 Tos: 17 RegAddr: 0
New Opcode: 145 Length: 0 Data: Object/0 N: 1 PC: 12 OldOpLength: 0
Executing uInst: loadibuf:209
#MIR: (Label_LoadIBuf Cycle_R4 RD1addr_PcAddr W2addr_IBufD2PcD1 EUop_+16 Tag_Int 
Misc_ResetInitialRefill CondCode_NoFault NextInstA_Done NextInstB_IBufPageFault)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010010 $Opcode: 145 #$Opcode 145 #NCurPc: 12
D1: Int/592 D2: Ptr-32/0 Tos: 17 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010001 $Opcode: 145 #$Opcode 145 #NCurPc: 12
D1: Int/608 D2: Float/871219192 Tos: 17 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010000 $Opcode: 145 #$Opcode 145 #NCurPc: 12
D1: -- D2: XType/747145454 Tos: 17 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011000 $Opcode: 145 #$Opcode 145 #NCurPc: 12
D1: -- D2: Object/0 Tos: 17 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010100 $Opcode: 145 #$Opcode 145 #NCurPc: 12
D1: -- D2: Object/0 Tos: 17 RegAddr: 0
New Opcode: 145 Length: 5 Data: Int/1 N: 1 PC: 12 OldOpLength: 5
Executing uInst: intconst:81
#MIR: (Label_IntConst EUop_D1 Tag_Int RD1addr_IBufData Waddr_TOS' TOS'_TOS+1 NewTos_Tos' 
NextInstA_Done)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 201 #$Opcode 145 #NCurPc: 17
D1: Int/1 D2: Ptr-32/0 Tos: 17 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 201 #$Opcode 201 #NCurPc: 17
D1: Int/1 D2: -- Tos: 18 RegAddr: 0
New Opcode: 201 Length: 1 Data: Object/0 N: 17 PC: 17 OldOpLength: 1
Executing uInst: vark:233
#MIR: (Label_Vark EUop_D1 Tag_D1 Raddr_0<4>/OpCode<4> Waddr_Tos' Tos'_Tos+1 NewTos_Tos' NextInstA_Done
)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 17 #$Opcode 201 #NCurPc: 18
D1: Int/16 D2: Int/2097217 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 17 #$Opcode 17 #NCurPc: 18
D1: Int/16 D2: -- Tos: 19 RegAddr: 0
New Opcode: 17 Length: 1 Data: Object/0 N: 33 PC: 18 OldOpLength: 1
Executing uInst: or:17
#MIR: (Label_Or EUop_Or Tag_Int Raddr_Tos RD2addr_Raddr-1 Waddr_Tos' Tos'_Tos-1 NewTos_Tos' 
CondCode_IntegerD1D2 CWrite NextInstA_Done NextInstB_Ufn-2)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 33 #$Opcode 17 #NCurPc: 19
D1: Int/16 D2: Int/1 Tos: 19 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 33 #$Opcode 33 #NCurPc: 19
D1: Int/17 D2: -- Tos: 18 RegAddr: 0
New Opcode: 33 Length: 2 Data: Object/0 N: 0 PC: 19 OldOpLength: 2
Executing uInst: putptr:228
#MIR: (Label_Putptr EUop_D2 Tag_D2 Raddr_Tos RD2addr_Raddr-1 W2addr_MarD1 Condcode_PointerpD2 
NextInstB_Ufn-2d)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 60 #$Opcode 33 #NCurPc: 21
D1: Int/17 D2: Object/2048 Tos: 18 RegAddr: 0
****************** Errors ******************
#CONDA: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 60 #$Opcode 33 #NCurPc: 21
D1: Object/2048 D2: -- Tos: 18 RegAddr: 0
Executing uInst: LAB0034:229
#MIR: (EUop_+ Tag_D1 RD1addr_Mar RD2addr_MuxRdSel MuxRdSel_IBufN W2addr_MarD1)
****************** Errors ******************
D1-30: 1 _ 0
D1-11: 0 _ 1
D1-4: 1 _ 0
D1-0: 1 _ 0
VAD-11: 0 _ 1
VAD'-11: 1 _ 0
VAD'-4: 0 _ 1
VAD'-0: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 60 #$Opcode 33 #NCurPc: 21
D1: Object/2048 D2: Object/0 Tos: 18 RegAddr: 0
****************** Errors ******************
D1-30: 1 _ 0
D1-11: 0 _ 1
D1-4: 1 _ 0
D1-0: 1 _ 0
VAD-11: 0 _ 1
VAD'-11: 1 _ 0
VAD'-4: 0 _ 1
VAD'-0: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 60 #$Opcode 33 #NCurPc: 21
D1: Object/2048 D2: -- Tos: 18 RegAddr: 0
Executing uInst: LAB0035:109
#MIR: (Cycle_W1 Dswap Raddr_Tos Tos'_Tos-1 NewTos_Tos' CondCode_NoFault CWrite NextInstA_Done 
NextInstB_PageFault)
****************** Errors ******************
D1-30: 1 _ 0
D1-11: 0 _ 1
D1-4: 1 _ 0
D1-0: 1 _ 0
VAD-11: 0 _ 1
VAD'-11: 1 _ 0
VAD'-4: 0 _ 1
VAD'-0: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 60 #$Opcode 33 #NCurPc: 21
D1: Object/2048 D2: Int/17 Tos: 18 RegAddr: 0
****************** Errors ******************
D1-30: 1 _ 0
D1-11: 0 _ 1
D1-4: 1 _ 0
D1-0: 1 _ 0
VAD-11: 0 _ 1
VAD'-11: 1 _ 0
VAD'-4: 0 _ 1
VAD'-0: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 60 #$Opcode 60 #NCurPc: 21
D1: Int/1073741823 D2: -- Tos: 17 RegAddr: 0
New Opcode: 60 Length: 0 Data: Object/0 N: 124 PC: 21 OldOpLength: 0
Executing uInst: loadibuf:209
#MIR: (Label_LoadIBuf Cycle_R4 RD1addr_PcAddr W2addr_IBufD2PcD1 EUop_+16 Tag_Int 
Misc_ResetInitialRefill CondCode_NoFault NextInstA_Done NextInstB_IBufPageFault)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010010 $Opcode: 60 #$Opcode 60 #NCurPc: 21
D1: Int/608 D2: Ptr-32/0 Tos: 17 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010001 $Opcode: 60 #$Opcode 60 #NCurPc: 21
D1: Int/624 D2: Object/0 Tos: 17 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010000 $Opcode: 60 #$Opcode 60 #NCurPc: 21
D1: -- D2: Object/0 Tos: 17 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011000 $Opcode: 60 #$Opcode 60 #NCurPc: 21
D1: -- D2: Object/0 Tos: 17 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010100 $Opcode: 60 #$Opcode 60 #NCurPc: 21
D1: -- D2: Object/0 Tos: 17 RegAddr: 0
New Opcode: 60 Length: 1 Data: Object/0 N: 124 PC: 21 OldOpLength: 1
Executing uInst: reset-vmm:219
#MIR: (Label_Reset-Vmm Misc_Reset-Vmm NextInstA_Done)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 124 #$Opcode 60 #NCurPc: 22
D1: Object/2048 D2: Ptr-32/0 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-30: 1 _ 0
D1-11: 0 _ 1
D1-4: 1 _ 0
D1-0: 1 _ 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 124 #$Opcode 124 #NCurPc: 22
D1: Int/1073741823 D2: -- Tos: 17 RegAddr: 0
New Opcode: 124 Length: 1 Data: Object/0 N: 255 PC: 22 OldOpLength: 1
Executing uInst: retnp:220
#MIR: (Label_Retnp EUop_D1 Tag_Int Raddr_K K_StkHdr CondCode_TrapOnExit NextInstA_Ufn-0)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 255 #$Opcode 124 #NCurPc: 23
D1: Int/16 D2: -- Tos: 17 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 255 #$Opcode 124 #NCurPc: 23
D1: Int/16 D2: -- Tos: 17 RegAddr: 0
Executing uInst: LAB0065:139
#MIR: (EUop_D1 Tag_Int RCxt_Prev Raddr_K K_Pc W2Addr_PcD1 NewTopCxt_Prev 
Misc_Oplength=0&SetInitialRefill)
****************** Errors ******************
VAD-11: 0 _ 1
VAD'-11: 1 _ 0
VAD'-4: 0 _ 1
VAD'-0: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 255 #$Opcode 124 #NCurPc: 23
D1: Int/14 D2: XType/1073741586 Tos: 17 RegAddr: 0
****************** Errors ******************
VAD-11: 0 _ 1
VAD'-11: 1 _ 0
VAD'-4: 0 _ 1
VAD'-0: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 255 #$Opcode 124 #NCurPc: 23
D1: Int/14 D2: -- Tos: 17 RegAddr: 0
Executing uInst: LAB0066:140
#MIR: (Dswap Raddr_K K_StkHdr NewTos_D2 NextInstA_Done)
****************** Errors ******************
VAD-11: 0 _ 1
VAD'-11: 1 _ 0
VAD'-4: 0 _ 1
VAD'-0: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 255 #$Opcode 124 #NCurPc: 14
D1: Int/14 D2: XType/1073741586 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-31: 1 _ 0
D1-29: 1 _ 0
D1-28: 1 _ 0
D1-27: 1 _ 0
D1-26: 1 _ 0
D1-25: 1 _ 0
D1-24: 1 _ 0
D1-23: 1 _ 0
D1-22: 1 _ 0
D1-21: 1 _ 0
D1-20: 1 _ 0
D1-19: 1 _ 0
D1-18: 1 _ 0
D1-17: 1 _ 0
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-0: 1 _ 0
VAD-11: 0 _ 1
VAD'-11: 1 _ 0
VAD'-4: 0 _ 1
VAD'-0: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 255 #$Opcode 255 #NCurPc: 14
D1: Int/1073741823 D2: -- Tos: 18 RegAddr: 0
New Opcode: 255 Length: 0 Data: Object/0 N: 255 PC: 14 OldOpLength: 0
Executing uInst: loadibuf:209
#MIR: (Label_LoadIBuf Cycle_R4 RD1addr_PcAddr W2addr_IBufD2PcD1 EUop_+16 Tag_Int 
Misc_ResetInitialRefill CondCode_NoFault NextInstA_Done NextInstB_IBufPageFault)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010010 $Opcode: 255 #$Opcode 255 #NCurPc: 14
D1: Int/0 D2: Code/100663424 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010001 $Opcode: 255 #$Opcode 255 #NCurPc: 14
D1: Int/16 D2: Ptr-63/133693439 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010000 $Opcode: 255 #$Opcode 255 #NCurPc: 14
D1: -- D2: XType/801043291 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011000 $Opcode: 255 #$Opcode 255 #NCurPc: 14
D1: -- D2: XType/939523823 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010100 $Opcode: 255 #$Opcode 255 #NCurPc: 14
D1: -- D2: XType/1046321139 Tos: 18 RegAddr: 0
New Opcode: 255 Length: 0 Data: Object/0 N: 255 PC: 14 OldOpLength: 0
Executing uInst: loadibuf:209
#MIR: (Label_LoadIBuf Cycle_R4 RD1addr_PcAddr W2addr_IBufD2PcD1 EUop_+16 Tag_Int 
Misc_ResetInitialRefill CondCode_NoFault NextInstA_Done NextInstB_IBufPageFault)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010010 $Opcode: 255 #$Opcode 255 #NCurPc: 14
D1: Int/16 D2: Code/100663424 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010001 $Opcode: 255 #$Opcode 255 #NCurPc: 14
D1: Int/32 D2: XType/1052630751 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010000 $Opcode: 255 #$Opcode 255 #NCurPc: 14
D1: -- D2: XType/996638711 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011000 $Opcode: 56 #$Opcode 255 #NCurPc: 14
D1: -- D2: Int/1072168443 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010100 $Opcode: 56 #$Opcode 56 #NCurPc: 14
D1: -- D2: XType/1054604287 Tos: 18 RegAddr: 0
New Opcode: 56 Length: 4 Data: Object/2097216 N: 64 PC: 14 OldOpLength: 4
Executing uInst: gvar:56
#MIR: (Label_GVar EUop_+ Tag_Int RD1addr_IBufData RD2addr_MuxRdSel MuxRdSel_K K_ValueCellOffset 
W2addr_MarD1)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 26 #$Opcode 56 #NCurPc: 18
D1: Object/2097216 D2: Object/1 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 26 #$Opcode 56 #NCurPc: 18
D1: Int/2097217 D2: -- Tos: 18 RegAddr: 0
Executing uInst: LAB0002:60
#MIR: (Cycle_R1 W2addr_MarMem CondCode_NoFault NextInstB_PageFault)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 26 #$Opcode 56 #NCurPc: 18
D1: Code/100663360 D2: Code/100663424 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010000 $Opcode: 26 #$Opcode 56 #NCurPc: 18
D1: -- D2: Int/17 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 26 #$Opcode 56 #NCurPc: 18
D1: Code/100663360 D2: Code/100663424 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 26 #$Opcode 56 #NCurPc: 18
D1: Int/1073741823 D2: Int/5 Tos: 18 RegAddr: 0
Executing uInst: LAB0003:61
#MIR: (EUop_D1 Tag_D1 RD1addr_Mar Waddr_Tos' Tos'_Tos+1 NewTos_Tos' CondCode_Boundp Cwrite 
NextInstA_Done NextInstB_Ufn-0d)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 26 #$Opcode 56 #NCurPc: 18
D1: Int/5 D2: Code/100663424 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 26 #$Opcode 26 #NCurPc: 18
D1: Int/5 D2: -- Tos: 19 RegAddr: 0
New Opcode: 26 Length: 1 Data: Object/0 N: 68 PC: 18 OldOpLength: 1
Executing uInst: '1:26
#MIR: (Label_'1 EUop_D2 Tag_Int RD2addr_MuxRdSel MuxRdSel_K K_1 Waddr_Tos' Tos'_Tos+1 NewTos_Tos' 
NextInstA_Done)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 68 #$Opcode 26 #NCurPc: 19
D1: Int/5 D2: Object/1 Tos: 19 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 68 #$Opcode 68 #NCurPc: 19
D1: Int/1 D2: -- Tos: 20 RegAddr: 0
New Opcode: 68 Length: 1 Data: Object/0 N: 57 PC: 19 OldOpLength: 1
Executing uInst: plus:213
#MIR: (Label_Plus EUop_+ Tag_Int Raddr_Tos RD2addr_Raddr-1 W2addr_Tmp1D1 CondCode_IntegerD1D2 
NextInstB_Ufn-2)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 57 #$Opcode 68 #NCurPc: 20
D1: Int/1 D2: Int/5 Tos: 20 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 57 #$Opcode 68 #NCurPc: 20
D1: Int/6 D2: -- Tos: 20 RegAddr: 0
Executing uInst: LAB0019:228
#MIR: (EUop_D2 Tag_Int RD2addr_Tmp1 Waddr_Tos' Tos'_Tos-1 NewTos_Tos' CondCode_NoOverflow CWrite 
NextInstA_Done NextInstB_Ufn-2)
****************** Errors ******************
D1-2: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 57 #$Opcode 68 #NCurPc: 20
D1: Int/1 D2: Int/6 Tos: 20 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 57 #$Opcode 57 #NCurPc: 20
D1: Int/6 D2: -- Tos: 19 RegAddr: 0
New Opcode: 57 Length: 0 Data: Object/0 N: 64 PC: 20 OldOpLength: 0
Executing uInst: loadibuf:209
#MIR: (Label_LoadIBuf Cycle_R4 RD1addr_PcAddr W2addr_IBufD2PcD1 EUop_+16 Tag_Int 
Misc_ResetInitialRefill CondCode_NoFault NextInstA_Done NextInstB_IBufPageFault)
****************** Errors ******************
D1-2: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010010 $Opcode: 57 #$Opcode 57 #NCurPc: 20
D1: Int/32 D2: Code/100663360 Tos: 19 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010001 $Opcode: 57 #$Opcode 57 #NCurPc: 20
D1: Int/48 D2: XType/987200381 Tos: 19 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010000 $Opcode: 57 #$Opcode 57 #NCurPc: 20
D1: -- D2: Int/1072160763 Tos: 19 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011000 $Opcode: 57 #$Opcode 57 #NCurPc: 20
D1: -- D2: XType/1054604287 Tos: 19 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010100 $Opcode: 57 #$Opcode 57 #NCurPc: 20
D1: -- D2: XType/987200351 Tos: 19 RegAddr: 0
New Opcode: 57 Length: 4 Data: Object/2097216 N: 64 PC: 20 OldOpLength: 4
Executing uInst: gvar_:57
#MIR: (Label_GVar_ EUop_+ Tag_Int RD1addr_IBufData RD2addr_MuxRdSel MuxRdSel_K K_ValueCellOffset 
W2addr_MarD1)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 144 #$Opcode 57 #NCurPc: 24
D1: Object/2097216 D2: Object/1 Tos: 19 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 144 #$Opcode 57 #NCurPc: 24
D1: Int/2097217 D2: -- Tos: 19 RegAddr: 0
Executing uInst: refcountstore:215
#MIR: (Label_RefCountStore Cycle_R1 Waddr_K WCxt_K K_Decref CondCode_NoFault NextInstB_PageFault)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 144 #$Opcode 57 #NCurPc: 24
D1: Int/6 D2: Code/100663360 Tos: 19 RegAddr: 0
****************** Errors ******************
D1-2: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 144 #$Opcode 57 #NCurPc: 24
D1: Int/1073741823 D2: Int/5 Tos: 19 RegAddr: 0
Executing uInst: LAB0004:62
#MIR: (Cycle_W1 Dswap Raddr_Tos CondCode_NoFault NextInstB_PageFault)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 144 #$Opcode 57 #NCurPc: 24
D1: Code/100663360 D2: Int/6 Tos: 19 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011000 $Opcode: 144 #$Opcode 57 #NCurPc: 24
D1: -- D2: -- Tos: 19 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010100 $Opcode: 144 #$Opcode 57 #NCurPc: 24
D1: -- D2: -- Tos: 19 RegAddr: 0
Executing uInst: pagefault:212
#MIR: (Label_PageFault EUop_D1 Tag_Int RD1addr_Mar Waddr_Tos' Tos'_Tos+1 NewTos_Tos' NewArg_K K_1 
Misc_OpLength=0 CondCode_FramesAvail Cwrite NextInstB_DumpFrame)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 144 #$Opcode 57 #NCurPc: 24
D1: Int/2097217 D2: Code/100663360 Tos: 19 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 144 #$Opcode 57 #NCurPc: 24
D1: Int/2097217 D2: -- Tos: 20 RegAddr: 0
Executing uInst: LAB0072:146
#MIR: (EUop_D1 Tag_D1 Raddr_K K_PFCode RCxt_K W2addr_MarD1 NextInstA_Fn1)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 57 #$Opcode 57 #NCurPc: 20
D1: Code/100663424 D2: -- Tos: 20 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 57 #$Opcode 57 #NCurPc: 20
D1: Code/100663424 D2: -- Tos: 20 RegAddr: 0
Executing uInst: fn1:197
#MIR: (Label_Fn1 EUop_+4 Tag_D1 RD1addr_Mar W2addr_MarD1 NewArg2_Arg NewArg_K K_StkHdr CondCode_CCodeP
 NextInstB_Fn5)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 57 #$Opcode 57 #NCurPc: 20
D1: Code/100663424 D2: Int/6 Tos: 20 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 57 #$Opcode 57 #NCurPc: 20
D1: Code/100663428 D2: -- Tos: 20 RegAddr: 0
Executing uInst: LAB0041:115
#MIR: (Cycle_R4 WCxt_Next Waddr_Arg<6>/QW<2> EUop_+4 Tag_D1 RD1addr_Mar W2addr_MarD1 CondCode_NoFault 
NextInstB_PageFault)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010010 $Opcode: 57 #$Opcode 57 #NCurPc: 20
D1: Code/100663428 D2: Int/6 Tos: 20 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010001 $Opcode: 57 #$Opcode 57 #NCurPc: 20
D1: Code/100663432 D2: Int/16 Tos: 20 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010000 $Opcode: 57 #$Opcode 57 #NCurPc: 20
D1: -- D2: Int/0 Tos: 20 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011000 $Opcode: 57 #$Opcode 57 #NCurPc: 20
D1: -- D2: Code/100663424 Tos: 20 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010100 $Opcode: 57 #$Opcode 57 #NCurPc: 20
D1: -- D2: Code/100663424 Tos: 20 RegAddr: 0
Executing uInst: LAB0042:116
#MIR: (EUop_D2 Tag_D2 RD2addr_Unbound Waddr_K K_PVar WCxt_Next Misc_WriteOctal NewArg_Arg2)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 57 #$Opcode 57 #NCurPc: 20
D1: Int/2097217 D2: Ptr-32/0 Tos: 20 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 57 #$Opcode 57 #NCurPc: 20
D1: Ptr-32/0 D2: -- Tos: 20 RegAddr: 0
Executing uInst: fn2:198
#MIR: (Label_Fn2 EUop_D2 Tag_D2 RD2addr_Nil Waddr_K K_IVar WCxt_Next Misc_WriteOctal)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 57 #$Opcode 57 #NCurPc: 20
D1: Int/2097217 D2: Atm/3584 Tos: 20 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 57 #$Opcode 57 #NCurPc: 20
D1: Atm/3584 D2: -- Tos: 20 RegAddr: 0
Executing uInst: LAB0043:117
#MIR: (EUop_D2 Tag_Int RD2addr_PC Waddr_K K_Pc Misc_Oplength=0&SetInitialRefill)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 57 #$Opcode 57 #NCurPc: 20
D1: Int/2097217 D2: Int/20 Tos: 20 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 57 #$Opcode 57 #NCurPc: 20
D1: Int/20 D2: -- Tos: 20 RegAddr: 0
Executing uInst: LAB0044:118
#MIR: (EUop_+ Tag_Int RD1addr_Mar RD2addr_MuxRdSel MuxRdSel_Arg W2Addr_MarD1)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 57 #$Opcode 57 #NCurPc: 20
D1: Code/100663432 D2: Object/1 Tos: 20 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 57 #$Opcode 57 #NCurPc: 20
D1: Int/100663433 D2: -- Tos: 20 RegAddr: 0
Executing uInst: LAB0045:119
#MIR: (Cycle_R1 Waddr_K WCxt_Next K_Pc)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 57 #$Opcode 57 #NCurPc: 20
D1: Int/2097217 D2: Int/6 Tos: 20 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 57 #$Opcode 57 #NCurPc: 20
D1: Int/1073741823 D2: Int/560 Tos: 20 RegAddr: 0
Executing uInst: LAB0046:120
#MIR: (EUop_D1 Tag_Int Raddr_K RCxt_Next K_PC W2addr_PCD1)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 57 #$Opcode 57 #NCurPc: 20
D1: Int/560 D2: Int/16 Tos: 20 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 57 #$Opcode 57 #NCurPc: 20
D1: Int/560 D2: -- Tos: 20 RegAddr: 0
Executing uInst: LAB0047:121
#MIR: (EUop_D2 Tag_Int RD2addr_MuxRdSel MuxRdSel_K K_Ivar NewArg2_K W2addr_MarD1 NewArg_Arg' 
Arg'_Arg-1 CondCode_Arg#0 NextInstB_Fn3)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 0 #$Opcode 57 #NCurPc: 16
D1: Int/2097217 D2: Object/8 Tos: 20 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 0 #$Opcode 57 #NCurPc: 16
D1: Int/8 D2: -- Tos: 20 RegAddr: 0
Executing uInst: LAB0048:122
#MIR: (EUop_+ Tag_Int RD1addr_Mar RD2addr_MuxRdSel MuxRdSel_Arg W2addr_Tmp1D1)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 0 #$Opcode 57 #NCurPc: 16
D1: Int/8 D2: Object/0 Tos: 20 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 0 #$Opcode 57 #NCurPc: 16
D1: Int/8 D2: -- Tos: 20 RegAddr: 0
Executing uInst: LAB0049:123
#MIR: (RD2addr_Tmp1 NewArg_D2)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 0 #$Opcode 57 #NCurPc: 16
D1: Int/2097217 D2: Int/8 Tos: 20 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 0 #$Opcode 57 #NCurPc: 16
D1: Int/1073741823 D2: -- Tos: 20 RegAddr: 0
Executing uInst: LAB0050:124
#MIR: (EUop_D1 Tag_D1 Raddr_Tos WCxt_Next Waddr_Arg NewTos_Tos' Tos'_Tos-1 NewArg_Arg' Arg'_Arg-1 
CondCode_Arg=Arg2 NextInstB_Rpt)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 0 #$Opcode 57 #NCurPc: 16
D1: Int/2097217 D2: Int/6 Tos: 20 RegAddr: 0
****************** Errors ******************
#CONDA: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 0 #$Opcode 57 #NCurPc: 16
D1: Int/2097217 D2: -- Tos: 19 RegAddr: 0
Executing uInst: fn3:199
#MIR: (Label_Fn3 EUop_D1<24>/D2<8> Tag_D1 RD2addr_MuxRdSel MuxRdSel_Tos Raddr_K Waddr_K K_StkHdr)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 0 #$Opcode 57 #NCurPc: 16
D1: XType/1073741586 D2: Object/19 Tos: 19 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 0 #$Opcode 57 #NCurPc: 16
D1: XType/1073741587 D2: -- Tos: 19 RegAddr: 0
Executing uInst: LAB0051:125
#MIR: (EUop_D2 Tag_D2 Dswap Raddr_K K_StkHdr RCxt_Next WCxt_Next NewTos_D2 NewTopCxt_Next 
NextInstA_Done)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 0 #$Opcode 57 #NCurPc: 16
D1: -- D2: Int/16 Tos: 19 RegAddr: 0
****************** Errors ******************
D1-31: 0 _ 1
D1-29: 0 _ 1
D1-28: 0 _ 1
D1-27: 0 _ 1
D1-26: 0 _ 1
D1-25: 0 _ 1
D1-24: 0 _ 1
D1-23: 0 _ 1
D1-22: 0 _ 1
D1-21: 0 _ 1
D1-20: 0 _ 1
D1-19: 0 _ 1
D1-18: 0 _ 1
D1-17: 0 _ 1
D1-16: 0 _ 1
D1-15: 0 _ 1
D1-14: 0 _ 1
D1-13: 0 _ 1
D1-12: 0 _ 1
D1-11: 0 _ 1
D1-10: 0 _ 1
D1-9: 0 _ 1
D1-8: 0 _ 1
D1-7: 0 _ 1
D1-6: 0 _ 1
D1-5: 0 _ 1
D1-3: 0 _ 1
D1-2: 0 _ 1
D1-1: 0 _ 1
D1-0: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 0 #$Opcode 0 #NCurPc: 16
D1: Int/16 D2: -- Tos: 16 RegAddr: 0
New Opcode: 0 Length: 0 Data: Object/0 N: 32 PC: 16 OldOpLength: 0
Executing uInst: loadibuf:209
#MIR: (Label_LoadIBuf Cycle_R4 RD1addr_PcAddr W2addr_IBufD2PcD1 EUop_+16 Tag_Int 
Misc_ResetInitialRefill CondCode_NoFault NextInstA_Done NextInstB_IBufPageFault)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010010 $Opcode: 0 #$Opcode 0 #NCurPc: 16
D1: Int/560 D2: Atm/3584 Tos: 16 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010001 $Opcode: 0 #$Opcode 0 #NCurPc: 16
D1: Int/576 D2: List/80235720 Tos: 16 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010000 $Opcode: 0 #$Opcode 0 #NCurPc: 16
D1: -- D2: Int/862283366 Tos: 16 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011000 $Opcode: 200 #$Opcode 0 #NCurPc: 16
D1: -- D2: XType/1069448763 Tos: 16 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010100 $Opcode: 200 #$Opcode 200 #NCurPc: 16
D1: -- D2: XType/526176237 Tos: 16 RegAddr: 0
New Opcode: 200 Length: 1 Data: Object/0 N: 145 PC: 16 OldOpLength: 1
Executing uInst: vark:233
#MIR: (Label_Vark EUop_D1 Tag_D1 Raddr_0<4>/OpCode<4> Waddr_Tos' Tos'_Tos+1 NewTos_Tos' NextInstA_Done
)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 145 #$Opcode 200 #NCurPc: 17
D1: Int/2097217 D2: -- Tos: 16 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 145 #$Opcode 145 #NCurPc: 17
D1: Int/2097217 D2: -- Tos: 17 RegAddr: 0
New Opcode: 145 Length: 5 Data: Int/16777215 N: 255 PC: 17 OldOpLength: 5
Executing uInst: intconst:81
#MIR: (Label_IntConst EUop_D1 Tag_Int RD1addr_IBufData Waddr_TOS' TOS'_TOS+1 NewTos_Tos' 
NextInstA_Done)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 16 #$Opcode 145 #NCurPc: 22
D1: Int/16777215 D2: Ptr-32/0 Tos: 17 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 16 #$Opcode 16 #NCurPc: 22
D1: Int/16777215 D2: -- Tos: 18 RegAddr: 0
New Opcode: 16 Length: 0 Data: Object/0 N: 47 PC: 22 OldOpLength: 0
Executing uInst: loadibuf:209
#MIR: (Label_LoadIBuf Cycle_R4 RD1addr_PcAddr W2addr_IBufD2PcD1 EUop_+16 Tag_Int 
Misc_ResetInitialRefill CondCode_NoFault NextInstA_Done NextInstB_IBufPageFault)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010010 $Opcode: 16 #$Opcode 16 #NCurPc: 22
D1: Int/576 D2: Int/2097217 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010001 $Opcode: 16 #$Opcode 16 #NCurPc: 22
D1: Int/592 D2: XType/1071816350 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010000 $Opcode: 16 #$Opcode 16 #NCurPc: 22
D1: -- D2: Float/1073477457 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011000 $Opcode: 16 #$Opcode 16 #NCurPc: 22
D1: -- D2: XType/1004404446 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010100 $Opcode: 16 #$Opcode 16 #NCurPc: 22
D1: -- D2: Int/1073217523 Tos: 18 RegAddr: 0
New Opcode: 16 Length: 1 Data: Object/0 N: 47 PC: 22 OldOpLength: 1
Executing uInst: and:16
#MIR: (Label_And EUop_And Tag_Int Raddr_Tos RD2addr_Raddr-1 Waddr_Tos' Tos'_Tos-1 NewTos_Tos' 
CondCode_IntegerD1D2 CWrite NextInstA_Done NextInstB_Ufn-2)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 47 #$Opcode 16 #NCurPc: 23
D1: Int/16777215 D2: Int/2097217 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 47 #$Opcode 47 #NCurPc: 23
D1: Int/2097217 D2: -- Tos: 17 RegAddr: 0
New Opcode: 47 Length: 2 Data: Object/10 N: 10 PC: 23 OldOpLength: 2
Executing uInst: lrsh.n:228
#MIR: (Label_Lrsh.N EUop_D1 Tag_Int Raddr_Tos W2addr_MarD1 NewArg_IBufN CondCode_Integerp 
NextInstB_Ufn-1d)
****************** Errors ******************
D1-23: 1 _ 0
D1-22: 1 _ 0
D1-20: 1 _ 0
D1-19: 1 _ 0
D1-18: 1 _ 0
D1-17: 1 _ 0
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/2097217 D2: Ptr-32/0 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-23: 1 _ 0
D1-22: 1 _ 0
D1-20: 1 _ 0
D1-19: 1 _ 0
D1-18: 1 _ 0
D1-17: 1 _ 0
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/2097217 D2: -- Tos: 17 RegAddr: 0
Executing uInst: LAB0031:105
#MIR: (Arg'_Arg-1 NewArg_Arg' CondCode_Arg=0 NextInstA_Done)
****************** Errors ******************
D1-23: 1 _ 0
D1-22: 1 _ 0
D1-20: 1 _ 0
D1-19: 1 _ 0
D1-18: 1 _ 0
D1-17: 1 _ 0
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-11: 1 _ 0
VAD-10: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-11: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/2097217 D2: Ptr-32/0 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-23: 1 _ 0
D1-22: 1 _ 0
D1-20: 1 _ 0
D1-19: 1 _ 0
D1-18: 1 _ 0
D1-17: 1 _ 0
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-11: 1 _ 0
VAD-10: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-11: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/1073741823 D2: -- Tos: 17 RegAddr: 0
Executing uInst: LAB0032:106
#MIR: (EUop_Rshft1 Tag_Int Raddr_Tos Waddr_Tos NewArg_Arg' Arg'_Arg-1 CondCode_Arg=0 NextInstA_Done 
NextInstB_Rpt)
****************** Errors ******************
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-11: 1 _ 0
VAD-10: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-11: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/2097217 D2: Ptr-32/0 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-23: 1 _ 0
D1-22: 1 _ 0
D1-20: 1 _ 0
D1-19: 1 _ 0
D1-18: 1 _ 0
D1-17: 1 _ 0
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-11: 1 _ 0
VAD-10: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-11: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/1048608 D2: -- Tos: 17 RegAddr: 0
Executing uInst: LAB0032:106
#MIR: (EUop_Rshft1 Tag_Int Raddr_Tos Waddr_Tos NewArg_Arg' Arg'_Arg-1 CondCode_Arg=0 NextInstA_Done 
NextInstB_Rpt)
****************** Errors ******************
D1-22: 1 _ 0
D1-21: 1 _ 0
D1-19: 1 _ 0
D1-18: 1 _ 0
D1-17: 1 _ 0
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-11: 1 _ 0
VAD-10: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-11: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/1048608 D2: Ptr-32/0 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-22: 1 _ 0
D1-21: 1 _ 0
D1-19: 1 _ 0
D1-18: 1 _ 0
D1-17: 1 _ 0
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-11: 1 _ 0
VAD-10: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-11: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/524304 D2: -- Tos: 17 RegAddr: 0
Executing uInst: LAB0032:106
#MIR: (EUop_Rshft1 Tag_Int Raddr_Tos Waddr_Tos NewArg_Arg' Arg'_Arg-1 CondCode_Arg=0 NextInstA_Done 
NextInstB_Rpt)
****************** Errors ******************
D1-21: 1 _ 0
D1-20: 1 _ 0
D1-18: 1 _ 0
D1-17: 1 _ 0
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-11: 1 _ 0
VAD-10: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-11: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/524304 D2: Ptr-32/0 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-21: 1 _ 0
D1-20: 1 _ 0
D1-18: 1 _ 0
D1-17: 1 _ 0
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-11: 1 _ 0
VAD-10: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-11: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/262152 D2: -- Tos: 17 RegAddr: 0
Executing uInst: LAB0032:106
#MIR: (EUop_Rshft1 Tag_Int Raddr_Tos Waddr_Tos NewArg_Arg' Arg'_Arg-1 CondCode_Arg=0 NextInstA_Done 
NextInstB_Rpt)
****************** Errors ******************
D1-20: 1 _ 0
D1-19: 1 _ 0
D1-17: 1 _ 0
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-11: 1 _ 0
VAD-10: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-11: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/262152 D2: Ptr-32/0 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-20: 1 _ 0
D1-19: 1 _ 0
D1-17: 1 _ 0
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-11: 1 _ 0
VAD-10: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-11: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/131076 D2: -- Tos: 17 RegAddr: 0
Executing uInst: LAB0032:106
#MIR: (EUop_Rshft1 Tag_Int Raddr_Tos Waddr_Tos NewArg_Arg' Arg'_Arg-1 CondCode_Arg=0 NextInstA_Done 
NextInstB_Rpt)
****************** Errors ******************
D1-19: 1 _ 0
D1-18: 1 _ 0
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-11: 1 _ 0
VAD-10: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-11: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/131076 D2: Ptr-32/0 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-19: 1 _ 0
D1-18: 1 _ 0
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-11: 1 _ 0
VAD-10: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-11: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/65538 D2: -- Tos: 17 RegAddr: 0
Executing uInst: LAB0032:106
#MIR: (EUop_Rshft1 Tag_Int Raddr_Tos Waddr_Tos NewArg_Arg' Arg'_Arg-1 CondCode_Arg=0 NextInstA_Done 
NextInstB_Rpt)
****************** Errors ******************
D1-18: 1 _ 0
D1-17: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-11: 1 _ 0
VAD-10: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-11: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/65538 D2: Ptr-32/0 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-18: 1 _ 0
D1-17: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-11: 1 _ 0
VAD-10: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-11: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/32769 D2: -- Tos: 17 RegAddr: 0
Executing uInst: LAB0032:106
#MIR: (EUop_Rshft1 Tag_Int Raddr_Tos Waddr_Tos NewArg_Arg' Arg'_Arg-1 CondCode_Arg=0 NextInstA_Done 
NextInstB_Rpt)
****************** Errors ******************
D1-17: 1 _ 0
D1-16: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-11: 1 _ 0
VAD-10: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-11: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/32769 D2: Ptr-32/0 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-17: 1 _ 0
D1-16: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-11: 1 _ 0
VAD-10: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-11: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/16384 D2: -- Tos: 17 RegAddr: 0
Executing uInst: LAB0032:106
#MIR: (EUop_Rshft1 Tag_Int Raddr_Tos Waddr_Tos NewArg_Arg' Arg'_Arg-1 CondCode_Arg=0 NextInstA_Done 
NextInstB_Rpt)
****************** Errors ******************
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-11: 1 _ 0
VAD-10: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-11: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/16384 D2: Ptr-32/0 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-11: 1 _ 0
VAD-10: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-11: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/8192 D2: -- Tos: 17 RegAddr: 0
Executing uInst: LAB0032:106
#MIR: (EUop_Rshft1 Tag_Int Raddr_Tos Waddr_Tos NewArg_Arg' Arg'_Arg-1 CondCode_Arg=0 NextInstA_Done 
NextInstB_Rpt)
****************** Errors ******************
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-11: 1 _ 0
VAD-10: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-11: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/8192 D2: Ptr-32/0 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-11: 1 _ 0
VAD-10: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-11: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/4096 D2: -- Tos: 17 RegAddr: 0
Executing uInst: LAB0032:106
#MIR: (EUop_Rshft1 Tag_Int Raddr_Tos Waddr_Tos NewArg_Arg' Arg'_Arg-1 CondCode_Arg=0 NextInstA_Done 
NextInstB_Rpt)
****************** Errors ******************
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-11: 1 _ 0
VAD-10: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-11: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/4096 D2: Ptr-32/0 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-11: 1 _ 0
VAD-10: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-11: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 35 #$Opcode 35 #NCurPc: 25
D1: Int/2048 D2: -- Tos: 17 RegAddr: 0
New Opcode: 35 Length: 2 Data: Object/0 N: 0 PC: 25 OldOpLength: 2
Executing uInst: settype:35
#MIR: (Label_SetType EUop_D2<2>Shl24/D1<30> Tag_D2<8:7> Raddr_Tos RD2addr_MuxRdSel MuxRdSel_IBufN 
Waddr_Tos NextInstA_Done)
****************** Errors ******************
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 20 #$Opcode 35 #NCurPc: 27
D1: Int/2048 D2: Object/0 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 20 #$Opcode 20 #NCurPc: 27
D1: Object/2048 D2: -- Tos: 17 RegAddr: 0
New Opcode: 20 Length: 1 Data: Object/0 N: 32 PC: 27 OldOpLength: 1
Executing uInst: copy:20
#MIR: (Label_Copy EUop_D1 Tag_D1 Raddr_Tos Waddr_Tos' Tos'_Tos+1 NewTos_Tos' NextInstA_Done)
****************** Errors ******************
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 32 #$Opcode 20 #NCurPc: 28
D1: Object/2048 D2: Ptr-32/0 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 32 #$Opcode 32 #NCurPc: 28
D1: Object/2048 D2: -- Tos: 18 RegAddr: 0
New Opcode: 32 Length: 2 Data: Object/0 N: 0 PC: 28 OldOpLength: 2
Executing uInst: getptr:32
#MIR: (Label_Getptr EUop_+ Tag_D2 Dswap Raddr_Tos RD1addr_IBufData W2addr_MarD1 Condcode_PointerpD2 
NextInstB_Ufn-1d)
****************** Errors ******************
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 185 #$Opcode 32 #NCurPc: 30
D1: Object/0 D2: Object/2048 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 185 #$Opcode 32 #NCurPc: 30
D1: Object/2048 D2: -- Tos: 18 RegAddr: 0
Executing uInst: LAB0033:65
#MIR: (Cycle_R1 Waddr_Tos CondCode_NoFault Cwrite NextInstA_Done NextInstB_PageFault)
****************** Errors ******************
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-10: 1 _ 0
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-6: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
VAD'-0: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 185 #$Opcode 32 #NCurPc: 30
D1: Object/2048 D2: Object/2048 Tos: 18 RegAddr: 0
****************** Errors ******************
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-10: 1 _ 0
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-6: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
VAD'-0: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 185 #$Opcode 185 #NCurPc: 30
D1: Int/1073741823 D2: Int/17 Tos: 18 RegAddr: 0
New Opcode: 185 Length: 1 Data: Object/0 N: 26 PC: 30 OldOpLength: 1
Executing uInst: vark_:234
#MIR: (Label_Vark_ EUop_D1 Tag_D1 Raddr_Tos Waddr_0<4>/OpCode<4> NextInstA_Done)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 26 #$Opcode 185 #NCurPc: 31
D1: Int/17 D2: Object/2048 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 26 #$Opcode 26 #NCurPc: 31
D1: Int/17 D2: -- Tos: 18 RegAddr: 0
New Opcode: 26 Length: 1 Data: Object/0 N: 16 PC: 31 OldOpLength: 1
Executing uInst: '1:26
#MIR: (Label_'1 EUop_D2 Tag_Int RD2addr_MuxRdSel MuxRdSel_K K_1 Waddr_Tos' Tos'_Tos+1 NewTos_Tos' 
NextInstA_Done)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 16 #$Opcode 26 #NCurPc: 0
D1: Int/17 D2: Object/1 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 16 #$Opcode 16 #NCurPc: 0
D1: Int/1 D2: -- Tos: 19 RegAddr: 0
New Opcode: 16 Length: 1 Data: Object/0 N: 26 PC: 0 OldOpLength: 1
Executing uInst: and:16
#MIR: (Label_And EUop_And Tag_Int Raddr_Tos RD2addr_Raddr-1 Waddr_Tos' Tos'_Tos-1 NewTos_Tos' 
CondCode_IntegerD1D2 CWrite NextInstA_Done NextInstB_Ufn-2)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 26 #$Opcode 16 #NCurPc: 1
D1: Int/1 D2: Int/17 Tos: 19 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 26 #$Opcode 26 #NCurPc: 1
D1: Int/1 D2: -- Tos: 18 RegAddr: 0
New Opcode: 26 Length: 1 Data: Object/0 N: 10 PC: 1 OldOpLength: 1
Executing uInst: '1:228
#MIR: (Label_'1 EUop_D2 Tag_Int RD2addr_MuxRdSel MuxRdSel_K K_1 Waddr_Tos' Tos'_Tos+1 NewTos_Tos' 
NextInstA_Done)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 10 #$Opcode 26 #NCurPc: 2
D1: Int/1 D2: Object/1 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 10 #$Opcode 10 #NCurPc: 2
D1: Int/1 D2: -- Tos: 19 RegAddr: 0
New Opcode: 10 Length: 1 Data: Object/0 N: 53 PC: 2 OldOpLength: 1
Executing uInst: eq:10
#MIR: (Label_Eq Raddr_Tos RD2addr_Raddr-1 Tos'_Tos-1 NewTos_Tos' CondCode_D1=D2 NextInstA_SetT 
NextInstB_SetNil)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 53 #$Opcode 10 #NCurPc: 3
D1: Int/1 D2: Int/1 Tos: 19 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 53 #$Opcode 10 #NCurPc: 3
D1: Int/1073741823 D2: -- Tos: 18 RegAddr: 0
Executing uInst: sett:222
#MIR: (Label_SetT EUop_D2 Tag_D2 RD2addr_T Waddr_Tos NextInstA_Done)
****************** Errors ******************
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-10: 1 _ 0
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-6: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
VAD'-0: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 53 #$Opcode 10 #NCurPc: 3
D1: Int/1 D2: Atm/3600 Tos: 18 RegAddr: 0
****************** Errors ******************
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-10: 1 _ 0
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-6: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
VAD'-0: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 53 #$Opcode 53 #NCurPc: 3
D1: Atm/3600 D2: -- Tos: 18 RegAddr: 0
New Opcode: 53 Length: 2 Data: Object/7 N: 7 PC: 3 OldOpLength: 2
Executing uInst: fjump:53
#MIR: (Label_FJump EUop_nop Raddr_Tos Tos'_Tos-1 NewTos_Tos' Rd2addr_Nil Condcode_D1#D2 NextInstA_Done
 NextInstB_DoJmp)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 145 #$Opcode 53 #NCurPc: 5
D1: Atm/3600 D2: Atm/3584 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 145 #$Opcode 145 #NCurPc: 5
D1: Int/1073741823 D2: -- Tos: 17 RegAddr: 0
New Opcode: 145 Length: 0 Data: Object/0 N: 3 PC: 5 OldOpLength: 0
Executing uInst: loadibuf:209
#MIR: (Label_LoadIBuf Cycle_R4 RD1addr_PcAddr W2addr_IBufD2PcD1 EUop_+16 Tag_Int 
Misc_ResetInitialRefill CondCode_NoFault NextInstA_Done NextInstB_IBufPageFault)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010010 $Opcode: 145 #$Opcode 145 #NCurPc: 5
D1: Int/592 D2: Ptr-32/0 Tos: 17 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010001 $Opcode: 145 #$Opcode 145 #NCurPc: 5
D1: Int/608 D2: Float/871219192 Tos: 17 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010000 $Opcode: 145 #$Opcode 145 #NCurPc: 5
D1: -- D2: XType/747145454 Tos: 17 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011000 $Opcode: 145 #$Opcode 145 #NCurPc: 5
D1: -- D2: Object/0 Tos: 17 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010100 $Opcode: 145 #$Opcode 145 #NCurPc: 5
D1: -- D2: Object/0 Tos: 17 RegAddr: 0
New Opcode: 145 Length: 5 Data: Int/3 N: 3 PC: 5 OldOpLength: 5
Executing uInst: intconst:81
#MIR: (Label_IntConst EUop_D1 Tag_Int RD1addr_IBufData Waddr_TOS' TOS'_TOS+1 NewTos_Tos' 
NextInstA_Done)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 50 #$Opcode 145 #NCurPc: 10
D1: Int/3 D2: Ptr-32/0 Tos: 17 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 50 #$Opcode 50 #NCurPc: 10
D1: Int/3 D2: -- Tos: 18 RegAddr: 0
New Opcode: 50 Length: 2 Data: Object/5 N: 5 PC: 10 OldOpLength: 2
Executing uInst: dojmp:50
#MIR: (Label_DoJmp EUop_+ Tag_Int RD2addr_PC RD1addr_IBufData W2addr_PCD1 
Misc_Oplength=0&SetInitialRefill NextInstA_Dojmp1)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 145 #$Opcode 50 #NCurPc: 12
D1: Object/5 D2: Int/588 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 145 #$Opcode 50 #NCurPc: 12
D1: Int/593 D2: -- Tos: 18 RegAddr: 0
Executing uInst: dojmp1:193
#MIR: (Label_DoJmp1 NextInstA_Done)
****************** Errors ******************
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-10: 1 _ 0
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-6: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
VAD'-0: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 201 #$Opcode 50 #NCurPc: 17
D1: Int/3 D2: Object/2048 Tos: 18 RegAddr: 0
****************** Errors ******************
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-10: 1 _ 0
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-6: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
VAD'-0: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 201 #$Opcode 201 #NCurPc: 17
D1: Int/1073741823 D2: -- Tos: 18 RegAddr: 0
New Opcode: 201 Length: 0 Data: Object/0 N: 17 PC: 17 OldOpLength: 0
Executing uInst: loadibuf:209
#MIR: (Label_LoadIBuf Cycle_R4 RD1addr_PcAddr W2addr_IBufD2PcD1 EUop_+16 Tag_Int 
Misc_ResetInitialRefill CondCode_NoFault NextInstA_Done NextInstB_IBufPageFault)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010010 $Opcode: 201 #$Opcode 201 #NCurPc: 17
D1: Int/592 D2: Object/2048 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010001 $Opcode: 201 #$Opcode 201 #NCurPc: 17
D1: Int/608 D2: Float/871219192 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010000 $Opcode: 201 #$Opcode 201 #NCurPc: 17
D1: -- D2: XType/747145454 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011000 $Opcode: 201 #$Opcode 201 #NCurPc: 17
D1: -- D2: Object/0 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010100 $Opcode: 201 #$Opcode 201 #NCurPc: 17
D1: -- D2: Object/0 Tos: 18 RegAddr: 0
New Opcode: 201 Length: 1 Data: Object/0 N: 17 PC: 17 OldOpLength: 1
Executing uInst: vark:233
#MIR: (Label_Vark EUop_D1 Tag_D1 Raddr_0<4>/OpCode<4> Waddr_Tos' Tos'_Tos+1 NewTos_Tos' NextInstA_Done
)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 17 #$Opcode 201 #NCurPc: 18
D1: Int/17 D2: Int/2097217 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 17 #$Opcode 17 #NCurPc: 18
D1: Int/17 D2: -- Tos: 19 RegAddr: 0
New Opcode: 17 Length: 1 Data: Object/0 N: 33 PC: 18 OldOpLength: 1
Executing uInst: or:17
#MIR: (Label_Or EUop_Or Tag_Int Raddr_Tos RD2addr_Raddr-1 Waddr_Tos' Tos'_Tos-1 NewTos_Tos' 
CondCode_IntegerD1D2 CWrite NextInstA_Done NextInstB_Ufn-2)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 33 #$Opcode 17 #NCurPc: 19
D1: Int/17 D2: Int/3 Tos: 19 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 33 #$Opcode 33 #NCurPc: 19
D1: Int/19 D2: -- Tos: 18 RegAddr: 0
New Opcode: 33 Length: 2 Data: Object/0 N: 0 PC: 19 OldOpLength: 2
Executing uInst: putptr:228
#MIR: (Label_Putptr EUop_D2 Tag_D2 Raddr_Tos RD2addr_Raddr-1 W2addr_MarD1 Condcode_PointerpD2 
NextInstB_Ufn-2d)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 60 #$Opcode 33 #NCurPc: 21
D1: Int/19 D2: Object/2048 Tos: 18 RegAddr: 0
****************** Errors ******************
#CONDA: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 60 #$Opcode 33 #NCurPc: 21
D1: Object/2048 D2: -- Tos: 18 RegAddr: 0
Executing uInst: LAB0034:229
#MIR: (EUop_+ Tag_D1 RD1addr_Mar RD2addr_MuxRdSel MuxRdSel_IBufN W2addr_MarD1)
****************** Errors ******************
D1-30: 1 _ 0
D1-11: 0 _ 1
D1-4: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
VAD-11: 0 _ 1
VAD'-11: 1 _ 0
VAD'-4: 0 _ 1
VAD'-1: 0 _ 1
VAD'-0: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 60 #$Opcode 33 #NCurPc: 21
D1: Object/2048 D2: Object/0 Tos: 18 RegAddr: 0
****************** Errors ******************
D1-30: 1 _ 0
D1-11: 0 _ 1
D1-4: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
VAD-11: 0 _ 1
VAD'-11: 1 _ 0
VAD'-4: 0 _ 1
VAD'-1: 0 _ 1
VAD'-0: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 60 #$Opcode 33 #NCurPc: 21
D1: Object/2048 D2: -- Tos: 18 RegAddr: 0
Executing uInst: LAB0035:109
#MIR: (Cycle_W1 Dswap Raddr_Tos Tos'_Tos-1 NewTos_Tos' CondCode_NoFault CWrite NextInstA_Done 
NextInstB_PageFault)
****************** Errors ******************
D1-30: 1 _ 0
D1-11: 0 _ 1
D1-4: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
VAD-11: 0 _ 1
VAD'-11: 1 _ 0
VAD'-4: 0 _ 1
VAD'-1: 0 _ 1
VAD'-0: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 60 #$Opcode 33 #NCurPc: 21
D1: Object/2048 D2: Int/19 Tos: 18 RegAddr: 0
****************** Errors ******************
D1-30: 1 _ 0
D1-11: 0 _ 1
D1-4: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
VAD-11: 0 _ 1
VAD'-11: 1 _ 0
VAD'-4: 0 _ 1
VAD'-1: 0 _ 1
VAD'-0: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 60 #$Opcode 60 #NCurPc: 21
D1: Int/1073741823 D2: -- Tos: 17 RegAddr: 0
New Opcode: 60 Length: 0 Data: Object/0 N: 124 PC: 21 OldOpLength: 0
Executing uInst: loadibuf:209
#MIR: (Label_LoadIBuf Cycle_R4 RD1addr_PcAddr W2addr_IBufD2PcD1 EUop_+16 Tag_Int 
Misc_ResetInitialRefill CondCode_NoFault NextInstA_Done NextInstB_IBufPageFault)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010010 $Opcode: 60 #$Opcode 60 #NCurPc: 21
D1: Int/608 D2: Ptr-32/0 Tos: 17 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010001 $Opcode: 60 #$Opcode 60 #NCurPc: 21
D1: Int/624 D2: Object/0 Tos: 17 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010000 $Opcode: 60 #$Opcode 60 #NCurPc: 21
D1: -- D2: Object/0 Tos: 17 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011000 $Opcode: 60 #$Opcode 60 #NCurPc: 21
D1: -- D2: Object/0 Tos: 17 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010100 $Opcode: 60 #$Opcode 60 #NCurPc: 21
D1: -- D2: Object/0 Tos: 17 RegAddr: 0
New Opcode: 60 Length: 1 Data: Object/0 N: 124 PC: 21 OldOpLength: 1
Executing uInst: reset-vmm:219
#MIR: (Label_Reset-Vmm Misc_Reset-Vmm NextInstA_Done)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 124 #$Opcode 60 #NCurPc: 22
D1: Object/2048 D2: Ptr-32/0 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-30: 1 _ 0
D1-11: 0 _ 1
D1-4: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 124 #$Opcode 124 #NCurPc: 22
D1: Int/1073741823 D2: -- Tos: 17 RegAddr: 0
New Opcode: 124 Length: 1 Data: Object/0 N: 255 PC: 22 OldOpLength: 1
Executing uInst: retnp:220
#MIR: (Label_Retnp EUop_D1 Tag_Int Raddr_K K_StkHdr CondCode_TrapOnExit NextInstA_Ufn-0)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 255 #$Opcode 124 #NCurPc: 23
D1: Int/16 D2: -- Tos: 17 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 255 #$Opcode 124 #NCurPc: 23
D1: Int/16 D2: -- Tos: 17 RegAddr: 0
Executing uInst: LAB0065:139
#MIR: (EUop_D1 Tag_Int RCxt_Prev Raddr_K K_Pc W2Addr_PcD1 NewTopCxt_Prev 
Misc_Oplength=0&SetInitialRefill)
****************** Errors ******************
VAD-11: 0 _ 1
VAD'-11: 1 _ 0
VAD'-4: 0 _ 1
VAD'-1: 0 _ 1
VAD'-0: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 255 #$Opcode 124 #NCurPc: 23
D1: Int/20 D2: XType/1073741587 Tos: 17 RegAddr: 0
****************** Errors ******************
VAD-11: 0 _ 1
VAD'-11: 1 _ 0
VAD'-4: 0 _ 1
VAD'-1: 0 _ 1
VAD'-0: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 255 #$Opcode 124 #NCurPc: 23
D1: Int/20 D2: -- Tos: 17 RegAddr: 0
Executing uInst: LAB0066:140
#MIR: (Dswap Raddr_K K_StkHdr NewTos_D2 NextInstA_Done)
****************** Errors ******************
VAD-11: 0 _ 1
VAD'-11: 1 _ 0
VAD'-4: 0 _ 1
VAD'-1: 0 _ 1
VAD'-0: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 0 #$Opcode 124 #NCurPc: 20
D1: Int/20 D2: XType/1073741587 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-31: 1 _ 0
D1-29: 1 _ 0
D1-28: 1 _ 0
D1-27: 1 _ 0
D1-26: 1 _ 0
D1-25: 1 _ 0
D1-24: 1 _ 0
D1-23: 1 _ 0
D1-22: 1 _ 0
D1-21: 1 _ 0
D1-20: 1 _ 0
D1-19: 1 _ 0
D1-18: 1 _ 0
D1-17: 1 _ 0
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-3: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
VAD-11: 0 _ 1
VAD'-11: 1 _ 0
VAD'-4: 0 _ 1
VAD'-1: 0 _ 1
VAD'-0: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 0 #$Opcode 0 #NCurPc: 20
D1: Int/1073741823 D2: -- Tos: 19 RegAddr: 0
New Opcode: 0 Length: 0 Data: Object/0 N: 60 PC: 20 OldOpLength: 0
Executing uInst: loadibuf:209
#MIR: (Label_LoadIBuf Cycle_R4 RD1addr_PcAddr W2addr_IBufD2PcD1 EUop_+16 Tag_Int 
Misc_ResetInitialRefill CondCode_NoFault NextInstA_Done NextInstB_IBufPageFault)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010010 $Opcode: 0 #$Opcode 0 #NCurPc: 20
D1: Int/16 D2: Code/100663360 Tos: 19 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010001 $Opcode: 0 #$Opcode 0 #NCurPc: 20
D1: Int/32 D2: XType/1052630751 Tos: 19 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010000 $Opcode: 0 #$Opcode 0 #NCurPc: 20
D1: -- D2: XType/996638711 Tos: 19 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011000 $Opcode: 57 #$Opcode 0 #NCurPc: 20
D1: -- D2: Int/1072168443 Tos: 19 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010100 $Opcode: 57 #$Opcode 57 #NCurPc: 20
D1: -- D2: XType/1054604287 Tos: 19 RegAddr: 0
New Opcode: 57 Length: 0 Data: Object/0 N: 64 PC: 20 OldOpLength: 0
Executing uInst: loadibuf:209
#MIR: (Label_LoadIBuf Cycle_R4 RD1addr_PcAddr W2addr_IBufD2PcD1 EUop_+16 Tag_Int 
Misc_ResetInitialRefill CondCode_NoFault NextInstA_Done NextInstB_IBufPageFault)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010010 $Opcode: 57 #$Opcode 57 #NCurPc: 20
D1: Int/32 D2: Code/100663360 Tos: 19 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010001 $Opcode: 57 #$Opcode 57 #NCurPc: 20
D1: Int/48 D2: XType/987200381 Tos: 19 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010000 $Opcode: 57 #$Opcode 57 #NCurPc: 20
D1: -- D2: Int/1072160763 Tos: 19 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011000 $Opcode: 57 #$Opcode 57 #NCurPc: 20
D1: -- D2: XType/1054604287 Tos: 19 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010100 $Opcode: 57 #$Opcode 57 #NCurPc: 20
D1: -- D2: XType/987200351 Tos: 19 RegAddr: 0
New Opcode: 57 Length: 4 Data: Object/2097216 N: 64 PC: 20 OldOpLength: 4
Executing uInst: gvar_:57
#MIR: (Label_GVar_ EUop_+ Tag_Int RD1addr_IBufData RD2addr_MuxRdSel MuxRdSel_K K_ValueCellOffset 
W2addr_MarD1)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 144 #$Opcode 57 #NCurPc: 24
D1: Object/2097216 D2: Object/1 Tos: 19 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 144 #$Opcode 57 #NCurPc: 24
D1: Int/2097217 D2: -- Tos: 19 RegAddr: 0
Executing uInst: refcountstore:215
#MIR: (Label_RefCountStore Cycle_R1 Waddr_K WCxt_K K_Decref CondCode_NoFault NextInstB_PageFault)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 144 #$Opcode 57 #NCurPc: 24
D1: Int/6 D2: Code/100663360 Tos: 19 RegAddr: 0
****************** Errors ******************
D1-21: 1 _ 0
D1-6: 1 _ 0
D1-2: 0 _ 1
D1-1: 0 _ 1
D1-0: 1 _ 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010000 $Opcode: 144 #$Opcode 57 #NCurPc: 24
D1: -- D2: Int/19 Tos: 19 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 144 #$Opcode 57 #NCurPc: 24
D1: Int/6 D2: Code/100663360 Tos: 19 RegAddr: 0
****************** Errors ******************
D1-21: 1 _ 0
D1-6: 1 _ 0
D1-2: 0 _ 1
D1-1: 0 _ 1
D1-0: 1 _ 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 144 #$Opcode 57 #NCurPc: 24
D1: Int/1073741823 D2: Int/5 Tos: 19 RegAddr: 0
Executing uInst: LAB0004:62
#MIR: (Cycle_W1 Dswap Raddr_Tos CondCode_NoFault NextInstB_PageFault)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 144 #$Opcode 57 #NCurPc: 24
D1: Code/100663360 D2: Int/6 Tos: 19 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 144 #$Opcode 57 #NCurPc: 24
D1: Int/1073741823 D2: -- Tos: 19 RegAddr: 0
Executing uInst: LAB0005:63
#MIR: (EUop_D1 Tag_D1 Raddr_Tos Waddr_K WCxt_K K_Incref Misc_SetRefCount NextInstA_DoJmp1)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 144 #$Opcode 57 #NCurPc: 24
D1: Int/6 D2: Code/100663360 Tos: 19 RegAddr: 0
****************** Errors ******************
D1-21: 1 _ 0
D1-6: 1 _ 0
D1-2: 0 _ 1
D1-1: 0 _ 1
D1-0: 1 _ 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 144 #$Opcode 57 #NCurPc: 24
D1: Int/6 D2: -- Tos: 19 RegAddr: 0
Executing uInst: dojmp1:193
#MIR: (Label_DoJmp1 NextInstA_Done)
****************** Errors ******************
D1-21: 1 _ 0
D1-6: 1 _ 0
D1-2: 0 _ 1
D1-1: 0 _ 1
D1-0: 1 _ 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 144 #$Opcode 57 #NCurPc: 24
D1: Int/6 D2: Code/100663360 Tos: 19 RegAddr: 0
****************** Errors ******************
D1-21: 1 _ 0
D1-6: 1 _ 0
D1-2: 0 _ 1
D1-1: 0 _ 1
D1-0: 1 _ 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 144 #$Opcode 144 #NCurPc: 24
D1: Int/1073741823 D2: -- Tos: 19 RegAddr: 0
New Opcode: 144 Length: 0 Data: Object/0 N: 1 PC: 24 OldOpLength: 0
Executing uInst: refcount:214
#MIR: (Label_RefCount EUop_D1 Tag_D1 Raddr_K K_RefCountCode RCxt_K W2addr_MarD1)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 144 #$Opcode 144 #NCurPc: 24
D1: Code/100663360 D2: Int/6 Tos: 19 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 144 #$Opcode 144 #NCurPc: 24
D1: Code/100663360 D2: -- Tos: 19 RegAddr: 0
Executing uInst: LAB0088:162
#MIR: (EUop_D1 Tag_D1 Raddr_K RCxt_K K_Decref Waddr_Tos' Tos'_Tos+1 NewTos_Tos')
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 144 #$Opcode 144 #NCurPc: 24
D1: Int/5 D2: Int/0 Tos: 19 RegAddr: 0
****************** Errors ******************
D1-21: 1 _ 0
D1-6: 1 _ 0
D1-2: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 144 #$Opcode 144 #NCurPc: 24
D1: Int/5 D2: -- Tos: 20 RegAddr: 0
Executing uInst: LAB0089:163
#MIR: (EUop_D1 Tag_D1 Raddr_K RCxt_K K_Incref Waddr_Tos' Tos'_Tos+1 NewTos_Tos')
****************** Errors ******************
D1-21: 1 _ 0
D1-6: 1 _ 0
D1-2: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 144 #$Opcode 144 #NCurPc: 24
D1: Int/6 D2: Int/5 Tos: 20 RegAddr: 0
****************** Errors ******************
D1-21: 1 _ 0
D1-6: 1 _ 0
D1-2: 0 _ 1
D1-1: 0 _ 1
D1-0: 1 _ 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 144 #$Opcode 144 #NCurPc: 24
D1: Int/6 D2: -- Tos: 21 RegAddr: 0
Executing uInst: LAB0090:164
#MIR: (Misc_ResetRefcount NewArg_K K_2 NextInstA_Fn1)
****************** Errors ******************
D1-21: 1 _ 0
D1-6: 1 _ 0
D1-2: 0 _ 1
D1-1: 0 _ 1
D1-0: 1 _ 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 144 #$Opcode 144 #NCurPc: 24
D1: Int/6 D2: Int/5 Tos: 21 RegAddr: 0
****************** Errors ******************
D1-21: 1 _ 0
D1-6: 1 _ 0
D1-2: 0 _ 1
D1-1: 0 _ 1
D1-0: 1 _ 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 144 #$Opcode 144 #NCurPc: 24
D1: Int/1073741823 D2: -- Tos: 21 RegAddr: 0
Executing uInst: fn1:197
#MIR: (Label_Fn1 EUop_+4 Tag_D1 RD1addr_Mar W2addr_MarD1 NewArg2_Arg NewArg_K K_StkHdr CondCode_CCodeP
 NextInstB_Fn5)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 144 #$Opcode 144 #NCurPc: 24
D1: Code/100663360 D2: Int/5 Tos: 21 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 144 #$Opcode 144 #NCurPc: 24
D1: Code/100663364 D2: -- Tos: 21 RegAddr: 0
Executing uInst: LAB0041:115
#MIR: (Cycle_R4 WCxt_Next Waddr_Arg<6>/QW<2> EUop_+4 Tag_D1 RD1addr_Mar W2addr_MarD1 CondCode_NoFault 
NextInstB_PageFault)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010010 $Opcode: 144 #$Opcode 144 #NCurPc: 24
D1: Code/100663364 D2: Int/5 Tos: 21 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010001 $Opcode: 144 #$Opcode 144 #NCurPc: 24
D1: Code/100663368 D2: Int/16 Tos: 21 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010000 $Opcode: 144 #$Opcode 144 #NCurPc: 24
D1: -- D2: Int/0 Tos: 21 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011000 $Opcode: 144 #$Opcode 144 #NCurPc: 24
D1: -- D2: Code/100663360 Tos: 21 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010100 $Opcode: 144 #$Opcode 144 #NCurPc: 24
D1: -- D2: Code/100663360 Tos: 21 RegAddr: 0
Executing uInst: LAB0042:116
#MIR: (EUop_D2 Tag_D2 RD2addr_Unbound Waddr_K K_PVar WCxt_Next Misc_WriteOctal NewArg_Arg2)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 144 #$Opcode 144 #NCurPc: 24
D1: Int/6 D2: Ptr-32/0 Tos: 21 RegAddr: 0
****************** Errors ******************
D1-21: 1 _ 0
D1-6: 1 _ 0
D1-2: 0 _ 1
D1-1: 0 _ 1
D1-0: 1 _ 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 144 #$Opcode 144 #NCurPc: 24
D1: Ptr-32/0 D2: -- Tos: 21 RegAddr: 0
Executing uInst: fn2:198
#MIR: (Label_Fn2 EUop_D2 Tag_D2 RD2addr_Nil Waddr_K K_IVar WCxt_Next Misc_WriteOctal)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 144 #$Opcode 144 #NCurPc: 24
D1: Int/6 D2: Atm/3584 Tos: 21 RegAddr: 0
****************** Errors ******************
D1-21: 1 _ 0
D1-6: 1 _ 0
D1-2: 0 _ 1
D1-1: 0 _ 1
D1-0: 1 _ 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 144 #$Opcode 144 #NCurPc: 24
D1: Atm/3584 D2: -- Tos: 21 RegAddr: 0
Executing uInst: LAB0043:117
#MIR: (EUop_D2 Tag_Int RD2addr_PC Waddr_K K_Pc Misc_Oplength=0&SetInitialRefill)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 144 #$Opcode 144 #NCurPc: 24
D1: Int/6 D2: Int/24 Tos: 21 RegAddr: 0
****************** Errors ******************
D1-21: 1 _ 0
D1-6: 1 _ 0
D1-2: 0 _ 1
D1-1: 0 _ 1
D1-0: 1 _ 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 144 #$Opcode 144 #NCurPc: 24
D1: Int/24 D2: -- Tos: 21 RegAddr: 0
Executing uInst: LAB0044:118
#MIR: (EUop_+ Tag_Int RD1addr_Mar RD2addr_MuxRdSel MuxRdSel_Arg W2Addr_MarD1)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 144 #$Opcode 144 #NCurPc: 24
D1: Code/100663368 D2: Object/2 Tos: 21 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 144 #$Opcode 144 #NCurPc: 24
D1: Int/100663370 D2: -- Tos: 21 RegAddr: 0
Executing uInst: LAB0045:119
#MIR: (Cycle_R1 Waddr_K WCxt_Next K_Pc)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 144 #$Opcode 144 #NCurPc: 24
D1: Int/6 D2: Int/5 Tos: 21 RegAddr: 0
****************** Errors ******************
D1-21: 1 _ 0
D1-6: 1 _ 0
D1-2: 0 _ 1
D1-1: 0 _ 1
D1-0: 1 _ 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 144 #$Opcode 144 #NCurPc: 24
D1: Int/1073741823 D2: Int/304 Tos: 21 RegAddr: 0
Executing uInst: LAB0046:120
#MIR: (EUop_D1 Tag_Int Raddr_K RCxt_Next K_PC W2addr_PCD1)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 144 #$Opcode 144 #NCurPc: 24
D1: Int/304 D2: Int/16 Tos: 21 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 144 #$Opcode 144 #NCurPc: 24
D1: Int/304 D2: -- Tos: 21 RegAddr: 0
Executing uInst: LAB0047:121
#MIR: (EUop_D2 Tag_Int RD2addr_MuxRdSel MuxRdSel_K K_Ivar NewArg2_K W2addr_MarD1 NewArg_Arg' 
Arg'_Arg-1 CondCode_Arg#0 NextInstB_Fn3)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 0 #$Opcode 144 #NCurPc: 16
D1: Int/6 D2: Object/8 Tos: 21 RegAddr: 0
****************** Errors ******************
D1-21: 1 _ 0
D1-6: 1 _ 0
D1-2: 0 _ 1
D1-1: 0 _ 1
D1-0: 1 _ 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 0 #$Opcode 144 #NCurPc: 16
D1: Int/8 D2: -- Tos: 21 RegAddr: 0
Executing uInst: LAB0048:122
#MIR: (EUop_+ Tag_Int RD1addr_Mar RD2addr_MuxRdSel MuxRdSel_Arg W2addr_Tmp1D1)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 0 #$Opcode 144 #NCurPc: 16
D1: Int/8 D2: Object/1 Tos: 21 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 0 #$Opcode 144 #NCurPc: 16
D1: Int/9 D2: -- Tos: 21 RegAddr: 0
Executing uInst: LAB0049:123
#MIR: (RD2addr_Tmp1 NewArg_D2)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 0 #$Opcode 144 #NCurPc: 16
D1: Int/6 D2: Int/9 Tos: 21 RegAddr: 0
****************** Errors ******************
D1-21: 1 _ 0
D1-6: 1 _ 0
D1-2: 0 _ 1
D1-1: 0 _ 1
D1-0: 1 _ 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 0 #$Opcode 144 #NCurPc: 16
D1: Int/1073741823 D2: -- Tos: 21 RegAddr: 0
Executing uInst: LAB0050:124
#MIR: (EUop_D1 Tag_D1 Raddr_Tos WCxt_Next Waddr_Arg NewTos_Tos' Tos'_Tos-1 NewArg_Arg' Arg'_Arg-1 
CondCode_Arg=Arg2 NextInstB_Rpt)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 0 #$Opcode 144 #NCurPc: 16
D1: Int/6 D2: Int/5 Tos: 21 RegAddr: 0
****************** Errors ******************
D1-21: 1 _ 0
D1-6: 1 _ 0
D1-2: 0 _ 1
D1-1: 0 _ 1
D1-0: 1 _ 0
****************** Errors ******************
#CONDA: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 0 #$Opcode 144 #NCurPc: 16
D1: Int/6 D2: -- Tos: 20 RegAddr: 0
Executing uInst: LAB0050:124
#MIR: (EUop_D1 Tag_D1 Raddr_Tos WCxt_Next Waddr_Arg NewTos_Tos' Tos'_Tos-1 NewArg_Arg' Arg'_Arg-1 
CondCode_Arg=Arg2 NextInstB_Rpt)
****************** Errors ******************
D1-21: 1 _ 0
D1-6: 1 _ 0
D1-2: 0 _ 1
D1-1: 0 _ 1
D1-0: 1 _ 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 0 #$Opcode 144 #NCurPc: 16
D1: Int/5 D2: Int/6 Tos: 20 RegAddr: 0
****************** Errors ******************
D1-21: 1 _ 0
D1-6: 1 _ 0
D1-2: 0 _ 1
****************** Errors ******************
#CONDA: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 0 #$Opcode 144 #NCurPc: 16
D1: Int/5 D2: -- Tos: 19 RegAddr: 0
Executing uInst: fn3:199
#MIR: (Label_Fn3 EUop_D1<24>/D2<8> Tag_D1 RD2addr_MuxRdSel MuxRdSel_Tos Raddr_K Waddr_K K_StkHdr)
****************** Errors ******************
D1-21: 1 _ 0
D1-6: 1 _ 0
D1-2: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 0 #$Opcode 144 #NCurPc: 16
D1: XType/1073741587 D2: Object/19 Tos: 19 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 0 #$Opcode 144 #NCurPc: 16
D1: XType/1073741587 D2: -- Tos: 19 RegAddr: 0
Executing uInst: LAB0051:125
#MIR: (EUop_D2 Tag_D2 Dswap Raddr_K K_StkHdr RCxt_Next WCxt_Next NewTos_D2 NewTopCxt_Next 
NextInstA_Done)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 0 #$Opcode 144 #NCurPc: 16
D1: -- D2: Int/16 Tos: 19 RegAddr: 0
****************** Errors ******************
D1-31: 0 _ 1
D1-29: 0 _ 1
D1-28: 0 _ 1
D1-27: 0 _ 1
D1-26: 0 _ 1
D1-25: 0 _ 1
D1-24: 0 _ 1
D1-23: 0 _ 1
D1-22: 0 _ 1
D1-21: 0 _ 1
D1-20: 0 _ 1
D1-19: 0 _ 1
D1-18: 0 _ 1
D1-17: 0 _ 1
D1-16: 0 _ 1
D1-15: 0 _ 1
D1-14: 0 _ 1
D1-13: 0 _ 1
D1-12: 0 _ 1
D1-11: 0 _ 1
D1-10: 0 _ 1
D1-9: 0 _ 1
D1-8: 0 _ 1
D1-7: 0 _ 1
D1-6: 0 _ 1
D1-5: 0 _ 1
D1-3: 0 _ 1
D1-2: 0 _ 1
D1-1: 0 _ 1
D1-0: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 0 #$Opcode 0 #NCurPc: 16
D1: Int/16 D2: -- Tos: 16 RegAddr: 0
New Opcode: 0 Length: 0 Data: Object/0 N: 32 PC: 16 OldOpLength: 0
Executing uInst: loadibuf:209
#MIR: (Label_LoadIBuf Cycle_R4 RD1addr_PcAddr W2addr_IBufD2PcD1 EUop_+16 Tag_Int 
Misc_ResetInitialRefill CondCode_NoFault NextInstA_Done NextInstB_IBufPageFault)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010010 $Opcode: 0 #$Opcode 0 #NCurPc: 16
D1: Int/304 D2: Atm/3584 Tos: 16 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010001 $Opcode: 0 #$Opcode 0 #NCurPc: 16
D1: Int/320 D2: XType/440 Tos: 16 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010000 $Opcode: 0 #$Opcode 0 #NCurPc: 16
D1: -- D2: Int/304 Tos: 16 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011000 $Opcode: 124 #$Opcode 0 #NCurPc: 16
D1: -- D2: Int/304 Tos: 16 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010100 $Opcode: 124 #$Opcode 124 #NCurPc: 16
D1: -- D2: Int/304 Tos: 16 RegAddr: 0
New Opcode: 124 Length: 1 Data: Object/0 N: 127 PC: 16 OldOpLength: 1
Executing uInst: retnp:220
#MIR: (Label_Retnp EUop_D1 Tag_Int Raddr_K K_StkHdr CondCode_TrapOnExit NextInstA_Ufn-0)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 127 #$Opcode 124 #NCurPc: 17
D1: Int/16 D2: -- Tos: 16 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 127 #$Opcode 124 #NCurPc: 17
D1: Int/16 D2: -- Tos: 16 RegAddr: 0
Executing uInst: LAB0065:139
#MIR: (EUop_D1 Tag_Int RCxt_Prev Raddr_K K_Pc W2Addr_PcD1 NewTopCxt_Prev 
Misc_Oplength=0&SetInitialRefill)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 127 #$Opcode 124 #NCurPc: 17
D1: Int/24 D2: XType/1073741587 Tos: 16 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 127 #$Opcode 124 #NCurPc: 17
D1: Int/24 D2: -- Tos: 16 RegAddr: 0
Executing uInst: LAB0066:140
#MIR: (Dswap Raddr_K K_StkHdr NewTos_D2 NextInstA_Done)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 255 #$Opcode 124 #NCurPc: 24
D1: Int/24 D2: XType/1073741587 Tos: 16 RegAddr: 0
****************** Errors ******************
D1-31: 1 _ 0
D1-29: 1 _ 0
D1-28: 1 _ 0
D1-27: 1 _ 0
D1-26: 1 _ 0
D1-25: 1 _ 0
D1-24: 1 _ 0
D1-23: 1 _ 0
D1-22: 1 _ 0
D1-21: 1 _ 0
D1-20: 1 _ 0
D1-19: 1 _ 0
D1-18: 1 _ 0
D1-17: 1 _ 0
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 255 #$Opcode 255 #NCurPc: 24
D1: Int/1073741823 D2: -- Tos: 19 RegAddr: 0
New Opcode: 255 Length: 0 Data: Object/0 N: 127 PC: 24 OldOpLength: 0
Executing uInst: loadibuf:209
#MIR: (Label_LoadIBuf Cycle_R4 RD1addr_PcAddr W2addr_IBufD2PcD1 EUop_+16 Tag_Int 
Misc_ResetInitialRefill CondCode_NoFault NextInstA_Done NextInstB_IBufPageFault)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010010 $Opcode: 255 #$Opcode 255 #NCurPc: 24
D1: Int/16 D2: Code/100663360 Tos: 19 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010001 $Opcode: 255 #$Opcode 255 #NCurPc: 24
D1: Int/32 D2: XType/1052630751 Tos: 19 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010000 $Opcode: 255 #$Opcode 255 #NCurPc: 24
D1: -- D2: XType/996638711 Tos: 19 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011000 $Opcode: 255 #$Opcode 255 #NCurPc: 24
D1: -- D2: Int/1072168443 Tos: 19 RegAddr: 0
****************** Errors ******************
#OPCODE-7: 0 _ 1
#OPCODE-4: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010100 $Opcode: 255 #$Opcode 255 #NCurPc: 24
D1: -- D2: XType/1054604287 Tos: 19 RegAddr: 0
New Opcode: 255 Length: 0 Data: Object/0 N: 127 PC: 24 OldOpLength: 0
Executing uInst: loadibuf:209
#MIR: (Label_LoadIBuf Cycle_R4 RD1addr_PcAddr W2addr_IBufD2PcD1 EUop_+16 Tag_Int 
Misc_ResetInitialRefill CondCode_NoFault NextInstA_Done NextInstB_IBufPageFault)
****************** Errors ******************
#IBUFN-6: 0 _ 1
#IBUFN-5: 0 _ 1
#IBUFN-4: 0 _ 1
#IBUFN-3: 0 _ 1
#IBUFN-2: 0 _ 1
#IBUFN-1: 0 _ 1
#IBUFN-0: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010010 $Opcode: 255 #$Opcode 255 #NCurPc: 24
D1: Int/32 D2: Code/100663360 Tos: 19 RegAddr: 0
****************** Errors ******************
#IBUFN-6: 0 _ 1
#IBUFN-5: 0 _ 1
#IBUFN-4: 0 _ 1
#IBUFN-3: 0 _ 1
#IBUFN-2: 0 _ 1
#IBUFN-1: 0 _ 1
#IBUFN-0: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010001 $Opcode: 255 #$Opcode 255 #NCurPc: 24
D1: Int/48 D2: XType/987200381 Tos: 19 RegAddr: 0
****************** Errors ******************
#IBUFN-6: 0 _ 1
#IBUFN-5: 0 _ 1
#IBUFN-4: 0 _ 1
#IBUFN-3: 0 _ 1
#IBUFN-2: 0 _ 1
#IBUFN-1: 0 _ 1
#IBUFN-0: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010000 $Opcode: 255 #$Opcode 255 #NCurPc: 24
D1: -- D2: Int/1072160763 Tos: 19 RegAddr: 0
****************** Errors ******************
#IBUFN-6: 0 _ 1
#IBUFN-5: 0 _ 1
#IBUFN-4: 0 _ 1
#IBUFN-3: 0 _ 1
#IBUFN-2: 0 _ 1
#IBUFN-1: 0 _ 1
#IBUFN-0: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011000 $Opcode: 144 #$Opcode 255 #NCurPc: 24
D1: -- D2: XType/1054604287 Tos: 19 RegAddr: 0
****************** Errors ******************
#IBUFN-6: 0 _ 1
#IBUFN-5: 0 _ 1
#IBUFN-4: 0 _ 1
#IBUFN-3: 0 _ 1
#IBUFN-2: 0 _ 1
#IBUFN-1: 0 _ 1
#IBUFN-0: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010100 $Opcode: 144 #$Opcode 144 #NCurPc: 24
D1: -- D2: XType/987200351 Tos: 19 RegAddr: 0
New Opcode: 144 Length: 5 Data: Object/2098177 N: 1 PC: 24 OldOpLength: 5
Executing uInst: pconst:80
#MIR: (Label_PConst EUop_D2<2>Shl24/D1<30> Tag_D2<8:7> RD2addr_MuxRdSel MuxRdSel_K K_PtrTypeBits 
RD1addr_IBufData Waddr_TOS' TOS'_TOS+1 NewTos_Tos' NextInstA_Done)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 20 #$Opcode 144 #NCurPc: 29
D1: Object/2098177 D2: Object/0 Tos: 19 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 20 #$Opcode 20 #NCurPc: 29
D1: Object/2098177 D2: -- Tos: 20 RegAddr: 0
New Opcode: 20 Length: 1 Data: Object/0 N: 32 PC: 29 OldOpLength: 1
Executing uInst: copy:20
#MIR: (Label_Copy EUop_D1 Tag_D1 Raddr_Tos Waddr_Tos' Tos'_Tos+1 NewTos_Tos' NextInstA_Done)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 32 #$Opcode 20 #NCurPc: 30
D1: Object/2098177 D2: Int/6 Tos: 20 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 32 #$Opcode 32 #NCurPc: 30
D1: Object/2098177 D2: -- Tos: 21 RegAddr: 0
New Opcode: 32 Length: 2 Data: Object/64 N: 64 PC: 30 OldOpLength: 2
Executing uInst: getptr:32
#MIR: (Label_Getptr EUop_+ Tag_D2 Dswap Raddr_Tos RD1addr_IBufData W2addr_MarD1 Condcode_PointerpD2 
NextInstB_Ufn-1d)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 26 #$Opcode 32 #NCurPc: 0
D1: Object/64 D2: Object/2098177 Tos: 21 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 26 #$Opcode 32 #NCurPc: 0
D1: Object/2098241 D2: -- Tos: 21 RegAddr: 0
Executing uInst: LAB0033:65
#MIR: (Cycle_R1 Waddr_Tos CondCode_NoFault Cwrite NextInstA_Done NextInstB_PageFault)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 26 #$Opcode 32 #NCurPc: 0
D1: Object/2098177 D2: Object/2098177 Tos: 21 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010000 $Opcode: 26 #$Opcode 32 #NCurPc: 0
D1: -- D2: Int/16 Tos: 21 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 26 #$Opcode 32 #NCurPc: 0
D1: Object/2098177 D2: Object/2098177 Tos: 21 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011000 $Opcode: 26 #$Opcode 32 #NCurPc: 0
D1: -- D2: -- Tos: 21 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010100 $Opcode: 26 #$Opcode 32 #NCurPc: 0
D1: -- D2: -- Tos: 21 RegAddr: 0
Executing uInst: pagefault:212
#MIR: (Label_PageFault EUop_D1 Tag_Int RD1addr_Mar Waddr_Tos' Tos'_Tos+1 NewTos_Tos' NewArg_K K_1 
Misc_OpLength=0 CondCode_FramesAvail Cwrite NextInstB_DumpFrame)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 26 #$Opcode 32 #NCurPc: 0
D1: Object/2098241 D2: Object/2098177 Tos: 21 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 26 #$Opcode 32 #NCurPc: 0
D1: Int/2098241 D2: -- Tos: 22 RegAddr: 0
Executing uInst: LAB0072:146
#MIR: (EUop_D1 Tag_D1 Raddr_K K_PFCode RCxt_K W2addr_MarD1 NextInstA_Fn1)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 32 #$Opcode 32 #NCurPc: 30
D1: Code/100663424 D2: -- Tos: 22 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 32 #$Opcode 32 #NCurPc: 30
D1: Code/100663424 D2: -- Tos: 22 RegAddr: 0
Executing uInst: fn1:197
#MIR: (Label_Fn1 EUop_+4 Tag_D1 RD1addr_Mar W2addr_MarD1 NewArg2_Arg NewArg_K K_StkHdr CondCode_CCodeP
 NextInstB_Fn5)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 32 #$Opcode 32 #NCurPc: 30
D1: Code/100663424 D2: Object/2098177 Tos: 22 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 32 #$Opcode 32 #NCurPc: 30
D1: Code/100663428 D2: -- Tos: 22 RegAddr: 0
Executing uInst: LAB0041:115
#MIR: (Cycle_R4 WCxt_Next Waddr_Arg<6>/QW<2> EUop_+4 Tag_D1 RD1addr_Mar W2addr_MarD1 CondCode_NoFault 
NextInstB_PageFault)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010010 $Opcode: 32 #$Opcode 32 #NCurPc: 30
D1: Code/100663428 D2: Object/2098177 Tos: 22 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010001 $Opcode: 32 #$Opcode 32 #NCurPc: 30
D1: Code/100663432 D2: Int/16 Tos: 22 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010000 $Opcode: 32 #$Opcode 32 #NCurPc: 30
D1: -- D2: Int/0 Tos: 22 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011000 $Opcode: 32 #$Opcode 32 #NCurPc: 30
D1: -- D2: Code/100663424 Tos: 22 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010100 $Opcode: 32 #$Opcode 32 #NCurPc: 30
D1: -- D2: Code/100663424 Tos: 22 RegAddr: 0
Executing uInst: LAB0042:116
#MIR: (EUop_D2 Tag_D2 RD2addr_Unbound Waddr_K K_PVar WCxt_Next Misc_WriteOctal NewArg_Arg2)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 32 #$Opcode 32 #NCurPc: 30
D1: Int/2098241 D2: Ptr-32/0 Tos: 22 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 32 #$Opcode 32 #NCurPc: 30
D1: Ptr-32/0 D2: -- Tos: 22 RegAddr: 0
Executing uInst: fn2:198
#MIR: (Label_Fn2 EUop_D2 Tag_D2 RD2addr_Nil Waddr_K K_IVar WCxt_Next Misc_WriteOctal)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 32 #$Opcode 32 #NCurPc: 30
D1: Int/2098241 D2: Atm/3584 Tos: 22 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 32 #$Opcode 32 #NCurPc: 30
D1: Atm/3584 D2: -- Tos: 22 RegAddr: 0
Executing uInst: LAB0043:117
#MIR: (EUop_D2 Tag_Int RD2addr_PC Waddr_K K_Pc Misc_Oplength=0&SetInitialRefill)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 32 #$Opcode 32 #NCurPc: 30
D1: Int/2098241 D2: Int/30 Tos: 22 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 32 #$Opcode 32 #NCurPc: 30
D1: Int/30 D2: -- Tos: 22 RegAddr: 0
Executing uInst: LAB0044:118
#MIR: (EUop_+ Tag_Int RD1addr_Mar RD2addr_MuxRdSel MuxRdSel_Arg W2Addr_MarD1)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 32 #$Opcode 32 #NCurPc: 30
D1: Code/100663432 D2: Object/1 Tos: 22 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 32 #$Opcode 32 #NCurPc: 30
D1: Int/100663433 D2: -- Tos: 22 RegAddr: 0
Executing uInst: LAB0045:119
#MIR: (Cycle_R1 Waddr_K WCxt_Next K_Pc)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 32 #$Opcode 32 #NCurPc: 30
D1: Int/2098241 D2: Object/2098177 Tos: 22 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 32 #$Opcode 32 #NCurPc: 30
D1: Int/1073741823 D2: Int/560 Tos: 22 RegAddr: 0
Executing uInst: LAB0046:120
#MIR: (EUop_D1 Tag_Int Raddr_K RCxt_Next K_PC W2addr_PCD1)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 32 #$Opcode 32 #NCurPc: 30
D1: Int/560 D2: Int/16 Tos: 22 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 32 #$Opcode 32 #NCurPc: 30
D1: Int/560 D2: -- Tos: 22 RegAddr: 0
Executing uInst: LAB0047:121
#MIR: (EUop_D2 Tag_Int RD2addr_MuxRdSel MuxRdSel_K K_Ivar NewArg2_K W2addr_MarD1 NewArg_Arg' 
Arg'_Arg-1 CondCode_Arg#0 NextInstB_Fn3)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 0 #$Opcode 32 #NCurPc: 16
D1: Int/2098241 D2: Object/8 Tos: 22 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 0 #$Opcode 32 #NCurPc: 16
D1: Int/8 D2: -- Tos: 22 RegAddr: 0
Executing uInst: LAB0048:122
#MIR: (EUop_+ Tag_Int RD1addr_Mar RD2addr_MuxRdSel MuxRdSel_Arg W2addr_Tmp1D1)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 0 #$Opcode 32 #NCurPc: 16
D1: Int/8 D2: Object/0 Tos: 22 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 0 #$Opcode 32 #NCurPc: 16
D1: Int/8 D2: -- Tos: 22 RegAddr: 0
Executing uInst: LAB0049:123
#MIR: (RD2addr_Tmp1 NewArg_D2)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 0 #$Opcode 32 #NCurPc: 16
D1: Int/2098241 D2: Int/8 Tos: 22 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 0 #$Opcode 32 #NCurPc: 16
D1: Int/1073741823 D2: -- Tos: 22 RegAddr: 0
Executing uInst: LAB0050:124
#MIR: (EUop_D1 Tag_D1 Raddr_Tos WCxt_Next Waddr_Arg NewTos_Tos' Tos'_Tos-1 NewArg_Arg' Arg'_Arg-1 
CondCode_Arg=Arg2 NextInstB_Rpt)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 0 #$Opcode 32 #NCurPc: 16
D1: Int/2098241 D2: Object/2098177 Tos: 22 RegAddr: 0
****************** Errors ******************
#CONDA: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 0 #$Opcode 32 #NCurPc: 16
D1: Int/2098241 D2: -- Tos: 21 RegAddr: 0
Executing uInst: fn3:199
#MIR: (Label_Fn3 EUop_D1<24>/D2<8> Tag_D1 RD2addr_MuxRdSel MuxRdSel_Tos Raddr_K Waddr_K K_StkHdr)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 0 #$Opcode 32 #NCurPc: 16
D1: XType/1073741587 D2: Object/21 Tos: 21 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 0 #$Opcode 32 #NCurPc: 16
D1: XType/1073741589 D2: -- Tos: 21 RegAddr: 0
Executing uInst: LAB0051:125
#MIR: (EUop_D2 Tag_D2 Dswap Raddr_K K_StkHdr RCxt_Next WCxt_Next NewTos_D2 NewTopCxt_Next 
NextInstA_Done)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 0 #$Opcode 32 #NCurPc: 16
D1: -- D2: Int/16 Tos: 21 RegAddr: 0
****************** Errors ******************
D1-31: 0 _ 1
D1-29: 0 _ 1
D1-28: 0 _ 1
D1-27: 0 _ 1
D1-26: 0 _ 1
D1-25: 0 _ 1
D1-24: 0 _ 1
D1-23: 0 _ 1
D1-22: 0 _ 1
D1-21: 0 _ 1
D1-20: 0 _ 1
D1-19: 0 _ 1
D1-18: 0 _ 1
D1-17: 0 _ 1
D1-16: 0 _ 1
D1-15: 0 _ 1
D1-14: 0 _ 1
D1-13: 0 _ 1
D1-12: 0 _ 1
D1-11: 0 _ 1
D1-10: 0 _ 1
D1-9: 0 _ 1
D1-8: 0 _ 1
D1-7: 0 _ 1
D1-6: 0 _ 1
D1-5: 0 _ 1
D1-3: 0 _ 1
D1-2: 0 _ 1
D1-1: 0 _ 1
D1-0: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 0 #$Opcode 0 #NCurPc: 16
D1: Int/16 D2: -- Tos: 16 RegAddr: 0
New Opcode: 0 Length: 0 Data: Object/0 N: 32 PC: 16 OldOpLength: 0
Executing uInst: loadibuf:209
#MIR: (Label_LoadIBuf Cycle_R4 RD1addr_PcAddr W2addr_IBufD2PcD1 EUop_+16 Tag_Int 
Misc_ResetInitialRefill CondCode_NoFault NextInstA_Done NextInstB_IBufPageFault)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010010 $Opcode: 0 #$Opcode 0 #NCurPc: 16
D1: Int/560 D2: Atm/3584 Tos: 16 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010001 $Opcode: 0 #$Opcode 0 #NCurPc: 16
D1: Int/576 D2: List/80235720 Tos: 16 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010000 $Opcode: 0 #$Opcode 0 #NCurPc: 16
D1: -- D2: Int/862283366 Tos: 16 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011000 $Opcode: 200 #$Opcode 0 #NCurPc: 16
D1: -- D2: XType/1069448763 Tos: 16 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010100 $Opcode: 200 #$Opcode 200 #NCurPc: 16
D1: -- D2: XType/526176237 Tos: 16 RegAddr: 0
New Opcode: 200 Length: 1 Data: Object/0 N: 145 PC: 16 OldOpLength: 1
Executing uInst: vark:233
#MIR: (Label_Vark EUop_D1 Tag_D1 Raddr_0<4>/OpCode<4> Waddr_Tos' Tos'_Tos+1 NewTos_Tos' NextInstA_Done
)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 145 #$Opcode 200 #NCurPc: 17
D1: Int/2098241 D2: -- Tos: 16 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 145 #$Opcode 145 #NCurPc: 17
D1: Int/2098241 D2: -- Tos: 17 RegAddr: 0
New Opcode: 145 Length: 5 Data: Int/16777215 N: 255 PC: 17 OldOpLength: 5
Executing uInst: intconst:81
#MIR: (Label_IntConst EUop_D1 Tag_Int RD1addr_IBufData Waddr_TOS' TOS'_TOS+1 NewTos_Tos' 
NextInstA_Done)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 16 #$Opcode 145 #NCurPc: 22
D1: Int/16777215 D2: Ptr-32/0 Tos: 17 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 16 #$Opcode 16 #NCurPc: 22
D1: Int/16777215 D2: -- Tos: 18 RegAddr: 0
New Opcode: 16 Length: 0 Data: Object/0 N: 47 PC: 22 OldOpLength: 0
Executing uInst: loadibuf:209
#MIR: (Label_LoadIBuf Cycle_R4 RD1addr_PcAddr W2addr_IBufD2PcD1 EUop_+16 Tag_Int 
Misc_ResetInitialRefill CondCode_NoFault NextInstA_Done NextInstB_IBufPageFault)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010010 $Opcode: 16 #$Opcode 16 #NCurPc: 22
D1: Int/576 D2: Int/2098241 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010001 $Opcode: 16 #$Opcode 16 #NCurPc: 22
D1: Int/592 D2: XType/1071816350 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010000 $Opcode: 16 #$Opcode 16 #NCurPc: 22
D1: -- D2: Float/1073477457 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011000 $Opcode: 16 #$Opcode 16 #NCurPc: 22
D1: -- D2: XType/1004404446 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010100 $Opcode: 16 #$Opcode 16 #NCurPc: 22
D1: -- D2: Int/1073217523 Tos: 18 RegAddr: 0
New Opcode: 16 Length: 1 Data: Object/0 N: 47 PC: 22 OldOpLength: 1
Executing uInst: and:16
#MIR: (Label_And EUop_And Tag_Int Raddr_Tos RD2addr_Raddr-1 Waddr_Tos' Tos'_Tos-1 NewTos_Tos' 
CondCode_IntegerD1D2 CWrite NextInstA_Done NextInstB_Ufn-2)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 47 #$Opcode 16 #NCurPc: 23
D1: Int/16777215 D2: Int/2098241 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 47 #$Opcode 47 #NCurPc: 23
D1: Int/2098241 D2: -- Tos: 17 RegAddr: 0
New Opcode: 47 Length: 2 Data: Object/10 N: 10 PC: 23 OldOpLength: 2
Executing uInst: lrsh.n:228
#MIR: (Label_Lrsh.N EUop_D1 Tag_Int Raddr_Tos W2addr_MarD1 NewArg_IBufN CondCode_Integerp 
NextInstB_Ufn-1d)
****************** Errors ******************
D1-23: 1 _ 0
D1-22: 1 _ 0
D1-20: 1 _ 0
D1-19: 1 _ 0
D1-18: 1 _ 0
D1-17: 1 _ 0
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/2098241 D2: Ptr-32/0 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-23: 1 _ 0
D1-22: 1 _ 0
D1-20: 1 _ 0
D1-19: 1 _ 0
D1-18: 1 _ 0
D1-17: 1 _ 0
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/2098241 D2: -- Tos: 17 RegAddr: 0
Executing uInst: LAB0031:105
#MIR: (Arg'_Arg-1 NewArg_Arg' CondCode_Arg=0 NextInstA_Done)
****************** Errors ******************
D1-23: 1 _ 0
D1-22: 1 _ 0
D1-20: 1 _ 0
D1-19: 1 _ 0
D1-18: 1 _ 0
D1-17: 1 _ 0
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-11: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-11: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/2098241 D2: Ptr-32/0 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-23: 1 _ 0
D1-22: 1 _ 0
D1-20: 1 _ 0
D1-19: 1 _ 0
D1-18: 1 _ 0
D1-17: 1 _ 0
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-11: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-11: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/1073741823 D2: -- Tos: 17 RegAddr: 0
Executing uInst: LAB0032:106
#MIR: (EUop_Rshft1 Tag_Int Raddr_Tos Waddr_Tos NewArg_Arg' Arg'_Arg-1 CondCode_Arg=0 NextInstA_Done 
NextInstB_Rpt)
****************** Errors ******************
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-11: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-11: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/2098241 D2: Ptr-32/0 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-23: 1 _ 0
D1-22: 1 _ 0
D1-20: 1 _ 0
D1-19: 1 _ 0
D1-18: 1 _ 0
D1-17: 1 _ 0
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-11: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-11: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/1049120 D2: -- Tos: 17 RegAddr: 0
Executing uInst: LAB0032:106
#MIR: (EUop_Rshft1 Tag_Int Raddr_Tos Waddr_Tos NewArg_Arg' Arg'_Arg-1 CondCode_Arg=0 NextInstA_Done 
NextInstB_Rpt)
****************** Errors ******************
D1-22: 1 _ 0
D1-21: 1 _ 0
D1-19: 1 _ 0
D1-18: 1 _ 0
D1-17: 1 _ 0
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-11: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-11: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/1049120 D2: Ptr-32/0 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-22: 1 _ 0
D1-21: 1 _ 0
D1-19: 1 _ 0
D1-18: 1 _ 0
D1-17: 1 _ 0
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-11: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-11: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/524560 D2: -- Tos: 17 RegAddr: 0
Executing uInst: LAB0032:106
#MIR: (EUop_Rshft1 Tag_Int Raddr_Tos Waddr_Tos NewArg_Arg' Arg'_Arg-1 CondCode_Arg=0 NextInstA_Done 
NextInstB_Rpt)
****************** Errors ******************
D1-21: 1 _ 0
D1-20: 1 _ 0
D1-18: 1 _ 0
D1-17: 1 _ 0
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-11: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-11: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/524560 D2: Ptr-32/0 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-21: 1 _ 0
D1-20: 1 _ 0
D1-18: 1 _ 0
D1-17: 1 _ 0
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-11: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-11: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/262280 D2: -- Tos: 17 RegAddr: 0
Executing uInst: LAB0032:106
#MIR: (EUop_Rshft1 Tag_Int Raddr_Tos Waddr_Tos NewArg_Arg' Arg'_Arg-1 CondCode_Arg=0 NextInstA_Done 
NextInstB_Rpt)
****************** Errors ******************
D1-20: 1 _ 0
D1-19: 1 _ 0
D1-17: 1 _ 0
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-11: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-11: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/262280 D2: Ptr-32/0 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-20: 1 _ 0
D1-19: 1 _ 0
D1-17: 1 _ 0
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-11: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-11: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/131140 D2: -- Tos: 17 RegAddr: 0
Executing uInst: LAB0032:106
#MIR: (EUop_Rshft1 Tag_Int Raddr_Tos Waddr_Tos NewArg_Arg' Arg'_Arg-1 CondCode_Arg=0 NextInstA_Done 
NextInstB_Rpt)
****************** Errors ******************
D1-19: 1 _ 0
D1-18: 1 _ 0
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-11: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-11: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/131140 D2: Ptr-32/0 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-19: 1 _ 0
D1-18: 1 _ 0
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-11: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-11: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/65570 D2: -- Tos: 17 RegAddr: 0
Executing uInst: LAB0032:106
#MIR: (EUop_Rshft1 Tag_Int Raddr_Tos Waddr_Tos NewArg_Arg' Arg'_Arg-1 CondCode_Arg=0 NextInstA_Done 
NextInstB_Rpt)
****************** Errors ******************
D1-18: 1 _ 0
D1-17: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-11: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-11: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/65570 D2: Ptr-32/0 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-18: 1 _ 0
D1-17: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-11: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-11: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/32785 D2: -- Tos: 17 RegAddr: 0
Executing uInst: LAB0032:106
#MIR: (EUop_Rshft1 Tag_Int Raddr_Tos Waddr_Tos NewArg_Arg' Arg'_Arg-1 CondCode_Arg=0 NextInstA_Done 
NextInstB_Rpt)
****************** Errors ******************
D1-17: 1 _ 0
D1-16: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-11: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-11: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/32785 D2: Ptr-32/0 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-17: 1 _ 0
D1-16: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-11: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-11: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/16392 D2: -- Tos: 17 RegAddr: 0
Executing uInst: LAB0032:106
#MIR: (EUop_Rshft1 Tag_Int Raddr_Tos Waddr_Tos NewArg_Arg' Arg'_Arg-1 CondCode_Arg=0 NextInstA_Done 
NextInstB_Rpt)
****************** Errors ******************
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-11: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-11: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/16392 D2: Ptr-32/0 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-11: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-11: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/8196 D2: -- Tos: 17 RegAddr: 0
Executing uInst: LAB0032:106
#MIR: (EUop_Rshft1 Tag_Int Raddr_Tos Waddr_Tos NewArg_Arg' Arg'_Arg-1 CondCode_Arg=0 NextInstA_Done 
NextInstB_Rpt)
****************** Errors ******************
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-11: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-11: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/8196 D2: Ptr-32/0 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-11: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-11: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/4098 D2: -- Tos: 17 RegAddr: 0
Executing uInst: LAB0032:106
#MIR: (EUop_Rshft1 Tag_Int Raddr_Tos Waddr_Tos NewArg_Arg' Arg'_Arg-1 CondCode_Arg=0 NextInstA_Done 
NextInstB_Rpt)
****************** Errors ******************
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-11: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-11: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/4098 D2: Ptr-32/0 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-11: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-11: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 35 #$Opcode 35 #NCurPc: 25
D1: Int/2049 D2: -- Tos: 17 RegAddr: 0
New Opcode: 35 Length: 2 Data: Object/0 N: 0 PC: 25 OldOpLength: 2
Executing uInst: settype:35
#MIR: (Label_SetType EUop_D2<2>Shl24/D1<30> Tag_D2<8:7> Raddr_Tos RD2addr_MuxRdSel MuxRdSel_IBufN 
Waddr_Tos NextInstA_Done)
****************** Errors ******************
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 20 #$Opcode 35 #NCurPc: 27
D1: Int/2049 D2: Object/0 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 20 #$Opcode 20 #NCurPc: 27
D1: Object/2049 D2: -- Tos: 17 RegAddr: 0
New Opcode: 20 Length: 1 Data: Object/0 N: 32 PC: 27 OldOpLength: 1
Executing uInst: copy:20
#MIR: (Label_Copy EUop_D1 Tag_D1 Raddr_Tos Waddr_Tos' Tos'_Tos+1 NewTos_Tos' NextInstA_Done)
****************** Errors ******************
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 32 #$Opcode 20 #NCurPc: 28
D1: Object/2049 D2: Ptr-32/0 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 32 #$Opcode 32 #NCurPc: 28
D1: Object/2049 D2: -- Tos: 18 RegAddr: 0
New Opcode: 32 Length: 2 Data: Object/0 N: 0 PC: 28 OldOpLength: 2
Executing uInst: getptr:32
#MIR: (Label_Getptr EUop_+ Tag_D2 Dswap Raddr_Tos RD1addr_IBufData W2addr_MarD1 Condcode_PointerpD2 
NextInstB_Ufn-1d)
****************** Errors ******************
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 185 #$Opcode 32 #NCurPc: 30
D1: Object/0 D2: Object/2049 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 185 #$Opcode 32 #NCurPc: 30
D1: Object/2049 D2: -- Tos: 18 RegAddr: 0
Executing uInst: LAB0033:65
#MIR: (Cycle_R1 Waddr_Tos CondCode_NoFault Cwrite NextInstA_Done NextInstB_PageFault)
****************** Errors ******************
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-10: 1 _ 0
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-6: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 185 #$Opcode 32 #NCurPc: 30
D1: Object/2049 D2: Object/2049 Tos: 18 RegAddr: 0
****************** Errors ******************
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-10: 1 _ 0
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-6: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 185 #$Opcode 185 #NCurPc: 30
D1: Int/1073741823 D2: Int/16 Tos: 18 RegAddr: 0
New Opcode: 185 Length: 1 Data: Object/0 N: 26 PC: 30 OldOpLength: 1
Executing uInst: vark_:234
#MIR: (Label_Vark_ EUop_D1 Tag_D1 Raddr_Tos Waddr_0<4>/OpCode<4> NextInstA_Done)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 26 #$Opcode 185 #NCurPc: 31
D1: Int/16 D2: Object/2049 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 26 #$Opcode 26 #NCurPc: 31
D1: Int/16 D2: -- Tos: 18 RegAddr: 0
New Opcode: 26 Length: 1 Data: Object/0 N: 16 PC: 31 OldOpLength: 1
Executing uInst: '1:26
#MIR: (Label_'1 EUop_D2 Tag_Int RD2addr_MuxRdSel MuxRdSel_K K_1 Waddr_Tos' Tos'_Tos+1 NewTos_Tos' 
NextInstA_Done)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 16 #$Opcode 26 #NCurPc: 0
D1: Int/16 D2: Object/1 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 16 #$Opcode 16 #NCurPc: 0
D1: Int/1 D2: -- Tos: 19 RegAddr: 0
New Opcode: 16 Length: 1 Data: Object/0 N: 26 PC: 0 OldOpLength: 1
Executing uInst: and:16
#MIR: (Label_And EUop_And Tag_Int Raddr_Tos RD2addr_Raddr-1 Waddr_Tos' Tos'_Tos-1 NewTos_Tos' 
CondCode_IntegerD1D2 CWrite NextInstA_Done NextInstB_Ufn-2)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 26 #$Opcode 16 #NCurPc: 1
D1: Int/1 D2: Int/16 Tos: 19 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 26 #$Opcode 26 #NCurPc: 1
D1: Int/0 D2: -- Tos: 18 RegAddr: 0
New Opcode: 26 Length: 1 Data: Object/0 N: 10 PC: 1 OldOpLength: 1
Executing uInst: '1:228
#MIR: (Label_'1 EUop_D2 Tag_Int RD2addr_MuxRdSel MuxRdSel_K K_1 Waddr_Tos' Tos'_Tos+1 NewTos_Tos' 
NextInstA_Done)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 10 #$Opcode 26 #NCurPc: 2
D1: Int/0 D2: Object/1 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 10 #$Opcode 10 #NCurPc: 2
D1: Int/1 D2: -- Tos: 19 RegAddr: 0
New Opcode: 10 Length: 1 Data: Object/0 N: 53 PC: 2 OldOpLength: 1
Executing uInst: eq:10
#MIR: (Label_Eq Raddr_Tos RD2addr_Raddr-1 Tos'_Tos-1 NewTos_Tos' CondCode_D1=D2 NextInstA_SetT 
NextInstB_SetNil)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 53 #$Opcode 10 #NCurPc: 3
D1: Int/1 D2: Int/0 Tos: 19 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 53 #$Opcode 10 #NCurPc: 3
D1: Int/1073741823 D2: -- Tos: 18 RegAddr: 0
Executing uInst: setnil:222
#MIR: (Label_SetNil EUop_D2 Tag_D2 RD2addr_Nil Waddr_Tos NextInstA_Done)
****************** Errors ******************
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-10: 1 _ 0
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-6: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 53 #$Opcode 10 #NCurPc: 3
D1: Int/0 D2: Atm/3584 Tos: 18 RegAddr: 0
****************** Errors ******************
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-10: 1 _ 0
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-6: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 53 #$Opcode 53 #NCurPc: 3
D1: Atm/3584 D2: -- Tos: 18 RegAddr: 0
New Opcode: 53 Length: 2 Data: Object/7 N: 7 PC: 3 OldOpLength: 2
Executing uInst: fjump:53
#MIR: (Label_FJump EUop_nop Raddr_Tos Tos'_Tos-1 NewTos_Tos' Rd2addr_Nil Condcode_D1#D2 NextInstA_Done
 NextInstB_DoJmp)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 145 #$Opcode 53 #NCurPc: 5
D1: Atm/3584 D2: Atm/3584 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 145 #$Opcode 53 #NCurPc: 5
D1: Int/1073741823 D2: -- Tos: 17 RegAddr: 0
Executing uInst: dojmp:209
#MIR: (Label_DoJmp EUop_+ Tag_Int RD2addr_PC RD1addr_IBufData W2addr_PCD1 
Misc_Oplength=0&SetInitialRefill NextInstA_Dojmp1)
****************** Errors ******************
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-10: 1 _ 0
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-6: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 145 #$Opcode 53 #NCurPc: 5
D1: Object/7 D2: Int/581 Tos: 17 RegAddr: 0
****************** Errors ******************
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-10: 1 _ 0
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-6: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 145 #$Opcode 53 #NCurPc: 5
D1: Int/588 D2: -- Tos: 17 RegAddr: 0
Executing uInst: dojmp1:193
#MIR: (Label_DoJmp1 NextInstA_Done)
****************** Errors ******************
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-10: 1 _ 0
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-6: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 145 #$Opcode 53 #NCurPc: 12
D1: Object/2049 D2: Ptr-32/0 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-30: 1 _ 0
D1-11: 0 _ 1
D1-0: 0 _ 1
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-10: 1 _ 0
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-6: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 145 #$Opcode 145 #NCurPc: 12
D1: Int/1073741823 D2: -- Tos: 17 RegAddr: 0
New Opcode: 145 Length: 0 Data: Object/0 N: 1 PC: 12 OldOpLength: 0
Executing uInst: loadibuf:209
#MIR: (Label_LoadIBuf Cycle_R4 RD1addr_PcAddr W2addr_IBufD2PcD1 EUop_+16 Tag_Int 
Misc_ResetInitialRefill CondCode_NoFault NextInstA_Done NextInstB_IBufPageFault)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010010 $Opcode: 145 #$Opcode 145 #NCurPc: 12
D1: Int/576 D2: Ptr-32/0 Tos: 17 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010001 $Opcode: 145 #$Opcode 145 #NCurPc: 12
D1: Int/592 D2: XType/1071816350 Tos: 17 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010000 $Opcode: 145 #$Opcode 145 #NCurPc: 12
D1: -- D2: Float/1073477457 Tos: 17 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011000 $Opcode: 145 #$Opcode 145 #NCurPc: 12
D1: -- D2: XType/1004404446 Tos: 17 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010100 $Opcode: 145 #$Opcode 145 #NCurPc: 12
D1: -- D2: Int/1073217523 Tos: 17 RegAddr: 0
New Opcode: 145 Length: 0 Data: Object/0 N: 1 PC: 12 OldOpLength: 0
Executing uInst: loadibuf:209
#MIR: (Label_LoadIBuf Cycle_R4 RD1addr_PcAddr W2addr_IBufD2PcD1 EUop_+16 Tag_Int 
Misc_ResetInitialRefill CondCode_NoFault NextInstA_Done NextInstB_IBufPageFault)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010010 $Opcode: 145 #$Opcode 145 #NCurPc: 12
D1: Int/592 D2: Ptr-32/0 Tos: 17 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010001 $Opcode: 145 #$Opcode 145 #NCurPc: 12
D1: Int/608 D2: Float/871219192 Tos: 17 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010000 $Opcode: 145 #$Opcode 145 #NCurPc: 12
D1: -- D2: XType/747145454 Tos: 17 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011000 $Opcode: 145 #$Opcode 145 #NCurPc: 12
D1: -- D2: Object/0 Tos: 17 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010100 $Opcode: 145 #$Opcode 145 #NCurPc: 12
D1: -- D2: Object/0 Tos: 17 RegAddr: 0
New Opcode: 145 Length: 5 Data: Int/1 N: 1 PC: 12 OldOpLength: 5
Executing uInst: intconst:81
#MIR: (Label_IntConst EUop_D1 Tag_Int RD1addr_IBufData Waddr_TOS' TOS'_TOS+1 NewTos_Tos' 
NextInstA_Done)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 201 #$Opcode 145 #NCurPc: 17
D1: Int/1 D2: Ptr-32/0 Tos: 17 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 201 #$Opcode 201 #NCurPc: 17
D1: Int/1 D2: -- Tos: 18 RegAddr: 0
New Opcode: 201 Length: 1 Data: Object/0 N: 17 PC: 17 OldOpLength: 1
Executing uInst: vark:233
#MIR: (Label_Vark EUop_D1 Tag_D1 Raddr_0<4>/OpCode<4> Waddr_Tos' Tos'_Tos+1 NewTos_Tos' NextInstA_Done
)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 17 #$Opcode 201 #NCurPc: 18
D1: Int/16 D2: Int/2098241 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 17 #$Opcode 17 #NCurPc: 18
D1: Int/16 D2: -- Tos: 19 RegAddr: 0
New Opcode: 17 Length: 1 Data: Object/0 N: 33 PC: 18 OldOpLength: 1
Executing uInst: or:17
#MIR: (Label_Or EUop_Or Tag_Int Raddr_Tos RD2addr_Raddr-1 Waddr_Tos' Tos'_Tos-1 NewTos_Tos' 
CondCode_IntegerD1D2 CWrite NextInstA_Done NextInstB_Ufn-2)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 33 #$Opcode 17 #NCurPc: 19
D1: Int/16 D2: Int/1 Tos: 19 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 33 #$Opcode 33 #NCurPc: 19
D1: Int/17 D2: -- Tos: 18 RegAddr: 0
New Opcode: 33 Length: 2 Data: Object/0 N: 0 PC: 19 OldOpLength: 2
Executing uInst: putptr:228
#MIR: (Label_Putptr EUop_D2 Tag_D2 Raddr_Tos RD2addr_Raddr-1 W2addr_MarD1 Condcode_PointerpD2 
NextInstB_Ufn-2d)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 60 #$Opcode 33 #NCurPc: 21
D1: Int/17 D2: Object/2049 Tos: 18 RegAddr: 0
****************** Errors ******************
#CONDA: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 60 #$Opcode 33 #NCurPc: 21
D1: Object/2049 D2: -- Tos: 18 RegAddr: 0
Executing uInst: LAB0034:229
#MIR: (EUop_+ Tag_D1 RD1addr_Mar RD2addr_MuxRdSel MuxRdSel_IBufN W2addr_MarD1)
****************** Errors ******************
D1-30: 1 _ 0
D1-11: 0 _ 1
D1-4: 1 _ 0
VAD-11: 0 _ 1
VAD'-11: 1 _ 0
VAD'-4: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 60 #$Opcode 33 #NCurPc: 21
D1: Object/2049 D2: Object/0 Tos: 18 RegAddr: 0
****************** Errors ******************
D1-30: 1 _ 0
D1-11: 0 _ 1
D1-4: 1 _ 0
VAD-11: 0 _ 1
VAD'-11: 1 _ 0
VAD'-4: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 60 #$Opcode 33 #NCurPc: 21
D1: Object/2049 D2: -- Tos: 18 RegAddr: 0
Executing uInst: LAB0035:109
#MIR: (Cycle_W1 Dswap Raddr_Tos Tos'_Tos-1 NewTos_Tos' CondCode_NoFault CWrite NextInstA_Done 
NextInstB_PageFault)
****************** Errors ******************
D1-30: 1 _ 0
D1-11: 0 _ 1
D1-4: 1 _ 0
VAD-11: 0 _ 1
VAD'-11: 1 _ 0
VAD'-4: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 60 #$Opcode 33 #NCurPc: 21
D1: Object/2049 D2: Int/17 Tos: 18 RegAddr: 0
****************** Errors ******************
D1-30: 1 _ 0
D1-11: 0 _ 1
D1-4: 1 _ 0
VAD-11: 0 _ 1
VAD'-11: 1 _ 0
VAD'-4: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 60 #$Opcode 60 #NCurPc: 21
D1: Int/1073741823 D2: -- Tos: 17 RegAddr: 0
New Opcode: 60 Length: 0 Data: Object/0 N: 124 PC: 21 OldOpLength: 0
Executing uInst: loadibuf:209
#MIR: (Label_LoadIBuf Cycle_R4 RD1addr_PcAddr W2addr_IBufD2PcD1 EUop_+16 Tag_Int 
Misc_ResetInitialRefill CondCode_NoFault NextInstA_Done NextInstB_IBufPageFault)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010010 $Opcode: 60 #$Opcode 60 #NCurPc: 21
D1: Int/608 D2: Ptr-32/0 Tos: 17 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010001 $Opcode: 60 #$Opcode 60 #NCurPc: 21
D1: Int/624 D2: Object/0 Tos: 17 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010000 $Opcode: 60 #$Opcode 60 #NCurPc: 21
D1: -- D2: Object/0 Tos: 17 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011000 $Opcode: 60 #$Opcode 60 #NCurPc: 21
D1: -- D2: Object/0 Tos: 17 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010100 $Opcode: 60 #$Opcode 60 #NCurPc: 21
D1: -- D2: Object/0 Tos: 17 RegAddr: 0
New Opcode: 60 Length: 1 Data: Object/0 N: 124 PC: 21 OldOpLength: 1
Executing uInst: reset-vmm:219
#MIR: (Label_Reset-Vmm Misc_Reset-Vmm NextInstA_Done)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 124 #$Opcode 60 #NCurPc: 22
D1: Object/2049 D2: Ptr-32/0 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-30: 1 _ 0
D1-11: 0 _ 1
D1-4: 1 _ 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 124 #$Opcode 124 #NCurPc: 22
D1: Int/1073741823 D2: -- Tos: 17 RegAddr: 0
New Opcode: 124 Length: 1 Data: Object/0 N: 255 PC: 22 OldOpLength: 1
Executing uInst: retnp:220
#MIR: (Label_Retnp EUop_D1 Tag_Int Raddr_K K_StkHdr CondCode_TrapOnExit NextInstA_Ufn-0)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 255 #$Opcode 124 #NCurPc: 23
D1: Int/16 D2: -- Tos: 17 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 255 #$Opcode 124 #NCurPc: 23
D1: Int/16 D2: -- Tos: 17 RegAddr: 0
Executing uInst: LAB0065:139
#MIR: (EUop_D1 Tag_Int RCxt_Prev Raddr_K K_Pc W2Addr_PcD1 NewTopCxt_Prev 
Misc_Oplength=0&SetInitialRefill)
****************** Errors ******************
VAD-11: 0 _ 1
VAD'-11: 1 _ 0
VAD'-4: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 255 #$Opcode 124 #NCurPc: 23
D1: Int/30 D2: XType/1073741589 Tos: 17 RegAddr: 0
****************** Errors ******************
VAD-11: 0 _ 1
VAD'-11: 1 _ 0
VAD'-4: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 255 #$Opcode 124 #NCurPc: 23
D1: Int/30 D2: -- Tos: 17 RegAddr: 0
Executing uInst: LAB0066:140
#MIR: (Dswap Raddr_K K_StkHdr NewTos_D2 NextInstA_Done)
****************** Errors ******************
VAD-11: 0 _ 1
VAD'-11: 1 _ 0
VAD'-4: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 255 #$Opcode 124 #NCurPc: 30
D1: Int/30 D2: XType/1073741589 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-31: 1 _ 0
D1-29: 1 _ 0
D1-28: 1 _ 0
D1-27: 1 _ 0
D1-26: 1 _ 0
D1-25: 1 _ 0
D1-24: 1 _ 0
D1-23: 1 _ 0
D1-22: 1 _ 0
D1-21: 1 _ 0
D1-20: 1 _ 0
D1-19: 1 _ 0
D1-18: 1 _ 0
D1-17: 1 _ 0
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-0: 1 _ 0
VAD-11: 0 _ 1
VAD'-11: 1 _ 0
VAD'-4: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 255 #$Opcode 255 #NCurPc: 30
D1: Int/1073741823 D2: -- Tos: 21 RegAddr: 0
New Opcode: 255 Length: 0 Data: Object/0 N: 255 PC: 30 OldOpLength: 0
Executing uInst: loadibuf:209
#MIR: (Label_LoadIBuf Cycle_R4 RD1addr_PcAddr W2addr_IBufD2PcD1 EUop_+16 Tag_Int 
Misc_ResetInitialRefill CondCode_NoFault NextInstA_Done NextInstB_IBufPageFault)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010010 $Opcode: 255 #$Opcode 255 #NCurPc: 30
D1: Int/16 D2: Object/2098177 Tos: 21 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010001 $Opcode: 255 #$Opcode 255 #NCurPc: 30
D1: Int/32 D2: XType/1052630751 Tos: 21 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010000 $Opcode: 255 #$Opcode 255 #NCurPc: 30
D1: -- D2: XType/996638711 Tos: 21 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011000 $Opcode: 255 #$Opcode 255 #NCurPc: 30
D1: -- D2: Int/1072168443 Tos: 21 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010100 $Opcode: 255 #$Opcode 255 #NCurPc: 30
D1: -- D2: XType/1054604287 Tos: 21 RegAddr: 0
New Opcode: 255 Length: 0 Data: Object/0 N: 255 PC: 30 OldOpLength: 0
Executing uInst: loadibuf:209
#MIR: (Label_LoadIBuf Cycle_R4 RD1addr_PcAddr W2addr_IBufD2PcD1 EUop_+16 Tag_Int 
Misc_ResetInitialRefill CondCode_NoFault NextInstA_Done NextInstB_IBufPageFault)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010010 $Opcode: 255 #$Opcode 255 #NCurPc: 30
D1: Int/32 D2: Object/2098177 Tos: 21 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010001 $Opcode: 255 #$Opcode 255 #NCurPc: 30
D1: Int/48 D2: XType/987200381 Tos: 21 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010000 $Opcode: 255 #$Opcode 255 #NCurPc: 30
D1: -- D2: Int/1072160763 Tos: 21 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011000 $Opcode: 32 #$Opcode 255 #NCurPc: 30
D1: -- D2: XType/1054604287 Tos: 21 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010100 $Opcode: 32 #$Opcode 32 #NCurPc: 30
D1: -- D2: XType/987200351 Tos: 21 RegAddr: 0
New Opcode: 32 Length: 2 Data: Object/64 N: 64 PC: 30 OldOpLength: 2
Executing uInst: getptr:32
#MIR: (Label_Getptr EUop_+ Tag_D2 Dswap Raddr_Tos RD1addr_IBufData W2addr_MarD1 Condcode_PointerpD2 
NextInstB_Ufn-1d)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 26 #$Opcode 32 #NCurPc: 0
D1: Object/64 D2: Object/2098177 Tos: 21 RegAddr: 0
****************** Errors ******************
#CONDA: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 26 #$Opcode 32 #NCurPc: 0
D1: Object/2098241 D2: -- Tos: 21 RegAddr: 0
Executing uInst: LAB0033:65
#MIR: (Cycle_R1 Waddr_Tos CondCode_NoFault Cwrite NextInstA_Done NextInstB_PageFault)
****************** Errors ******************
D1-30: 1 _ 0
D1-7: 1 _ 0
D1-6: 0 _ 1
VAD'-7: 0 _ 1
VAD'-6: 1 _ 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 26 #$Opcode 32 #NCurPc: 0
D1: Object/2098177 D2: Object/2098177 Tos: 21 RegAddr: 0
****************** Errors ******************
D1-30: 1 _ 0
D1-6: 1 _ 0
VAD'-7: 0 _ 1
VAD'-6: 1 _ 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010000 $Opcode: 26 #$Opcode 32 #NCurPc: 0
D1: -- D2: Int/17 Tos: 21 RegAddr: 0
****************** Errors ******************
VAD'-7: 0 _ 1
VAD'-6: 1 _ 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 26 #$Opcode 32 #NCurPc: 0
D1: Object/2098177 D2: Object/2098177 Tos: 21 RegAddr: 0
****************** Errors ******************
D1-30: 1 _ 0
D1-6: 1 _ 0
VAD'-7: 0 _ 1
VAD'-6: 1 _ 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 26 #$Opcode 26 #NCurPc: 0
D1: Int/1073741823 D2: Int/6 Tos: 21 RegAddr: 0
New Opcode: 26 Length: 1 Data: Object/0 N: 68 PC: 0 OldOpLength: 1
Executing uInst: '1:26
#MIR: (Label_'1 EUop_D2 Tag_Int RD2addr_MuxRdSel MuxRdSel_K K_1 Waddr_Tos' Tos'_Tos+1 NewTos_Tos' 
NextInstA_Done)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 68 #$Opcode 26 #NCurPc: 1
D1: Int/6 D2: Object/1 Tos: 21 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 68 #$Opcode 68 #NCurPc: 1
D1: Int/1 D2: -- Tos: 22 RegAddr: 0
New Opcode: 68 Length: 1 Data: Object/0 N: 33 PC: 1 OldOpLength: 1
Executing uInst: plus:213
#MIR: (Label_Plus EUop_+ Tag_Int Raddr_Tos RD2addr_Raddr-1 W2addr_Tmp1D1 CondCode_IntegerD1D2 
NextInstB_Ufn-2)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 33 #$Opcode 68 #NCurPc: 2
D1: Int/1 D2: Int/6 Tos: 22 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 33 #$Opcode 68 #NCurPc: 2
D1: Int/7 D2: -- Tos: 22 RegAddr: 0
Executing uInst: LAB0019:228
#MIR: (EUop_D2 Tag_Int RD2addr_Tmp1 Waddr_Tos' Tos'_Tos-1 NewTos_Tos' CondCode_NoOverflow CWrite 
NextInstA_Done NextInstB_Ufn-2)
****************** Errors ******************
D1-2: 0 _ 1
D1-0: 0 _ 1
VAD'-7: 0 _ 1
VAD'-6: 1 _ 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 33 #$Opcode 68 #NCurPc: 2
D1: Int/1 D2: Int/7 Tos: 22 RegAddr: 0
****************** Errors ******************
VAD'-7: 0 _ 1
VAD'-6: 1 _ 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 33 #$Opcode 33 #NCurPc: 2
D1: Int/7 D2: -- Tos: 21 RegAddr: 0
New Opcode: 33 Length: 2 Data: Object/64 N: 64 PC: 2 OldOpLength: 2
Executing uInst: putptr:33
#MIR: (Label_Putptr EUop_D2 Tag_D2 Raddr_Tos RD2addr_Raddr-1 W2addr_MarD1 Condcode_PointerpD2 
NextInstB_Ufn-2d)
****************** Errors ******************
D1-2: 0 _ 1
D1-0: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 144 #$Opcode 33 #NCurPc: 4
D1: Int/7 D2: Object/2098177 Tos: 21 RegAddr: 0
****************** Errors ******************
D1-2: 0 _ 1
D1-0: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 144 #$Opcode 33 #NCurPc: 4
D1: Object/2098177 D2: -- Tos: 21 RegAddr: 0
Executing uInst: LAB0034:229
#MIR: (EUop_+ Tag_D1 RD1addr_Mar RD2addr_MuxRdSel MuxRdSel_IBufN W2addr_MarD1)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 144 #$Opcode 33 #NCurPc: 4
D1: Object/2098177 D2: Object/64 Tos: 21 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 144 #$Opcode 33 #NCurPc: 4
D1: Object/2098241 D2: -- Tos: 21 RegAddr: 0
Executing uInst: LAB0035:109
#MIR: (Cycle_W1 Dswap Raddr_Tos Tos'_Tos-1 NewTos_Tos' CondCode_NoFault CWrite NextInstA_Done 
NextInstB_PageFault)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 144 #$Opcode 33 #NCurPc: 4
D1: Object/2098177 D2: Int/7 Tos: 21 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011000 $Opcode: 144 #$Opcode 33 #NCurPc: 4
D1: -- D2: -- Tos: 21 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010100 $Opcode: 144 #$Opcode 33 #NCurPc: 4
D1: -- D2: -- Tos: 21 RegAddr: 0
Executing uInst: pagefault:212
#MIR: (Label_PageFault EUop_D1 Tag_Int RD1addr_Mar Waddr_Tos' Tos'_Tos+1 NewTos_Tos' NewArg_K K_1 
Misc_OpLength=0 CondCode_FramesAvail Cwrite NextInstB_DumpFrame)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 144 #$Opcode 33 #NCurPc: 4
D1: Object/2098241 D2: Object/2098177 Tos: 21 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 144 #$Opcode 33 #NCurPc: 4
D1: Int/2098241 D2: -- Tos: 22 RegAddr: 0
Executing uInst: LAB0072:146
#MIR: (EUop_D1 Tag_D1 Raddr_K K_PFCode RCxt_K W2addr_MarD1 NextInstA_Fn1)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 33 #$Opcode 33 #NCurPc: 2
D1: Code/100663424 D2: -- Tos: 22 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 33 #$Opcode 33 #NCurPc: 2
D1: Code/100663424 D2: -- Tos: 22 RegAddr: 0
Executing uInst: fn1:197
#MIR: (Label_Fn1 EUop_+4 Tag_D1 RD1addr_Mar W2addr_MarD1 NewArg2_Arg NewArg_K K_StkHdr CondCode_CCodeP
 NextInstB_Fn5)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 33 #$Opcode 33 #NCurPc: 2
D1: Code/100663424 D2: Int/7 Tos: 22 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 33 #$Opcode 33 #NCurPc: 2
D1: Code/100663428 D2: -- Tos: 22 RegAddr: 0
Executing uInst: LAB0041:115
#MIR: (Cycle_R4 WCxt_Next Waddr_Arg<6>/QW<2> EUop_+4 Tag_D1 RD1addr_Mar W2addr_MarD1 CondCode_NoFault 
NextInstB_PageFault)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010010 $Opcode: 33 #$Opcode 33 #NCurPc: 2
D1: Code/100663428 D2: Int/7 Tos: 22 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010001 $Opcode: 33 #$Opcode 33 #NCurPc: 2
D1: Code/100663432 D2: Int/16 Tos: 22 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010000 $Opcode: 33 #$Opcode 33 #NCurPc: 2
D1: -- D2: Int/0 Tos: 22 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011000 $Opcode: 33 #$Opcode 33 #NCurPc: 2
D1: -- D2: Code/100663424 Tos: 22 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010100 $Opcode: 33 #$Opcode 33 #NCurPc: 2
D1: -- D2: Code/100663424 Tos: 22 RegAddr: 0
Executing uInst: LAB0042:116
#MIR: (EUop_D2 Tag_D2 RD2addr_Unbound Waddr_K K_PVar WCxt_Next Misc_WriteOctal NewArg_Arg2)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 33 #$Opcode 33 #NCurPc: 2
D1: Int/2098241 D2: Ptr-32/0 Tos: 22 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 33 #$Opcode 33 #NCurPc: 2
D1: Ptr-32/0 D2: -- Tos: 22 RegAddr: 0
Executing uInst: fn2:198
#MIR: (Label_Fn2 EUop_D2 Tag_D2 RD2addr_Nil Waddr_K K_IVar WCxt_Next Misc_WriteOctal)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 33 #$Opcode 33 #NCurPc: 2
D1: Int/2098241 D2: Atm/3584 Tos: 22 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 33 #$Opcode 33 #NCurPc: 2
D1: Atm/3584 D2: -- Tos: 22 RegAddr: 0
Executing uInst: LAB0043:117
#MIR: (EUop_D2 Tag_Int RD2addr_PC Waddr_K K_Pc Misc_Oplength=0&SetInitialRefill)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 33 #$Opcode 33 #NCurPc: 2
D1: Int/2098241 D2: Int/34 Tos: 22 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 33 #$Opcode 33 #NCurPc: 2
D1: Int/34 D2: -- Tos: 22 RegAddr: 0
Executing uInst: LAB0044:118
#MIR: (EUop_+ Tag_Int RD1addr_Mar RD2addr_MuxRdSel MuxRdSel_Arg W2Addr_MarD1)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 33 #$Opcode 33 #NCurPc: 2
D1: Code/100663432 D2: Object/1 Tos: 22 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 33 #$Opcode 33 #NCurPc: 2
D1: Int/100663433 D2: -- Tos: 22 RegAddr: 0
Executing uInst: LAB0045:119
#MIR: (Cycle_R1 Waddr_K WCxt_Next K_Pc)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 33 #$Opcode 33 #NCurPc: 2
D1: Int/2098241 D2: Int/7 Tos: 22 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 33 #$Opcode 33 #NCurPc: 2
D1: Int/1073741823 D2: Int/560 Tos: 22 RegAddr: 0
Executing uInst: LAB0046:120
#MIR: (EUop_D1 Tag_Int Raddr_K RCxt_Next K_PC W2addr_PCD1)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 33 #$Opcode 33 #NCurPc: 2
D1: Int/560 D2: Int/16 Tos: 22 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 33 #$Opcode 33 #NCurPc: 2
D1: Int/560 D2: -- Tos: 22 RegAddr: 0
Executing uInst: LAB0047:121
#MIR: (EUop_D2 Tag_Int RD2addr_MuxRdSel MuxRdSel_K K_Ivar NewArg2_K W2addr_MarD1 NewArg_Arg' 
Arg'_Arg-1 CondCode_Arg#0 NextInstB_Fn3)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 0 #$Opcode 33 #NCurPc: 16
D1: Int/2098241 D2: Object/8 Tos: 22 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 0 #$Opcode 33 #NCurPc: 16
D1: Int/8 D2: -- Tos: 22 RegAddr: 0
Executing uInst: LAB0048:122
#MIR: (EUop_+ Tag_Int RD1addr_Mar RD2addr_MuxRdSel MuxRdSel_Arg W2addr_Tmp1D1)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 0 #$Opcode 33 #NCurPc: 16
D1: Int/8 D2: Object/0 Tos: 22 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 0 #$Opcode 33 #NCurPc: 16
D1: Int/8 D2: -- Tos: 22 RegAddr: 0
Executing uInst: LAB0049:123
#MIR: (RD2addr_Tmp1 NewArg_D2)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 0 #$Opcode 33 #NCurPc: 16
D1: Int/2098241 D2: Int/8 Tos: 22 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 0 #$Opcode 33 #NCurPc: 16
D1: Int/1073741823 D2: -- Tos: 22 RegAddr: 0
Executing uInst: LAB0050:124
#MIR: (EUop_D1 Tag_D1 Raddr_Tos WCxt_Next Waddr_Arg NewTos_Tos' Tos'_Tos-1 NewArg_Arg' Arg'_Arg-1 
CondCode_Arg=Arg2 NextInstB_Rpt)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 0 #$Opcode 33 #NCurPc: 16
D1: Int/2098241 D2: Int/7 Tos: 22 RegAddr: 0
****************** Errors ******************
#CONDA: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 0 #$Opcode 33 #NCurPc: 16
D1: Int/2098241 D2: -- Tos: 21 RegAddr: 0
Executing uInst: fn3:199
#MIR: (Label_Fn3 EUop_D1<24>/D2<8> Tag_D1 RD2addr_MuxRdSel MuxRdSel_Tos Raddr_K Waddr_K K_StkHdr)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 0 #$Opcode 33 #NCurPc: 16
D1: XType/1073741589 D2: Object/21 Tos: 21 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 0 #$Opcode 33 #NCurPc: 16
D1: XType/1073741589 D2: -- Tos: 21 RegAddr: 0
Executing uInst: LAB0051:125
#MIR: (EUop_D2 Tag_D2 Dswap Raddr_K K_StkHdr RCxt_Next WCxt_Next NewTos_D2 NewTopCxt_Next 
NextInstA_Done)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 0 #$Opcode 33 #NCurPc: 16
D1: -- D2: Int/16 Tos: 21 RegAddr: 0
****************** Errors ******************
D1-31: 0 _ 1
D1-29: 0 _ 1
D1-28: 0 _ 1
D1-27: 0 _ 1
D1-26: 0 _ 1
D1-25: 0 _ 1
D1-24: 0 _ 1
D1-23: 0 _ 1
D1-22: 0 _ 1
D1-21: 0 _ 1
D1-20: 0 _ 1
D1-19: 0 _ 1
D1-18: 0 _ 1
D1-17: 0 _ 1
D1-16: 0 _ 1
D1-15: 0 _ 1
D1-14: 0 _ 1
D1-13: 0 _ 1
D1-12: 0 _ 1
D1-11: 0 _ 1
D1-10: 0 _ 1
D1-9: 0 _ 1
D1-8: 0 _ 1
D1-7: 0 _ 1
D1-6: 0 _ 1
D1-5: 0 _ 1
D1-3: 0 _ 1
D1-2: 0 _ 1
D1-1: 0 _ 1
D1-0: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 0 #$Opcode 0 #NCurPc: 16
D1: Int/16 D2: -- Tos: 16 RegAddr: 0
New Opcode: 0 Length: 0 Data: Object/0 N: 32 PC: 16 OldOpLength: 0
Executing uInst: loadibuf:209
#MIR: (Label_LoadIBuf Cycle_R4 RD1addr_PcAddr W2addr_IBufD2PcD1 EUop_+16 Tag_Int 
Misc_ResetInitialRefill CondCode_NoFault NextInstA_Done NextInstB_IBufPageFault)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010010 $Opcode: 0 #$Opcode 0 #NCurPc: 16
D1: Int/560 D2: Atm/3584 Tos: 16 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010001 $Opcode: 0 #$Opcode 0 #NCurPc: 16
D1: Int/576 D2: List/80235720 Tos: 16 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010000 $Opcode: 0 #$Opcode 0 #NCurPc: 16
D1: -- D2: Int/862283366 Tos: 16 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011000 $Opcode: 200 #$Opcode 0 #NCurPc: 16
D1: -- D2: XType/1069448763 Tos: 16 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010100 $Opcode: 200 #$Opcode 200 #NCurPc: 16
D1: -- D2: XType/526176237 Tos: 16 RegAddr: 0
New Opcode: 200 Length: 1 Data: Object/0 N: 145 PC: 16 OldOpLength: 1
Executing uInst: vark:233
#MIR: (Label_Vark EUop_D1 Tag_D1 Raddr_0<4>/OpCode<4> Waddr_Tos' Tos'_Tos+1 NewTos_Tos' NextInstA_Done
)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 145 #$Opcode 200 #NCurPc: 17
D1: Int/2098241 D2: -- Tos: 16 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 145 #$Opcode 145 #NCurPc: 17
D1: Int/2098241 D2: -- Tos: 17 RegAddr: 0
New Opcode: 145 Length: 5 Data: Int/16777215 N: 255 PC: 17 OldOpLength: 5
Executing uInst: intconst:81
#MIR: (Label_IntConst EUop_D1 Tag_Int RD1addr_IBufData Waddr_TOS' TOS'_TOS+1 NewTos_Tos' 
NextInstA_Done)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 16 #$Opcode 145 #NCurPc: 22
D1: Int/16777215 D2: Ptr-32/0 Tos: 17 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 16 #$Opcode 16 #NCurPc: 22
D1: Int/16777215 D2: -- Tos: 18 RegAddr: 0
New Opcode: 16 Length: 0 Data: Object/0 N: 47 PC: 22 OldOpLength: 0
Executing uInst: loadibuf:209
#MIR: (Label_LoadIBuf Cycle_R4 RD1addr_PcAddr W2addr_IBufD2PcD1 EUop_+16 Tag_Int 
Misc_ResetInitialRefill CondCode_NoFault NextInstA_Done NextInstB_IBufPageFault)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010010 $Opcode: 16 #$Opcode 16 #NCurPc: 22
D1: Int/576 D2: Int/2098241 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010001 $Opcode: 16 #$Opcode 16 #NCurPc: 22
D1: Int/592 D2: XType/1071816350 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010000 $Opcode: 16 #$Opcode 16 #NCurPc: 22
D1: -- D2: Float/1073477457 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011000 $Opcode: 16 #$Opcode 16 #NCurPc: 22
D1: -- D2: XType/1004404446 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010100 $Opcode: 16 #$Opcode 16 #NCurPc: 22
D1: -- D2: Int/1073217523 Tos: 18 RegAddr: 0
New Opcode: 16 Length: 1 Data: Object/0 N: 47 PC: 22 OldOpLength: 1
Executing uInst: and:16
#MIR: (Label_And EUop_And Tag_Int Raddr_Tos RD2addr_Raddr-1 Waddr_Tos' Tos'_Tos-1 NewTos_Tos' 
CondCode_IntegerD1D2 CWrite NextInstA_Done NextInstB_Ufn-2)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 47 #$Opcode 16 #NCurPc: 23
D1: Int/16777215 D2: Int/2098241 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 47 #$Opcode 47 #NCurPc: 23
D1: Int/2098241 D2: -- Tos: 17 RegAddr: 0
New Opcode: 47 Length: 2 Data: Object/10 N: 10 PC: 23 OldOpLength: 2
Executing uInst: lrsh.n:228
#MIR: (Label_Lrsh.N EUop_D1 Tag_Int Raddr_Tos W2addr_MarD1 NewArg_IBufN CondCode_Integerp 
NextInstB_Ufn-1d)
****************** Errors ******************
D1-23: 1 _ 0
D1-22: 1 _ 0
D1-20: 1 _ 0
D1-19: 1 _ 0
D1-18: 1 _ 0
D1-17: 1 _ 0
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/2098241 D2: Ptr-32/0 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-23: 1 _ 0
D1-22: 1 _ 0
D1-20: 1 _ 0
D1-19: 1 _ 0
D1-18: 1 _ 0
D1-17: 1 _ 0
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/2098241 D2: -- Tos: 17 RegAddr: 0
Executing uInst: LAB0031:105
#MIR: (Arg'_Arg-1 NewArg_Arg' CondCode_Arg=0 NextInstA_Done)
****************** Errors ******************
D1-23: 1 _ 0
D1-22: 1 _ 0
D1-20: 1 _ 0
D1-19: 1 _ 0
D1-18: 1 _ 0
D1-17: 1 _ 0
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-11: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-11: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/2098241 D2: Ptr-32/0 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-23: 1 _ 0
D1-22: 1 _ 0
D1-20: 1 _ 0
D1-19: 1 _ 0
D1-18: 1 _ 0
D1-17: 1 _ 0
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-11: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-11: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/1073741823 D2: -- Tos: 17 RegAddr: 0
Executing uInst: LAB0032:106
#MIR: (EUop_Rshft1 Tag_Int Raddr_Tos Waddr_Tos NewArg_Arg' Arg'_Arg-1 CondCode_Arg=0 NextInstA_Done 
NextInstB_Rpt)
****************** Errors ******************
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-11: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-11: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/2098241 D2: Ptr-32/0 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-23: 1 _ 0
D1-22: 1 _ 0
D1-20: 1 _ 0
D1-19: 1 _ 0
D1-18: 1 _ 0
D1-17: 1 _ 0
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-11: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-11: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/1049120 D2: -- Tos: 17 RegAddr: 0
Executing uInst: LAB0032:106
#MIR: (EUop_Rshft1 Tag_Int Raddr_Tos Waddr_Tos NewArg_Arg' Arg'_Arg-1 CondCode_Arg=0 NextInstA_Done 
NextInstB_Rpt)
****************** Errors ******************
D1-22: 1 _ 0
D1-21: 1 _ 0
D1-19: 1 _ 0
D1-18: 1 _ 0
D1-17: 1 _ 0
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-11: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-11: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/1049120 D2: Ptr-32/0 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-22: 1 _ 0
D1-21: 1 _ 0
D1-19: 1 _ 0
D1-18: 1 _ 0
D1-17: 1 _ 0
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-11: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-11: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/524560 D2: -- Tos: 17 RegAddr: 0
Executing uInst: LAB0032:106
#MIR: (EUop_Rshft1 Tag_Int Raddr_Tos Waddr_Tos NewArg_Arg' Arg'_Arg-1 CondCode_Arg=0 NextInstA_Done 
NextInstB_Rpt)
****************** Errors ******************
D1-21: 1 _ 0
D1-20: 1 _ 0
D1-18: 1 _ 0
D1-17: 1 _ 0
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-11: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-11: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/524560 D2: Ptr-32/0 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-21: 1 _ 0
D1-20: 1 _ 0
D1-18: 1 _ 0
D1-17: 1 _ 0
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-11: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-11: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/262280 D2: -- Tos: 17 RegAddr: 0
Executing uInst: LAB0032:106
#MIR: (EUop_Rshft1 Tag_Int Raddr_Tos Waddr_Tos NewArg_Arg' Arg'_Arg-1 CondCode_Arg=0 NextInstA_Done 
NextInstB_Rpt)
****************** Errors ******************
D1-20: 1 _ 0
D1-19: 1 _ 0
D1-17: 1 _ 0
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-11: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-11: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/262280 D2: Ptr-32/0 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-20: 1 _ 0
D1-19: 1 _ 0
D1-17: 1 _ 0
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-11: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-11: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/131140 D2: -- Tos: 17 RegAddr: 0
Executing uInst: LAB0032:106
#MIR: (EUop_Rshft1 Tag_Int Raddr_Tos Waddr_Tos NewArg_Arg' Arg'_Arg-1 CondCode_Arg=0 NextInstA_Done 
NextInstB_Rpt)
****************** Errors ******************
D1-19: 1 _ 0
D1-18: 1 _ 0
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-11: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-11: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/131140 D2: Ptr-32/0 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-19: 1 _ 0
D1-18: 1 _ 0
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-11: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-11: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/65570 D2: -- Tos: 17 RegAddr: 0
Executing uInst: LAB0032:106
#MIR: (EUop_Rshft1 Tag_Int Raddr_Tos Waddr_Tos NewArg_Arg' Arg'_Arg-1 CondCode_Arg=0 NextInstA_Done 
NextInstB_Rpt)
****************** Errors ******************
D1-18: 1 _ 0
D1-17: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-11: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-11: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/65570 D2: Ptr-32/0 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-18: 1 _ 0
D1-17: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-11: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-11: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/32785 D2: -- Tos: 17 RegAddr: 0
Executing uInst: LAB0032:106
#MIR: (EUop_Rshft1 Tag_Int Raddr_Tos Waddr_Tos NewArg_Arg' Arg'_Arg-1 CondCode_Arg=0 NextInstA_Done 
NextInstB_Rpt)
****************** Errors ******************
D1-17: 1 _ 0
D1-16: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-11: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-11: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/32785 D2: Ptr-32/0 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-17: 1 _ 0
D1-16: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-11: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-11: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/16392 D2: -- Tos: 17 RegAddr: 0
Executing uInst: LAB0032:106
#MIR: (EUop_Rshft1 Tag_Int Raddr_Tos Waddr_Tos NewArg_Arg' Arg'_Arg-1 CondCode_Arg=0 NextInstA_Done 
NextInstB_Rpt)
****************** Errors ******************
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-11: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-11: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/16392 D2: Ptr-32/0 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-11: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-11: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/8196 D2: -- Tos: 17 RegAddr: 0
Executing uInst: LAB0032:106
#MIR: (EUop_Rshft1 Tag_Int Raddr_Tos Waddr_Tos NewArg_Arg' Arg'_Arg-1 CondCode_Arg=0 NextInstA_Done 
NextInstB_Rpt)
****************** Errors ******************
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-11: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-11: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/8196 D2: Ptr-32/0 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-11: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-11: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/4098 D2: -- Tos: 17 RegAddr: 0
Executing uInst: LAB0032:106
#MIR: (EUop_Rshft1 Tag_Int Raddr_Tos Waddr_Tos NewArg_Arg' Arg'_Arg-1 CondCode_Arg=0 NextInstA_Done 
NextInstB_Rpt)
****************** Errors ******************
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-11: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-11: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/4098 D2: Ptr-32/0 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-11: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-11: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 35 #$Opcode 35 #NCurPc: 25
D1: Int/2049 D2: -- Tos: 17 RegAddr: 0
New Opcode: 35 Length: 2 Data: Object/0 N: 0 PC: 25 OldOpLength: 2
Executing uInst: settype:35
#MIR: (Label_SetType EUop_D2<2>Shl24/D1<30> Tag_D2<8:7> Raddr_Tos RD2addr_MuxRdSel MuxRdSel_IBufN 
Waddr_Tos NextInstA_Done)
****************** Errors ******************
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 20 #$Opcode 35 #NCurPc: 27
D1: Int/2049 D2: Object/0 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 20 #$Opcode 20 #NCurPc: 27
D1: Object/2049 D2: -- Tos: 17 RegAddr: 0
New Opcode: 20 Length: 1 Data: Object/0 N: 32 PC: 27 OldOpLength: 1
Executing uInst: copy:20
#MIR: (Label_Copy EUop_D1 Tag_D1 Raddr_Tos Waddr_Tos' Tos'_Tos+1 NewTos_Tos' NextInstA_Done)
****************** Errors ******************
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 32 #$Opcode 20 #NCurPc: 28
D1: Object/2049 D2: Ptr-32/0 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 32 #$Opcode 32 #NCurPc: 28
D1: Object/2049 D2: -- Tos: 18 RegAddr: 0
New Opcode: 32 Length: 2 Data: Object/0 N: 0 PC: 28 OldOpLength: 2
Executing uInst: getptr:32
#MIR: (Label_Getptr EUop_+ Tag_D2 Dswap Raddr_Tos RD1addr_IBufData W2addr_MarD1 Condcode_PointerpD2 
NextInstB_Ufn-1d)
****************** Errors ******************
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 185 #$Opcode 32 #NCurPc: 30
D1: Object/0 D2: Object/2049 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 185 #$Opcode 32 #NCurPc: 30
D1: Object/2049 D2: -- Tos: 18 RegAddr: 0
Executing uInst: LAB0033:65
#MIR: (Cycle_R1 Waddr_Tos CondCode_NoFault Cwrite NextInstA_Done NextInstB_PageFault)
****************** Errors ******************
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-10: 1 _ 0
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-6: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 185 #$Opcode 32 #NCurPc: 30
D1: Object/2049 D2: Object/2049 Tos: 18 RegAddr: 0
****************** Errors ******************
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-10: 1 _ 0
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-6: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 185 #$Opcode 185 #NCurPc: 30
D1: Int/1073741823 D2: Int/17 Tos: 18 RegAddr: 0
New Opcode: 185 Length: 1 Data: Object/0 N: 26 PC: 30 OldOpLength: 1
Executing uInst: vark_:234
#MIR: (Label_Vark_ EUop_D1 Tag_D1 Raddr_Tos Waddr_0<4>/OpCode<4> NextInstA_Done)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 26 #$Opcode 185 #NCurPc: 31
D1: Int/17 D2: Object/2049 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 26 #$Opcode 26 #NCurPc: 31
D1: Int/17 D2: -- Tos: 18 RegAddr: 0
New Opcode: 26 Length: 1 Data: Object/0 N: 16 PC: 31 OldOpLength: 1
Executing uInst: '1:26
#MIR: (Label_'1 EUop_D2 Tag_Int RD2addr_MuxRdSel MuxRdSel_K K_1 Waddr_Tos' Tos'_Tos+1 NewTos_Tos' 
NextInstA_Done)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 16 #$Opcode 26 #NCurPc: 0
D1: Int/17 D2: Object/1 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 16 #$Opcode 16 #NCurPc: 0
D1: Int/1 D2: -- Tos: 19 RegAddr: 0
New Opcode: 16 Length: 1 Data: Object/0 N: 26 PC: 0 OldOpLength: 1
Executing uInst: and:16
#MIR: (Label_And EUop_And Tag_Int Raddr_Tos RD2addr_Raddr-1 Waddr_Tos' Tos'_Tos-1 NewTos_Tos' 
CondCode_IntegerD1D2 CWrite NextInstA_Done NextInstB_Ufn-2)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 26 #$Opcode 16 #NCurPc: 1
D1: Int/1 D2: Int/17 Tos: 19 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 26 #$Opcode 26 #NCurPc: 1
D1: Int/1 D2: -- Tos: 18 RegAddr: 0
New Opcode: 26 Length: 1 Data: Object/0 N: 10 PC: 1 OldOpLength: 1
Executing uInst: '1:228
#MIR: (Label_'1 EUop_D2 Tag_Int RD2addr_MuxRdSel MuxRdSel_K K_1 Waddr_Tos' Tos'_Tos+1 NewTos_Tos' 
NextInstA_Done)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 10 #$Opcode 26 #NCurPc: 2
D1: Int/1 D2: Object/1 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 10 #$Opcode 10 #NCurPc: 2
D1: Int/1 D2: -- Tos: 19 RegAddr: 0
New Opcode: 10 Length: 1 Data: Object/0 N: 53 PC: 2 OldOpLength: 1
Executing uInst: eq:10
#MIR: (Label_Eq Raddr_Tos RD2addr_Raddr-1 Tos'_Tos-1 NewTos_Tos' CondCode_D1=D2 NextInstA_SetT 
NextInstB_SetNil)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 53 #$Opcode 10 #NCurPc: 3
D1: Int/1 D2: Int/1 Tos: 19 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 53 #$Opcode 10 #NCurPc: 3
D1: Int/1073741823 D2: -- Tos: 18 RegAddr: 0
Executing uInst: sett:222
#MIR: (Label_SetT EUop_D2 Tag_D2 RD2addr_T Waddr_Tos NextInstA_Done)
****************** Errors ******************
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-10: 1 _ 0
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-6: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 53 #$Opcode 10 #NCurPc: 3
D1: Int/1 D2: Atm/3600 Tos: 18 RegAddr: 0
****************** Errors ******************
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-10: 1 _ 0
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-6: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 53 #$Opcode 53 #NCurPc: 3
D1: Atm/3600 D2: -- Tos: 18 RegAddr: 0
New Opcode: 53 Length: 2 Data: Object/7 N: 7 PC: 3 OldOpLength: 2
Executing uInst: fjump:53
#MIR: (Label_FJump EUop_nop Raddr_Tos Tos'_Tos-1 NewTos_Tos' Rd2addr_Nil Condcode_D1#D2 NextInstA_Done
 NextInstB_DoJmp)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 145 #$Opcode 53 #NCurPc: 5
D1: Atm/3600 D2: Atm/3584 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 145 #$Opcode 145 #NCurPc: 5
D1: Int/1073741823 D2: -- Tos: 17 RegAddr: 0
New Opcode: 145 Length: 0 Data: Object/0 N: 3 PC: 5 OldOpLength: 0
Executing uInst: loadibuf:209
#MIR: (Label_LoadIBuf Cycle_R4 RD1addr_PcAddr W2addr_IBufD2PcD1 EUop_+16 Tag_Int 
Misc_ResetInitialRefill CondCode_NoFault NextInstA_Done NextInstB_IBufPageFault)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010010 $Opcode: 145 #$Opcode 145 #NCurPc: 5
D1: Int/592 D2: Ptr-32/0 Tos: 17 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010001 $Opcode: 145 #$Opcode 145 #NCurPc: 5
D1: Int/608 D2: Float/871219192 Tos: 17 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010000 $Opcode: 145 #$Opcode 145 #NCurPc: 5
D1: -- D2: XType/747145454 Tos: 17 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011000 $Opcode: 145 #$Opcode 145 #NCurPc: 5
D1: -- D2: Object/0 Tos: 17 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010100 $Opcode: 145 #$Opcode 145 #NCurPc: 5
D1: -- D2: Object/0 Tos: 17 RegAddr: 0
New Opcode: 145 Length: 5 Data: Int/3 N: 3 PC: 5 OldOpLength: 5
Executing uInst: intconst:81
#MIR: (Label_IntConst EUop_D1 Tag_Int RD1addr_IBufData Waddr_TOS' TOS'_TOS+1 NewTos_Tos' 
NextInstA_Done)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 50 #$Opcode 145 #NCurPc: 10
D1: Int/3 D2: Ptr-32/0 Tos: 17 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 50 #$Opcode 50 #NCurPc: 10
D1: Int/3 D2: -- Tos: 18 RegAddr: 0
New Opcode: 50 Length: 2 Data: Object/5 N: 5 PC: 10 OldOpLength: 2
Executing uInst: dojmp:50
#MIR: (Label_DoJmp EUop_+ Tag_Int RD2addr_PC RD1addr_IBufData W2addr_PCD1 
Misc_Oplength=0&SetInitialRefill NextInstA_Dojmp1)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 145 #$Opcode 50 #NCurPc: 12
D1: Object/5 D2: Int/588 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 145 #$Opcode 50 #NCurPc: 12
D1: Int/593 D2: -- Tos: 18 RegAddr: 0
Executing uInst: dojmp1:193
#MIR: (Label_DoJmp1 NextInstA_Done)
****************** Errors ******************
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-10: 1 _ 0
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-6: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 201 #$Opcode 50 #NCurPc: 17
D1: Int/3 D2: Object/2049 Tos: 18 RegAddr: 0
****************** Errors ******************
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-10: 1 _ 0
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-6: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 201 #$Opcode 201 #NCurPc: 17
D1: Int/1073741823 D2: -- Tos: 18 RegAddr: 0
New Opcode: 201 Length: 0 Data: Object/0 N: 17 PC: 17 OldOpLength: 0
Executing uInst: loadibuf:209
#MIR: (Label_LoadIBuf Cycle_R4 RD1addr_PcAddr W2addr_IBufD2PcD1 EUop_+16 Tag_Int 
Misc_ResetInitialRefill CondCode_NoFault NextInstA_Done NextInstB_IBufPageFault)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010010 $Opcode: 201 #$Opcode 201 #NCurPc: 17
D1: Int/592 D2: Object/2049 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010001 $Opcode: 201 #$Opcode 201 #NCurPc: 17
D1: Int/608 D2: Float/871219192 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010000 $Opcode: 201 #$Opcode 201 #NCurPc: 17
D1: -- D2: XType/747145454 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011000 $Opcode: 201 #$Opcode 201 #NCurPc: 17
D1: -- D2: Object/0 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010100 $Opcode: 201 #$Opcode 201 #NCurPc: 17
D1: -- D2: Object/0 Tos: 18 RegAddr: 0
New Opcode: 201 Length: 1 Data: Object/0 N: 17 PC: 17 OldOpLength: 1
Executing uInst: vark:233
#MIR: (Label_Vark EUop_D1 Tag_D1 Raddr_0<4>/OpCode<4> Waddr_Tos' Tos'_Tos+1 NewTos_Tos' NextInstA_Done
)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 17 #$Opcode 201 #NCurPc: 18
D1: Int/17 D2: Int/2098241 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 17 #$Opcode 17 #NCurPc: 18
D1: Int/17 D2: -- Tos: 19 RegAddr: 0
New Opcode: 17 Length: 1 Data: Object/0 N: 33 PC: 18 OldOpLength: 1
Executing uInst: or:17
#MIR: (Label_Or EUop_Or Tag_Int Raddr_Tos RD2addr_Raddr-1 Waddr_Tos' Tos'_Tos-1 NewTos_Tos' 
CondCode_IntegerD1D2 CWrite NextInstA_Done NextInstB_Ufn-2)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 33 #$Opcode 17 #NCurPc: 19
D1: Int/17 D2: Int/3 Tos: 19 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 33 #$Opcode 33 #NCurPc: 19
D1: Int/19 D2: -- Tos: 18 RegAddr: 0
New Opcode: 33 Length: 2 Data: Object/0 N: 0 PC: 19 OldOpLength: 2
Executing uInst: putptr:228
#MIR: (Label_Putptr EUop_D2 Tag_D2 Raddr_Tos RD2addr_Raddr-1 W2addr_MarD1 Condcode_PointerpD2 
NextInstB_Ufn-2d)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 60 #$Opcode 33 #NCurPc: 21
D1: Int/19 D2: Object/2049 Tos: 18 RegAddr: 0
****************** Errors ******************
#CONDA: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 60 #$Opcode 33 #NCurPc: 21
D1: Object/2049 D2: -- Tos: 18 RegAddr: 0
Executing uInst: LAB0034:229
#MIR: (EUop_+ Tag_D1 RD1addr_Mar RD2addr_MuxRdSel MuxRdSel_IBufN W2addr_MarD1)
****************** Errors ******************
D1-30: 1 _ 0
D1-11: 0 _ 1
D1-4: 1 _ 0
D1-1: 1 _ 0
VAD-11: 0 _ 1
VAD'-11: 1 _ 0
VAD'-4: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 60 #$Opcode 33 #NCurPc: 21
D1: Object/2049 D2: Object/0 Tos: 18 RegAddr: 0
****************** Errors ******************
D1-30: 1 _ 0
D1-11: 0 _ 1
D1-4: 1 _ 0
D1-1: 1 _ 0
VAD-11: 0 _ 1
VAD'-11: 1 _ 0
VAD'-4: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 60 #$Opcode 33 #NCurPc: 21
D1: Object/2049 D2: -- Tos: 18 RegAddr: 0
Executing uInst: LAB0035:109
#MIR: (Cycle_W1 Dswap Raddr_Tos Tos'_Tos-1 NewTos_Tos' CondCode_NoFault CWrite NextInstA_Done 
NextInstB_PageFault)
****************** Errors ******************
D1-30: 1 _ 0
D1-11: 0 _ 1
D1-4: 1 _ 0
D1-1: 1 _ 0
VAD-11: 0 _ 1
VAD'-11: 1 _ 0
VAD'-4: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 60 #$Opcode 33 #NCurPc: 21
D1: Object/2049 D2: Int/19 Tos: 18 RegAddr: 0
****************** Errors ******************
D1-30: 1 _ 0
D1-11: 0 _ 1
D1-4: 1 _ 0
D1-1: 1 _ 0
VAD-11: 0 _ 1
VAD'-11: 1 _ 0
VAD'-4: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 60 #$Opcode 60 #NCurPc: 21
D1: Int/1073741823 D2: -- Tos: 17 RegAddr: 0
New Opcode: 60 Length: 0 Data: Object/0 N: 124 PC: 21 OldOpLength: 0
Executing uInst: loadibuf:209
#MIR: (Label_LoadIBuf Cycle_R4 RD1addr_PcAddr W2addr_IBufD2PcD1 EUop_+16 Tag_Int 
Misc_ResetInitialRefill CondCode_NoFault NextInstA_Done NextInstB_IBufPageFault)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010010 $Opcode: 60 #$Opcode 60 #NCurPc: 21
D1: Int/608 D2: Ptr-32/0 Tos: 17 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010001 $Opcode: 60 #$Opcode 60 #NCurPc: 21
D1: Int/624 D2: Object/0 Tos: 17 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010000 $Opcode: 60 #$Opcode 60 #NCurPc: 21
D1: -- D2: Object/0 Tos: 17 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011000 $Opcode: 60 #$Opcode 60 #NCurPc: 21
D1: -- D2: Object/0 Tos: 17 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010100 $Opcode: 60 #$Opcode 60 #NCurPc: 21
D1: -- D2: Object/0 Tos: 17 RegAddr: 0
New Opcode: 60 Length: 1 Data: Object/0 N: 124 PC: 21 OldOpLength: 1
Executing uInst: reset-vmm:219
#MIR: (Label_Reset-Vmm Misc_Reset-Vmm NextInstA_Done)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 124 #$Opcode 60 #NCurPc: 22
D1: Object/2049 D2: Ptr-32/0 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-30: 1 _ 0
D1-11: 0 _ 1
D1-4: 1 _ 0
D1-1: 1 _ 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 124 #$Opcode 124 #NCurPc: 22
D1: Int/1073741823 D2: -- Tos: 17 RegAddr: 0
New Opcode: 124 Length: 1 Data: Object/0 N: 255 PC: 22 OldOpLength: 1
Executing uInst: retnp:220
#MIR: (Label_Retnp EUop_D1 Tag_Int Raddr_K K_StkHdr CondCode_TrapOnExit NextInstA_Ufn-0)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 255 #$Opcode 124 #NCurPc: 23
D1: Int/16 D2: -- Tos: 17 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 255 #$Opcode 124 #NCurPc: 23
D1: Int/16 D2: -- Tos: 17 RegAddr: 0
Executing uInst: LAB0065:139
#MIR: (EUop_D1 Tag_Int RCxt_Prev Raddr_K K_Pc W2Addr_PcD1 NewTopCxt_Prev 
Misc_Oplength=0&SetInitialRefill)
****************** Errors ******************
VAD-11: 0 _ 1
VAD'-11: 1 _ 0
VAD'-4: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 255 #$Opcode 124 #NCurPc: 23
D1: Int/34 D2: XType/1073741589 Tos: 17 RegAddr: 0
****************** Errors ******************
VAD-11: 0 _ 1
VAD'-11: 1 _ 0
VAD'-4: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 255 #$Opcode 124 #NCurPc: 23
D1: Int/34 D2: -- Tos: 17 RegAddr: 0
Executing uInst: LAB0066:140
#MIR: (Dswap Raddr_K K_StkHdr NewTos_D2 NextInstA_Done)
****************** Errors ******************
VAD-11: 0 _ 1
VAD'-11: 1 _ 0
VAD'-4: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 255 #$Opcode 124 #NCurPc: 2
D1: Int/34 D2: XType/1073741589 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-31: 1 _ 0
D1-29: 1 _ 0
D1-28: 1 _ 0
D1-27: 1 _ 0
D1-26: 1 _ 0
D1-25: 1 _ 0
D1-24: 1 _ 0
D1-23: 1 _ 0
D1-22: 1 _ 0
D1-21: 1 _ 0
D1-20: 1 _ 0
D1-19: 1 _ 0
D1-18: 1 _ 0
D1-17: 1 _ 0
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-0: 1 _ 0
VAD-11: 0 _ 1
VAD'-11: 1 _ 0
VAD'-4: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 255 #$Opcode 255 #NCurPc: 2
D1: Int/1073741823 D2: -- Tos: 21 RegAddr: 0
New Opcode: 255 Length: 0 Data: Object/0 N: 255 PC: 2 OldOpLength: 0
Executing uInst: loadibuf:209
#MIR: (Label_LoadIBuf Cycle_R4 RD1addr_PcAddr W2addr_IBufD2PcD1 EUop_+16 Tag_Int 
Misc_ResetInitialRefill CondCode_NoFault NextInstA_Done NextInstB_IBufPageFault)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010010 $Opcode: 255 #$Opcode 255 #NCurPc: 2
D1: Int/32 D2: Object/2098177 Tos: 21 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010001 $Opcode: 255 #$Opcode 255 #NCurPc: 2
D1: Int/48 D2: XType/987200381 Tos: 21 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010000 $Opcode: 255 #$Opcode 255 #NCurPc: 2
D1: -- D2: Int/1072160763 Tos: 21 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011000 $Opcode: 33 #$Opcode 255 #NCurPc: 2
D1: -- D2: XType/1054604287 Tos: 21 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010100 $Opcode: 33 #$Opcode 33 #NCurPc: 2
D1: -- D2: XType/987200351 Tos: 21 RegAddr: 0
New Opcode: 33 Length: 2 Data: Object/64 N: 64 PC: 2 OldOpLength: 2
Executing uInst: putptr:33
#MIR: (Label_Putptr EUop_D2 Tag_D2 Raddr_Tos RD2addr_Raddr-1 W2addr_MarD1 Condcode_PointerpD2 
NextInstB_Ufn-2d)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 144 #$Opcode 33 #NCurPc: 4
D1: Int/7 D2: Object/2098177 Tos: 21 RegAddr: 0
****************** Errors ******************
D1-21: 1 _ 0
D1-10: 1 _ 0
D1-6: 1 _ 0
D1-2: 0 _ 1
D1-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 144 #$Opcode 33 #NCurPc: 4
D1: Object/2098177 D2: -- Tos: 21 RegAddr: 0
Executing uInst: LAB0034:229
#MIR: (EUop_+ Tag_D1 RD1addr_Mar RD2addr_MuxRdSel MuxRdSel_IBufN W2addr_MarD1)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 144 #$Opcode 33 #NCurPc: 4
D1: Object/2098177 D2: Object/64 Tos: 21 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 144 #$Opcode 33 #NCurPc: 4
D1: Object/2098241 D2: -- Tos: 21 RegAddr: 0
Executing uInst: LAB0035:109
#MIR: (Cycle_W1 Dswap Raddr_Tos Tos'_Tos-1 NewTos_Tos' CondCode_NoFault CWrite NextInstA_Done 
NextInstB_PageFault)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 144 #$Opcode 33 #NCurPc: 4
D1: Object/2098177 D2: Int/7 Tos: 21 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010000 $Opcode: 144 #$Opcode 33 #NCurPc: 4
D1: -- D2: Int/19 Tos: 21 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 144 #$Opcode 33 #NCurPc: 4
D1: Object/2098177 D2: Int/7 Tos: 21 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 144 #$Opcode 144 #NCurPc: 4
D1: Int/1073741823 D2: -- Tos: 20 RegAddr: 0
New Opcode: 144 Length: 0 Data: Object/0 N: 1 PC: 4 OldOpLength: 0
Executing uInst: loadibuf:209
#MIR: (Label_LoadIBuf Cycle_R4 RD1addr_PcAddr W2addr_IBufD2PcD1 EUop_+16 Tag_Int 
Misc_ResetInitialRefill CondCode_NoFault NextInstA_Done NextInstB_IBufPageFault)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010010 $Opcode: 144 #$Opcode 144 #NCurPc: 4
D1: Int/48 D2: Int/6 Tos: 20 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010001 $Opcode: 144 #$Opcode 144 #NCurPc: 4
D1: Int/64 D2: XType/928513019 Tos: 20 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010000 $Opcode: 144 #$Opcode 144 #NCurPc: 4
D1: -- D2: Float/143165568 Tos: 20 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011000 $Opcode: 144 #$Opcode 144 #NCurPc: 4
D1: -- D2: Object/0 Tos: 20 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010100 $Opcode: 144 #$Opcode 144 #NCurPc: 4
D1: -- D2: Object/0 Tos: 20 RegAddr: 0
New Opcode: 144 Length: 5 Data: Object/2099201 N: 1 PC: 4 OldOpLength: 5
Executing uInst: pconst:80
#MIR: (Label_PConst EUop_D2<2>Shl24/D1<30> Tag_D2<8:7> RD2addr_MuxRdSel MuxRdSel_K K_PtrTypeBits 
RD1addr_IBufData Waddr_TOS' TOS'_TOS+1 NewTos_Tos' NextInstA_Done)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 20 #$Opcode 144 #NCurPc: 9
D1: Object/2099201 D2: Object/0 Tos: 20 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 20 #$Opcode 20 #NCurPc: 9
D1: Object/2099201 D2: -- Tos: 21 RegAddr: 0
New Opcode: 20 Length: 1 Data: Object/0 N: 32 PC: 9 OldOpLength: 1
Executing uInst: copy:20
#MIR: (Label_Copy EUop_D1 Tag_D1 Raddr_Tos Waddr_Tos' Tos'_Tos+1 NewTos_Tos' NextInstA_Done)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 32 #$Opcode 20 #NCurPc: 10
D1: Object/2099201 D2: Object/2098177 Tos: 21 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 32 #$Opcode 32 #NCurPc: 10
D1: Object/2099201 D2: -- Tos: 22 RegAddr: 0
New Opcode: 32 Length: 2 Data: Object/64 N: 64 PC: 10 OldOpLength: 2
Executing uInst: getptr:32
#MIR: (Label_Getptr EUop_+ Tag_D2 Dswap Raddr_Tos RD1addr_IBufData W2addr_MarD1 Condcode_PointerpD2 
NextInstB_Ufn-1d)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 26 #$Opcode 32 #NCurPc: 12
D1: Object/64 D2: Object/2099201 Tos: 22 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 26 #$Opcode 32 #NCurPc: 12
D1: Object/2099265 D2: -- Tos: 22 RegAddr: 0
Executing uInst: LAB0033:65
#MIR: (Cycle_R1 Waddr_Tos CondCode_NoFault Cwrite NextInstA_Done NextInstB_PageFault)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 26 #$Opcode 32 #NCurPc: 12
D1: Object/2099201 D2: Object/2099201 Tos: 22 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010000 $Opcode: 26 #$Opcode 32 #NCurPc: 12
D1: -- D2: Int/16 Tos: 22 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 26 #$Opcode 32 #NCurPc: 12
D1: Object/2099201 D2: Object/2099201 Tos: 22 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011000 $Opcode: 26 #$Opcode 32 #NCurPc: 12
D1: -- D2: -- Tos: 22 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010100 $Opcode: 26 #$Opcode 32 #NCurPc: 12
D1: -- D2: -- Tos: 22 RegAddr: 0
Executing uInst: pagefault:212
#MIR: (Label_PageFault EUop_D1 Tag_Int RD1addr_Mar Waddr_Tos' Tos'_Tos+1 NewTos_Tos' NewArg_K K_1 
Misc_OpLength=0 CondCode_FramesAvail Cwrite NextInstB_DumpFrame)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 26 #$Opcode 32 #NCurPc: 12
D1: Object/2099265 D2: Object/2099201 Tos: 22 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 26 #$Opcode 32 #NCurPc: 12
D1: Int/2099265 D2: -- Tos: 23 RegAddr: 0
Executing uInst: LAB0072:146
#MIR: (EUop_D1 Tag_D1 Raddr_K K_PFCode RCxt_K W2addr_MarD1 NextInstA_Fn1)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 32 #$Opcode 32 #NCurPc: 10
D1: Code/100663424 D2: -- Tos: 23 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 32 #$Opcode 32 #NCurPc: 10
D1: Code/100663424 D2: -- Tos: 23 RegAddr: 0
Executing uInst: fn1:197
#MIR: (Label_Fn1 EUop_+4 Tag_D1 RD1addr_Mar W2addr_MarD1 NewArg2_Arg NewArg_K K_StkHdr CondCode_CCodeP
 NextInstB_Fn5)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 32 #$Opcode 32 #NCurPc: 10
D1: Code/100663424 D2: Object/2099201 Tos: 23 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 32 #$Opcode 32 #NCurPc: 10
D1: Code/100663428 D2: -- Tos: 23 RegAddr: 0
Executing uInst: LAB0041:115
#MIR: (Cycle_R4 WCxt_Next Waddr_Arg<6>/QW<2> EUop_+4 Tag_D1 RD1addr_Mar W2addr_MarD1 CondCode_NoFault 
NextInstB_PageFault)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010010 $Opcode: 32 #$Opcode 32 #NCurPc: 10
D1: Code/100663428 D2: Object/2099201 Tos: 23 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010001 $Opcode: 32 #$Opcode 32 #NCurPc: 10
D1: Code/100663432 D2: Int/16 Tos: 23 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010000 $Opcode: 32 #$Opcode 32 #NCurPc: 10
D1: -- D2: Int/0 Tos: 23 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011000 $Opcode: 32 #$Opcode 32 #NCurPc: 10
D1: -- D2: Code/100663424 Tos: 23 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010100 $Opcode: 32 #$Opcode 32 #NCurPc: 10
D1: -- D2: Code/100663424 Tos: 23 RegAddr: 0
Executing uInst: LAB0042:116
#MIR: (EUop_D2 Tag_D2 RD2addr_Unbound Waddr_K K_PVar WCxt_Next Misc_WriteOctal NewArg_Arg2)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 32 #$Opcode 32 #NCurPc: 10
D1: Int/2099265 D2: Ptr-32/0 Tos: 23 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 32 #$Opcode 32 #NCurPc: 10
D1: Ptr-32/0 D2: -- Tos: 23 RegAddr: 0
Executing uInst: fn2:198
#MIR: (Label_Fn2 EUop_D2 Tag_D2 RD2addr_Nil Waddr_K K_IVar WCxt_Next Misc_WriteOctal)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 32 #$Opcode 32 #NCurPc: 10
D1: Int/2099265 D2: Atm/3584 Tos: 23 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 32 #$Opcode 32 #NCurPc: 10
D1: Atm/3584 D2: -- Tos: 23 RegAddr: 0
Executing uInst: LAB0043:117
#MIR: (EUop_D2 Tag_Int RD2addr_PC Waddr_K K_Pc Misc_Oplength=0&SetInitialRefill)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 32 #$Opcode 32 #NCurPc: 10
D1: Int/2099265 D2: Int/42 Tos: 23 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 32 #$Opcode 32 #NCurPc: 10
D1: Int/42 D2: -- Tos: 23 RegAddr: 0
Executing uInst: LAB0044:118
#MIR: (EUop_+ Tag_Int RD1addr_Mar RD2addr_MuxRdSel MuxRdSel_Arg W2Addr_MarD1)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 32 #$Opcode 32 #NCurPc: 10
D1: Code/100663432 D2: Object/1 Tos: 23 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 32 #$Opcode 32 #NCurPc: 10
D1: Int/100663433 D2: -- Tos: 23 RegAddr: 0
Executing uInst: LAB0045:119
#MIR: (Cycle_R1 Waddr_K WCxt_Next K_Pc)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 32 #$Opcode 32 #NCurPc: 10
D1: Int/2099265 D2: Object/2099201 Tos: 23 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 32 #$Opcode 32 #NCurPc: 10
D1: Int/1073741823 D2: Int/560 Tos: 23 RegAddr: 0
Executing uInst: LAB0046:120
#MIR: (EUop_D1 Tag_Int Raddr_K RCxt_Next K_PC W2addr_PCD1)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 32 #$Opcode 32 #NCurPc: 10
D1: Int/560 D2: Int/16 Tos: 23 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 32 #$Opcode 32 #NCurPc: 10
D1: Int/560 D2: -- Tos: 23 RegAddr: 0
Executing uInst: LAB0047:121
#MIR: (EUop_D2 Tag_Int RD2addr_MuxRdSel MuxRdSel_K K_Ivar NewArg2_K W2addr_MarD1 NewArg_Arg' 
Arg'_Arg-1 CondCode_Arg#0 NextInstB_Fn3)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 112 #$Opcode 32 #NCurPc: 16
D1: Int/2099265 D2: Object/8 Tos: 23 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 112 #$Opcode 32 #NCurPc: 16
D1: Int/8 D2: -- Tos: 23 RegAddr: 0
Executing uInst: LAB0048:122
#MIR: (EUop_+ Tag_Int RD1addr_Mar RD2addr_MuxRdSel MuxRdSel_Arg W2addr_Tmp1D1)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 112 #$Opcode 32 #NCurPc: 16
D1: Int/8 D2: Object/0 Tos: 23 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 112 #$Opcode 32 #NCurPc: 16
D1: Int/8 D2: -- Tos: 23 RegAddr: 0
Executing uInst: LAB0049:123
#MIR: (RD2addr_Tmp1 NewArg_D2)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 112 #$Opcode 32 #NCurPc: 16
D1: Int/2099265 D2: Int/8 Tos: 23 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 112 #$Opcode 32 #NCurPc: 16
D1: Int/1073741823 D2: -- Tos: 23 RegAddr: 0
Executing uInst: LAB0050:124
#MIR: (EUop_D1 Tag_D1 Raddr_Tos WCxt_Next Waddr_Arg NewTos_Tos' Tos'_Tos-1 NewArg_Arg' Arg'_Arg-1 
CondCode_Arg=Arg2 NextInstB_Rpt)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 112 #$Opcode 32 #NCurPc: 16
D1: Int/2099265 D2: Object/2099201 Tos: 23 RegAddr: 0
****************** Errors ******************
#CONDA: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 112 #$Opcode 32 #NCurPc: 16
D1: Int/2099265 D2: -- Tos: 22 RegAddr: 0
Executing uInst: fn3:199
#MIR: (Label_Fn3 EUop_D1<24>/D2<8> Tag_D1 RD2addr_MuxRdSel MuxRdSel_Tos Raddr_K Waddr_K K_StkHdr)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 112 #$Opcode 32 #NCurPc: 16
D1: XType/1073741589 D2: Object/22 Tos: 22 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 112 #$Opcode 32 #NCurPc: 16
D1: XType/1073741590 D2: -- Tos: 22 RegAddr: 0
Executing uInst: LAB0051:125
#MIR: (EUop_D2 Tag_D2 Dswap Raddr_K K_StkHdr RCxt_Next WCxt_Next NewTos_D2 NewTopCxt_Next 
NextInstA_Done)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 112 #$Opcode 32 #NCurPc: 16
D1: -- D2: Int/16 Tos: 22 RegAddr: 0
****************** Errors ******************
D1-31: 0 _ 1
D1-29: 0 _ 1
D1-28: 0 _ 1
D1-27: 0 _ 1
D1-26: 0 _ 1
D1-25: 0 _ 1
D1-24: 0 _ 1
D1-23: 0 _ 1
D1-22: 0 _ 1
D1-21: 0 _ 1
D1-20: 0 _ 1
D1-19: 0 _ 1
D1-18: 0 _ 1
D1-17: 0 _ 1
D1-16: 0 _ 1
D1-15: 0 _ 1
D1-14: 0 _ 1
D1-13: 0 _ 1
D1-12: 0 _ 1
D1-11: 0 _ 1
D1-10: 0 _ 1
D1-9: 0 _ 1
D1-8: 0 _ 1
D1-7: 0 _ 1
D1-6: 0 _ 1
D1-5: 0 _ 1
D1-3: 0 _ 1
D1-2: 0 _ 1
D1-1: 0 _ 1
D1-0: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 112 #$Opcode 112 #NCurPc: 16
D1: Int/16 D2: -- Tos: 16 RegAddr: 0
New Opcode: 112 Length: 0 Data: Object/0 N: 5 PC: 16 OldOpLength: 0
Executing uInst: loadibuf:209
#MIR: (Label_LoadIBuf Cycle_R4 RD1addr_PcAddr W2addr_IBufD2PcD1 EUop_+16 Tag_Int 
Misc_ResetInitialRefill CondCode_NoFault NextInstA_Done NextInstB_IBufPageFault)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010010 $Opcode: 112 #$Opcode 112 #NCurPc: 16
D1: Int/560 D2: Atm/3584 Tos: 16 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010001 $Opcode: 112 #$Opcode 112 #NCurPc: 16
D1: Int/576 D2: List/80235720 Tos: 16 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010000 $Opcode: 112 #$Opcode 112 #NCurPc: 16
D1: -- D2: Int/862283366 Tos: 16 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011000 $Opcode: 200 #$Opcode 112 #NCurPc: 16
D1: -- D2: XType/1069448763 Tos: 16 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010100 $Opcode: 200 #$Opcode 200 #NCurPc: 16
D1: -- D2: XType/526176237 Tos: 16 RegAddr: 0
New Opcode: 200 Length: 1 Data: Object/0 N: 145 PC: 16 OldOpLength: 1
Executing uInst: vark:233
#MIR: (Label_Vark EUop_D1 Tag_D1 Raddr_0<4>/OpCode<4> Waddr_Tos' Tos'_Tos+1 NewTos_Tos' NextInstA_Done
)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 145 #$Opcode 200 #NCurPc: 17
D1: Int/2099265 D2: -- Tos: 16 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 145 #$Opcode 145 #NCurPc: 17
D1: Int/2099265 D2: -- Tos: 17 RegAddr: 0
New Opcode: 145 Length: 5 Data: Int/16777215 N: 255 PC: 17 OldOpLength: 5
Executing uInst: intconst:81
#MIR: (Label_IntConst EUop_D1 Tag_Int RD1addr_IBufData Waddr_TOS' TOS'_TOS+1 NewTos_Tos' 
NextInstA_Done)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 16 #$Opcode 145 #NCurPc: 22
D1: Int/16777215 D2: Ptr-32/0 Tos: 17 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 16 #$Opcode 16 #NCurPc: 22
D1: Int/16777215 D2: -- Tos: 18 RegAddr: 0
New Opcode: 16 Length: 0 Data: Object/0 N: 47 PC: 22 OldOpLength: 0
Executing uInst: loadibuf:209
#MIR: (Label_LoadIBuf Cycle_R4 RD1addr_PcAddr W2addr_IBufD2PcD1 EUop_+16 Tag_Int 
Misc_ResetInitialRefill CondCode_NoFault NextInstA_Done NextInstB_IBufPageFault)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010010 $Opcode: 16 #$Opcode 16 #NCurPc: 22
D1: Int/576 D2: Int/2099265 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010001 $Opcode: 16 #$Opcode 16 #NCurPc: 22
D1: Int/592 D2: XType/1071816350 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010000 $Opcode: 16 #$Opcode 16 #NCurPc: 22
D1: -- D2: Float/1073477457 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011000 $Opcode: 16 #$Opcode 16 #NCurPc: 22
D1: -- D2: XType/1004404446 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010100 $Opcode: 16 #$Opcode 16 #NCurPc: 22
D1: -- D2: Int/1073217523 Tos: 18 RegAddr: 0
New Opcode: 16 Length: 1 Data: Object/0 N: 47 PC: 22 OldOpLength: 1
Executing uInst: and:16
#MIR: (Label_And EUop_And Tag_Int Raddr_Tos RD2addr_Raddr-1 Waddr_Tos' Tos'_Tos-1 NewTos_Tos' 
CondCode_IntegerD1D2 CWrite NextInstA_Done NextInstB_Ufn-2)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 47 #$Opcode 16 #NCurPc: 23
D1: Int/16777215 D2: Int/2099265 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 47 #$Opcode 47 #NCurPc: 23
D1: Int/2099265 D2: -- Tos: 17 RegAddr: 0
New Opcode: 47 Length: 2 Data: Object/10 N: 10 PC: 23 OldOpLength: 2
Executing uInst: lrsh.n:228
#MIR: (Label_Lrsh.N EUop_D1 Tag_Int Raddr_Tos W2addr_MarD1 NewArg_IBufN CondCode_Integerp 
NextInstB_Ufn-1d)
****************** Errors ******************
D1-23: 1 _ 0
D1-22: 1 _ 0
D1-20: 1 _ 0
D1-19: 1 _ 0
D1-18: 1 _ 0
D1-17: 1 _ 0
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/2099265 D2: Ptr-32/0 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-23: 1 _ 0
D1-22: 1 _ 0
D1-20: 1 _ 0
D1-19: 1 _ 0
D1-18: 1 _ 0
D1-17: 1 _ 0
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/2099265 D2: -- Tos: 17 RegAddr: 0
Executing uInst: LAB0031:105
#MIR: (Arg'_Arg-1 NewArg_Arg' CondCode_Arg=0 NextInstA_Done)
****************** Errors ******************
D1-23: 1 _ 0
D1-22: 1 _ 0
D1-20: 1 _ 0
D1-19: 1 _ 0
D1-18: 1 _ 0
D1-17: 1 _ 0
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-10: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/2099265 D2: Ptr-32/0 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-23: 1 _ 0
D1-22: 1 _ 0
D1-20: 1 _ 0
D1-19: 1 _ 0
D1-18: 1 _ 0
D1-17: 1 _ 0
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-10: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/1073741823 D2: -- Tos: 17 RegAddr: 0
Executing uInst: LAB0032:106
#MIR: (EUop_Rshft1 Tag_Int Raddr_Tos Waddr_Tos NewArg_Arg' Arg'_Arg-1 CondCode_Arg=0 NextInstA_Done 
NextInstB_Rpt)
****************** Errors ******************
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-10: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/2099265 D2: Ptr-32/0 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-23: 1 _ 0
D1-22: 1 _ 0
D1-20: 1 _ 0
D1-19: 1 _ 0
D1-18: 1 _ 0
D1-17: 1 _ 0
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-10: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/1049632 D2: -- Tos: 17 RegAddr: 0
Executing uInst: LAB0032:106
#MIR: (EUop_Rshft1 Tag_Int Raddr_Tos Waddr_Tos NewArg_Arg' Arg'_Arg-1 CondCode_Arg=0 NextInstA_Done 
NextInstB_Rpt)
****************** Errors ******************
D1-22: 1 _ 0
D1-21: 1 _ 0
D1-19: 1 _ 0
D1-18: 1 _ 0
D1-17: 1 _ 0
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-10: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/1049632 D2: Ptr-32/0 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-22: 1 _ 0
D1-21: 1 _ 0
D1-19: 1 _ 0
D1-18: 1 _ 0
D1-17: 1 _ 0
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-10: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/524816 D2: -- Tos: 17 RegAddr: 0
Executing uInst: LAB0032:106
#MIR: (EUop_Rshft1 Tag_Int Raddr_Tos Waddr_Tos NewArg_Arg' Arg'_Arg-1 CondCode_Arg=0 NextInstA_Done 
NextInstB_Rpt)
****************** Errors ******************
D1-21: 1 _ 0
D1-20: 1 _ 0
D1-18: 1 _ 0
D1-17: 1 _ 0
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-10: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/524816 D2: Ptr-32/0 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-21: 1 _ 0
D1-20: 1 _ 0
D1-18: 1 _ 0
D1-17: 1 _ 0
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-10: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/262408 D2: -- Tos: 17 RegAddr: 0
Executing uInst: LAB0032:106
#MIR: (EUop_Rshft1 Tag_Int Raddr_Tos Waddr_Tos NewArg_Arg' Arg'_Arg-1 CondCode_Arg=0 NextInstA_Done 
NextInstB_Rpt)
****************** Errors ******************
D1-20: 1 _ 0
D1-19: 1 _ 0
D1-17: 1 _ 0
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-10: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/262408 D2: Ptr-32/0 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-20: 1 _ 0
D1-19: 1 _ 0
D1-17: 1 _ 0
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-10: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/131204 D2: -- Tos: 17 RegAddr: 0
Executing uInst: LAB0032:106
#MIR: (EUop_Rshft1 Tag_Int Raddr_Tos Waddr_Tos NewArg_Arg' Arg'_Arg-1 CondCode_Arg=0 NextInstA_Done 
NextInstB_Rpt)
****************** Errors ******************
D1-19: 1 _ 0
D1-18: 1 _ 0
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-10: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/131204 D2: Ptr-32/0 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-19: 1 _ 0
D1-18: 1 _ 0
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-10: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/65602 D2: -- Tos: 17 RegAddr: 0
Executing uInst: LAB0032:106
#MIR: (EUop_Rshft1 Tag_Int Raddr_Tos Waddr_Tos NewArg_Arg' Arg'_Arg-1 CondCode_Arg=0 NextInstA_Done 
NextInstB_Rpt)
****************** Errors ******************
D1-18: 1 _ 0
D1-17: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-10: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/65602 D2: Ptr-32/0 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-18: 1 _ 0
D1-17: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-10: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/32801 D2: -- Tos: 17 RegAddr: 0
Executing uInst: LAB0032:106
#MIR: (EUop_Rshft1 Tag_Int Raddr_Tos Waddr_Tos NewArg_Arg' Arg'_Arg-1 CondCode_Arg=0 NextInstA_Done 
NextInstB_Rpt)
****************** Errors ******************
D1-17: 1 _ 0
D1-16: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-10: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/32801 D2: Ptr-32/0 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-17: 1 _ 0
D1-16: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-10: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/16400 D2: -- Tos: 17 RegAddr: 0
Executing uInst: LAB0032:106
#MIR: (EUop_Rshft1 Tag_Int Raddr_Tos Waddr_Tos NewArg_Arg' Arg'_Arg-1 CondCode_Arg=0 NextInstA_Done 
NextInstB_Rpt)
****************** Errors ******************
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-10: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/16400 D2: Ptr-32/0 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-10: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/8200 D2: -- Tos: 17 RegAddr: 0
Executing uInst: LAB0032:106
#MIR: (EUop_Rshft1 Tag_Int Raddr_Tos Waddr_Tos NewArg_Arg' Arg'_Arg-1 CondCode_Arg=0 NextInstA_Done 
NextInstB_Rpt)
****************** Errors ******************
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-10: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/8200 D2: Ptr-32/0 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-10: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/4100 D2: -- Tos: 17 RegAddr: 0
Executing uInst: LAB0032:106
#MIR: (EUop_Rshft1 Tag_Int Raddr_Tos Waddr_Tos NewArg_Arg' Arg'_Arg-1 CondCode_Arg=0 NextInstA_Done 
NextInstB_Rpt)
****************** Errors ******************
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-10: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/4100 D2: Ptr-32/0 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-10: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 35 #$Opcode 35 #NCurPc: 25
D1: Int/2050 D2: -- Tos: 17 RegAddr: 0
New Opcode: 35 Length: 2 Data: Object/0 N: 0 PC: 25 OldOpLength: 2
Executing uInst: settype:35
#MIR: (Label_SetType EUop_D2<2>Shl24/D1<30> Tag_D2<8:7> Raddr_Tos RD2addr_MuxRdSel MuxRdSel_IBufN 
Waddr_Tos NextInstA_Done)
****************** Errors ******************
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-0: 1 _ 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 20 #$Opcode 35 #NCurPc: 27
D1: Int/2050 D2: Object/0 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-0: 1 _ 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 20 #$Opcode 20 #NCurPc: 27
D1: Object/2050 D2: -- Tos: 17 RegAddr: 0
New Opcode: 20 Length: 1 Data: Object/0 N: 32 PC: 27 OldOpLength: 1
Executing uInst: copy:20
#MIR: (Label_Copy EUop_D1 Tag_D1 Raddr_Tos Waddr_Tos' Tos'_Tos+1 NewTos_Tos' NextInstA_Done)
****************** Errors ******************
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-0: 1 _ 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 32 #$Opcode 20 #NCurPc: 28
D1: Object/2050 D2: Ptr-32/0 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-0: 1 _ 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 32 #$Opcode 32 #NCurPc: 28
D1: Object/2050 D2: -- Tos: 18 RegAddr: 0
New Opcode: 32 Length: 2 Data: Object/0 N: 0 PC: 28 OldOpLength: 2
Executing uInst: getptr:32
#MIR: (Label_Getptr EUop_+ Tag_D2 Dswap Raddr_Tos RD1addr_IBufData W2addr_MarD1 Condcode_PointerpD2 
NextInstB_Ufn-1d)
****************** Errors ******************
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-0: 1 _ 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 185 #$Opcode 32 #NCurPc: 30
D1: Object/0 D2: Object/2050 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 185 #$Opcode 32 #NCurPc: 30
D1: Object/2050 D2: -- Tos: 18 RegAddr: 0
Executing uInst: LAB0033:65
#MIR: (Cycle_R1 Waddr_Tos CondCode_NoFault Cwrite NextInstA_Done NextInstB_PageFault)
****************** Errors ******************
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-0: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-10: 1 _ 0
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-6: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-0: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 185 #$Opcode 32 #NCurPc: 30
D1: Object/2050 D2: Object/2050 Tos: 18 RegAddr: 0
****************** Errors ******************
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-0: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-10: 1 _ 0
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-6: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-0: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 185 #$Opcode 185 #NCurPc: 30
D1: Int/1073741823 D2: Int/16 Tos: 18 RegAddr: 0
New Opcode: 185 Length: 1 Data: Object/0 N: 26 PC: 30 OldOpLength: 1
Executing uInst: vark_:234
#MIR: (Label_Vark_ EUop_D1 Tag_D1 Raddr_Tos Waddr_0<4>/OpCode<4> NextInstA_Done)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 26 #$Opcode 185 #NCurPc: 31
D1: Int/16 D2: Object/2050 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 26 #$Opcode 26 #NCurPc: 31
D1: Int/16 D2: -- Tos: 18 RegAddr: 0
New Opcode: 26 Length: 1 Data: Object/0 N: 16 PC: 31 OldOpLength: 1
Executing uInst: '1:26
#MIR: (Label_'1 EUop_D2 Tag_Int RD2addr_MuxRdSel MuxRdSel_K K_1 Waddr_Tos' Tos'_Tos+1 NewTos_Tos' 
NextInstA_Done)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 16 #$Opcode 26 #NCurPc: 0
D1: Int/16 D2: Object/1 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 16 #$Opcode 16 #NCurPc: 0
D1: Int/1 D2: -- Tos: 19 RegAddr: 0
New Opcode: 16 Length: 1 Data: Object/0 N: 26 PC: 0 OldOpLength: 1
Executing uInst: and:16
#MIR: (Label_And EUop_And Tag_Int Raddr_Tos RD2addr_Raddr-1 Waddr_Tos' Tos'_Tos-1 NewTos_Tos' 
CondCode_IntegerD1D2 CWrite NextInstA_Done NextInstB_Ufn-2)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 26 #$Opcode 16 #NCurPc: 1
D1: Int/1 D2: Int/16 Tos: 19 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 26 #$Opcode 26 #NCurPc: 1
D1: Int/0 D2: -- Tos: 18 RegAddr: 0
New Opcode: 26 Length: 1 Data: Object/0 N: 10 PC: 1 OldOpLength: 1
Executing uInst: '1:228
#MIR: (Label_'1 EUop_D2 Tag_Int RD2addr_MuxRdSel MuxRdSel_K K_1 Waddr_Tos' Tos'_Tos+1 NewTos_Tos' 
NextInstA_Done)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 10 #$Opcode 26 #NCurPc: 2
D1: Int/0 D2: Object/1 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 10 #$Opcode 10 #NCurPc: 2
D1: Int/1 D2: -- Tos: 19 RegAddr: 0
New Opcode: 10 Length: 1 Data: Object/0 N: 53 PC: 2 OldOpLength: 1
Executing uInst: eq:10
#MIR: (Label_Eq Raddr_Tos RD2addr_Raddr-1 Tos'_Tos-1 NewTos_Tos' CondCode_D1=D2 NextInstA_SetT 
NextInstB_SetNil)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 53 #$Opcode 10 #NCurPc: 3
D1: Int/1 D2: Int/0 Tos: 19 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 53 #$Opcode 10 #NCurPc: 3
D1: Int/1073741823 D2: -- Tos: 18 RegAddr: 0
Executing uInst: setnil:222
#MIR: (Label_SetNil EUop_D2 Tag_D2 RD2addr_Nil Waddr_Tos NextInstA_Done)
****************** Errors ******************
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-10: 1 _ 0
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-6: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-0: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 53 #$Opcode 10 #NCurPc: 3
D1: Int/0 D2: Atm/3584 Tos: 18 RegAddr: 0
****************** Errors ******************
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-10: 1 _ 0
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-6: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-0: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 53 #$Opcode 53 #NCurPc: 3
D1: Atm/3584 D2: -- Tos: 18 RegAddr: 0
New Opcode: 53 Length: 2 Data: Object/7 N: 7 PC: 3 OldOpLength: 2
Executing uInst: fjump:53
#MIR: (Label_FJump EUop_nop Raddr_Tos Tos'_Tos-1 NewTos_Tos' Rd2addr_Nil Condcode_D1#D2 NextInstA_Done
 NextInstB_DoJmp)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 145 #$Opcode 53 #NCurPc: 5
D1: Atm/3584 D2: Atm/3584 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 145 #$Opcode 53 #NCurPc: 5
D1: Int/1073741823 D2: -- Tos: 17 RegAddr: 0
Executing uInst: dojmp:209
#MIR: (Label_DoJmp EUop_+ Tag_Int RD2addr_PC RD1addr_IBufData W2addr_PCD1 
Misc_Oplength=0&SetInitialRefill NextInstA_Dojmp1)
****************** Errors ******************
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-10: 1 _ 0
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-6: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-0: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 145 #$Opcode 53 #NCurPc: 5
D1: Object/7 D2: Int/581 Tos: 17 RegAddr: 0
****************** Errors ******************
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-10: 1 _ 0
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-6: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-0: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 145 #$Opcode 53 #NCurPc: 5
D1: Int/588 D2: -- Tos: 17 RegAddr: 0
Executing uInst: dojmp1:193
#MIR: (Label_DoJmp1 NextInstA_Done)
****************** Errors ******************
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-10: 1 _ 0
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-6: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-0: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 145 #$Opcode 53 #NCurPc: 12
D1: Object/2050 D2: Ptr-32/0 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-30: 1 _ 0
D1-11: 0 _ 1
D1-1: 0 _ 1
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-10: 1 _ 0
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-6: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-0: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 145 #$Opcode 145 #NCurPc: 12
D1: Int/1073741823 D2: -- Tos: 17 RegAddr: 0
New Opcode: 145 Length: 0 Data: Object/0 N: 1 PC: 12 OldOpLength: 0
Executing uInst: loadibuf:209
#MIR: (Label_LoadIBuf Cycle_R4 RD1addr_PcAddr W2addr_IBufD2PcD1 EUop_+16 Tag_Int 
Misc_ResetInitialRefill CondCode_NoFault NextInstA_Done NextInstB_IBufPageFault)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010010 $Opcode: 145 #$Opcode 145 #NCurPc: 12
D1: Int/576 D2: Ptr-32/0 Tos: 17 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010001 $Opcode: 145 #$Opcode 145 #NCurPc: 12
D1: Int/592 D2: XType/1071816350 Tos: 17 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010000 $Opcode: 145 #$Opcode 145 #NCurPc: 12
D1: -- D2: Float/1073477457 Tos: 17 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011000 $Opcode: 145 #$Opcode 145 #NCurPc: 12
D1: -- D2: XType/1004404446 Tos: 17 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010100 $Opcode: 145 #$Opcode 145 #NCurPc: 12
D1: -- D2: Int/1073217523 Tos: 17 RegAddr: 0
New Opcode: 145 Length: 0 Data: Object/0 N: 1 PC: 12 OldOpLength: 0
Executing uInst: loadibuf:209
#MIR: (Label_LoadIBuf Cycle_R4 RD1addr_PcAddr W2addr_IBufD2PcD1 EUop_+16 Tag_Int 
Misc_ResetInitialRefill CondCode_NoFault NextInstA_Done NextInstB_IBufPageFault)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010010 $Opcode: 145 #$Opcode 145 #NCurPc: 12
D1: Int/592 D2: Ptr-32/0 Tos: 17 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010001 $Opcode: 145 #$Opcode 145 #NCurPc: 12
D1: Int/608 D2: Float/871219192 Tos: 17 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010000 $Opcode: 145 #$Opcode 145 #NCurPc: 12
D1: -- D2: XType/747145454 Tos: 17 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011000 $Opcode: 145 #$Opcode 145 #NCurPc: 12
D1: -- D2: Object/0 Tos: 17 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010100 $Opcode: 145 #$Opcode 145 #NCurPc: 12
D1: -- D2: Object/0 Tos: 17 RegAddr: 0
New Opcode: 145 Length: 5 Data: Int/1 N: 1 PC: 12 OldOpLength: 5
Executing uInst: intconst:81
#MIR: (Label_IntConst EUop_D1 Tag_Int RD1addr_IBufData Waddr_TOS' TOS'_TOS+1 NewTos_Tos' 
NextInstA_Done)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 201 #$Opcode 145 #NCurPc: 17
D1: Int/1 D2: Ptr-32/0 Tos: 17 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 201 #$Opcode 201 #NCurPc: 17
D1: Int/1 D2: -- Tos: 18 RegAddr: 0
New Opcode: 201 Length: 1 Data: Object/0 N: 17 PC: 17 OldOpLength: 1
Executing uInst: vark:233
#MIR: (Label_Vark EUop_D1 Tag_D1 Raddr_0<4>/OpCode<4> Waddr_Tos' Tos'_Tos+1 NewTos_Tos' NextInstA_Done
)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 17 #$Opcode 201 #NCurPc: 18
D1: Int/16 D2: Int/2099265 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 17 #$Opcode 17 #NCurPc: 18
D1: Int/16 D2: -- Tos: 19 RegAddr: 0
New Opcode: 17 Length: 1 Data: Object/0 N: 33 PC: 18 OldOpLength: 1
Executing uInst: or:17
#MIR: (Label_Or EUop_Or Tag_Int Raddr_Tos RD2addr_Raddr-1 Waddr_Tos' Tos'_Tos-1 NewTos_Tos' 
CondCode_IntegerD1D2 CWrite NextInstA_Done NextInstB_Ufn-2)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 33 #$Opcode 17 #NCurPc: 19
D1: Int/16 D2: Int/1 Tos: 19 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 33 #$Opcode 33 #NCurPc: 19
D1: Int/17 D2: -- Tos: 18 RegAddr: 0
New Opcode: 33 Length: 2 Data: Object/0 N: 0 PC: 19 OldOpLength: 2
Executing uInst: putptr:228
#MIR: (Label_Putptr EUop_D2 Tag_D2 Raddr_Tos RD2addr_Raddr-1 W2addr_MarD1 Condcode_PointerpD2 
NextInstB_Ufn-2d)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 60 #$Opcode 33 #NCurPc: 21
D1: Int/17 D2: Object/2050 Tos: 18 RegAddr: 0
****************** Errors ******************
#CONDA: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 60 #$Opcode 33 #NCurPc: 21
D1: Object/2050 D2: -- Tos: 18 RegAddr: 0
Executing uInst: LAB0034:229
#MIR: (EUop_+ Tag_D1 RD1addr_Mar RD2addr_MuxRdSel MuxRdSel_IBufN W2addr_MarD1)
****************** Errors ******************
D1-30: 1 _ 0
D1-11: 0 _ 1
D1-4: 1 _ 0
D1-1: 0 _ 1
D1-0: 1 _ 0
VAD-11: 0 _ 1
VAD'-11: 1 _ 0
VAD'-4: 0 _ 1
VAD'-1: 1 _ 0
VAD'-0: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 60 #$Opcode 33 #NCurPc: 21
D1: Object/2050 D2: Object/0 Tos: 18 RegAddr: 0
****************** Errors ******************
D1-30: 1 _ 0
D1-11: 0 _ 1
D1-4: 1 _ 0
D1-1: 0 _ 1
D1-0: 1 _ 0
VAD-11: 0 _ 1
VAD'-11: 1 _ 0
VAD'-4: 0 _ 1
VAD'-1: 1 _ 0
VAD'-0: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 60 #$Opcode 33 #NCurPc: 21
D1: Object/2050 D2: -- Tos: 18 RegAddr: 0
Executing uInst: LAB0035:109
#MIR: (Cycle_W1 Dswap Raddr_Tos Tos'_Tos-1 NewTos_Tos' CondCode_NoFault CWrite NextInstA_Done 
NextInstB_PageFault)
****************** Errors ******************
D1-30: 1 _ 0
D1-11: 0 _ 1
D1-4: 1 _ 0
D1-1: 0 _ 1
D1-0: 1 _ 0
VAD-11: 0 _ 1
VAD'-11: 1 _ 0
VAD'-4: 0 _ 1
VAD'-1: 1 _ 0
VAD'-0: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 60 #$Opcode 33 #NCurPc: 21
D1: Object/2050 D2: Int/17 Tos: 18 RegAddr: 0
****************** Errors ******************
D1-30: 1 _ 0
D1-11: 0 _ 1
D1-4: 1 _ 0
D1-1: 0 _ 1
D1-0: 1 _ 0
VAD-11: 0 _ 1
VAD'-11: 1 _ 0
VAD'-4: 0 _ 1
VAD'-1: 1 _ 0
VAD'-0: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 60 #$Opcode 60 #NCurPc: 21
D1: Int/1073741823 D2: -- Tos: 17 RegAddr: 0
New Opcode: 60 Length: 0 Data: Object/0 N: 124 PC: 21 OldOpLength: 0
Executing uInst: loadibuf:209
#MIR: (Label_LoadIBuf Cycle_R4 RD1addr_PcAddr W2addr_IBufD2PcD1 EUop_+16 Tag_Int 
Misc_ResetInitialRefill CondCode_NoFault NextInstA_Done NextInstB_IBufPageFault)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010010 $Opcode: 60 #$Opcode 60 #NCurPc: 21
D1: Int/608 D2: Ptr-32/0 Tos: 17 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010001 $Opcode: 60 #$Opcode 60 #NCurPc: 21
D1: Int/624 D2: Object/0 Tos: 17 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010000 $Opcode: 60 #$Opcode 60 #NCurPc: 21
D1: -- D2: Object/0 Tos: 17 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011000 $Opcode: 60 #$Opcode 60 #NCurPc: 21
D1: -- D2: Object/0 Tos: 17 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010100 $Opcode: 60 #$Opcode 60 #NCurPc: 21
D1: -- D2: Object/0 Tos: 17 RegAddr: 0
New Opcode: 60 Length: 1 Data: Object/0 N: 124 PC: 21 OldOpLength: 1
Executing uInst: reset-vmm:219
#MIR: (Label_Reset-Vmm Misc_Reset-Vmm NextInstA_Done)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 124 #$Opcode 60 #NCurPc: 22
D1: Object/2050 D2: Ptr-32/0 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-30: 1 _ 0
D1-11: 0 _ 1
D1-4: 1 _ 0
D1-1: 0 _ 1
D1-0: 1 _ 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 124 #$Opcode 124 #NCurPc: 22
D1: Int/1073741823 D2: -- Tos: 17 RegAddr: 0
New Opcode: 124 Length: 1 Data: Object/0 N: 255 PC: 22 OldOpLength: 1
Executing uInst: retnp:220
#MIR: (Label_Retnp EUop_D1 Tag_Int Raddr_K K_StkHdr CondCode_TrapOnExit NextInstA_Ufn-0)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 255 #$Opcode 124 #NCurPc: 23
D1: Int/16 D2: -- Tos: 17 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 255 #$Opcode 124 #NCurPc: 23
D1: Int/16 D2: -- Tos: 17 RegAddr: 0
Executing uInst: LAB0065:139
#MIR: (EUop_D1 Tag_Int RCxt_Prev Raddr_K K_Pc W2Addr_PcD1 NewTopCxt_Prev 
Misc_Oplength=0&SetInitialRefill)
****************** Errors ******************
VAD-11: 0 _ 1
VAD'-11: 1 _ 0
VAD'-4: 0 _ 1
VAD'-1: 1 _ 0
VAD'-0: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 255 #$Opcode 124 #NCurPc: 23
D1: Int/42 D2: XType/1073741590 Tos: 17 RegAddr: 0
****************** Errors ******************
VAD-11: 0 _ 1
VAD'-11: 1 _ 0
VAD'-4: 0 _ 1
VAD'-1: 1 _ 0
VAD'-0: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 255 #$Opcode 124 #NCurPc: 23
D1: Int/42 D2: -- Tos: 17 RegAddr: 0
Executing uInst: LAB0066:140
#MIR: (Dswap Raddr_K K_StkHdr NewTos_D2 NextInstA_Done)
****************** Errors ******************
VAD-11: 0 _ 1
VAD'-11: 1 _ 0
VAD'-4: 0 _ 1
VAD'-1: 1 _ 0
VAD'-0: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 255 #$Opcode 124 #NCurPc: 10
D1: Int/42 D2: XType/1073741590 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-31: 1 _ 0
D1-29: 1 _ 0
D1-28: 1 _ 0
D1-27: 1 _ 0
D1-26: 1 _ 0
D1-25: 1 _ 0
D1-24: 1 _ 0
D1-23: 1 _ 0
D1-22: 1 _ 0
D1-21: 1 _ 0
D1-20: 1 _ 0
D1-19: 1 _ 0
D1-18: 1 _ 0
D1-17: 1 _ 0
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-4: 1 _ 0
D1-2: 1 _ 0
D1-0: 1 _ 0
VAD-11: 0 _ 1
VAD'-11: 1 _ 0
VAD'-4: 0 _ 1
VAD'-1: 1 _ 0
VAD'-0: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 255 #$Opcode 255 #NCurPc: 10
D1: Int/1073741823 D2: -- Tos: 22 RegAddr: 0
New Opcode: 255 Length: 0 Data: Object/0 N: 255 PC: 10 OldOpLength: 0
Executing uInst: loadibuf:209
#MIR: (Label_LoadIBuf Cycle_R4 RD1addr_PcAddr W2addr_IBufD2PcD1 EUop_+16 Tag_Int 
Misc_ResetInitialRefill CondCode_NoFault NextInstA_Done NextInstB_IBufPageFault)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010010 $Opcode: 255 #$Opcode 255 #NCurPc: 10
D1: Int/32 D2: Object/2099201 Tos: 22 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010001 $Opcode: 255 #$Opcode 255 #NCurPc: 10
D1: Int/48 D2: XType/987200381 Tos: 22 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010000 $Opcode: 255 #$Opcode 255 #NCurPc: 10
D1: -- D2: Int/1072160763 Tos: 22 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011000 $Opcode: 255 #$Opcode 255 #NCurPc: 10
D1: -- D2: XType/1054604287 Tos: 22 RegAddr: 0
****************** Errors ******************
#OPCODE-5: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010100 $Opcode: 255 #$Opcode 255 #NCurPc: 10
D1: -- D2: XType/987200351 Tos: 22 RegAddr: 0
New Opcode: 255 Length: 0 Data: Object/0 N: 255 PC: 10 OldOpLength: 0
Executing uInst: loadibuf:209
#MIR: (Label_LoadIBuf Cycle_R4 RD1addr_PcAddr W2addr_IBufD2PcD1 EUop_+16 Tag_Int 
Misc_ResetInitialRefill CondCode_NoFault NextInstA_Done NextInstB_IBufPageFault)
****************** Errors ******************
#IBUFN-7: 0 _ 1
#IBUFN-6: 0 _ 1
#IBUFN-5: 0 _ 1
#IBUFN-4: 0 _ 1
#IBUFN-3: 0 _ 1
#IBUFN-2: 0 _ 1
#IBUFN-1: 0 _ 1
#IBUFN-0: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010010 $Opcode: 255 #$Opcode 255 #NCurPc: 10
D1: Int/48 D2: Object/2099201 Tos: 22 RegAddr: 0
****************** Errors ******************
#IBUFN-7: 0 _ 1
#IBUFN-6: 0 _ 1
#IBUFN-5: 0 _ 1
#IBUFN-4: 0 _ 1
#IBUFN-3: 0 _ 1
#IBUFN-2: 0 _ 1
#IBUFN-1: 0 _ 1
#IBUFN-0: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010001 $Opcode: 255 #$Opcode 255 #NCurPc: 10
D1: Int/64 D2: XType/928513019 Tos: 22 RegAddr: 0
****************** Errors ******************
#IBUFN-7: 0 _ 1
#IBUFN-6: 0 _ 1
#IBUFN-5: 0 _ 1
#IBUFN-4: 0 _ 1
#IBUFN-3: 0 _ 1
#IBUFN-2: 0 _ 1
#IBUFN-1: 0 _ 1
#IBUFN-0: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010000 $Opcode: 255 #$Opcode 255 #NCurPc: 10
D1: -- D2: Float/143165568 Tos: 22 RegAddr: 0
****************** Errors ******************
#IBUFN-7: 0 _ 1
#IBUFN-6: 0 _ 1
#IBUFN-5: 0 _ 1
#IBUFN-4: 0 _ 1
#IBUFN-3: 0 _ 1
#IBUFN-2: 0 _ 1
#IBUFN-1: 0 _ 1
#IBUFN-0: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011000 $Opcode: 32 #$Opcode 255 #NCurPc: 10
D1: -- D2: Object/0 Tos: 22 RegAddr: 0
****************** Errors ******************
#IBUFN-7: 0 _ 1
#IBUFN-6: 0 _ 1
#IBUFN-5: 0 _ 1
#IBUFN-4: 0 _ 1
#IBUFN-3: 0 _ 1
#IBUFN-2: 0 _ 1
#IBUFN-1: 0 _ 1
#IBUFN-0: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010100 $Opcode: 32 #$Opcode 32 #NCurPc: 10
D1: -- D2: Object/0 Tos: 22 RegAddr: 0
New Opcode: 32 Length: 2 Data: Object/64 N: 64 PC: 10 OldOpLength: 2
Executing uInst: getptr:32
#MIR: (Label_Getptr EUop_+ Tag_D2 Dswap Raddr_Tos RD1addr_IBufData W2addr_MarD1 Condcode_PointerpD2 
NextInstB_Ufn-1d)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 26 #$Opcode 32 #NCurPc: 12
D1: Object/64 D2: Object/2099201 Tos: 22 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 26 #$Opcode 32 #NCurPc: 12
D1: Object/2099265 D2: -- Tos: 22 RegAddr: 0
Executing uInst: LAB0033:65
#MIR: (Cycle_R1 Waddr_Tos CondCode_NoFault Cwrite NextInstA_Done NextInstB_PageFault)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 26 #$Opcode 32 #NCurPc: 12
D1: Object/2099201 D2: Object/2099201 Tos: 22 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010000 $Opcode: 26 #$Opcode 32 #NCurPc: 12
D1: -- D2: Int/17 Tos: 22 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 26 #$Opcode 32 #NCurPc: 12
D1: Object/2099201 D2: Object/2099201 Tos: 22 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 26 #$Opcode 26 #NCurPc: 12
D1: Int/1073741823 D2: Int/7 Tos: 22 RegAddr: 0
New Opcode: 26 Length: 1 Data: Object/0 N: 68 PC: 12 OldOpLength: 1
Executing uInst: '1:26
#MIR: (Label_'1 EUop_D2 Tag_Int RD2addr_MuxRdSel MuxRdSel_K K_1 Waddr_Tos' Tos'_Tos+1 NewTos_Tos' 
NextInstA_Done)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 68 #$Opcode 26 #NCurPc: 13
D1: Int/7 D2: Object/1 Tos: 22 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 68 #$Opcode 68 #NCurPc: 13
D1: Int/1 D2: -- Tos: 23 RegAddr: 0
New Opcode: 68 Length: 1 Data: Object/0 N: 34 PC: 13 OldOpLength: 1
Executing uInst: plus:213
#MIR: (Label_Plus EUop_+ Tag_Int Raddr_Tos RD2addr_Raddr-1 W2addr_Tmp1D1 CondCode_IntegerD1D2 
NextInstB_Ufn-2)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 34 #$Opcode 68 #NCurPc: 14
D1: Int/1 D2: Int/7 Tos: 23 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 34 #$Opcode 68 #NCurPc: 14
D1: Int/8 D2: -- Tos: 23 RegAddr: 0
Executing uInst: LAB0019:228
#MIR: (EUop_D2 Tag_Int RD2addr_Tmp1 Waddr_Tos' Tos'_Tos-1 NewTos_Tos' CondCode_NoOverflow CWrite 
NextInstA_Done NextInstB_Ufn-2)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 34 #$Opcode 68 #NCurPc: 14
D1: Int/1 D2: Int/8 Tos: 23 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 34 #$Opcode 34 #NCurPc: 14
D1: Int/8 D2: -- Tos: 22 RegAddr: 0
New Opcode: 34 Length: 2 Data: Object/64 N: 64 PC: 14 OldOpLength: 2
Executing uInst: rplptr:34
#MIR: (Label_Rplptr EUop_D2 Tag_D2 Raddr_Tos RD2addr_Raddr-1 W2addr_MarD1 Condcode_PointerpD2 
NextInstB_Ufn-2d)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 112 #$Opcode 34 #NCurPc: 16
D1: Int/8 D2: Object/2099201 Tos: 22 RegAddr: 0
****************** Errors ******************
#CONDA: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 112 #$Opcode 34 #NCurPc: 16
D1: Object/2099201 D2: -- Tos: 22 RegAddr: 0
Executing uInst: LAB0036:229
#MIR: (EUop_+ Tag_D1 RD1addr_Mar RD2addr_MuxRdSel MuxRdSel_IBufN W2addr_MarD1 
NextInstA_RefCountStorePop)
****************** Errors ******************
D1-30: 1 _ 0
D1-21: 0 _ 1
D1-11: 0 _ 1
D1-3: 1 _ 0
D1-0: 0 _ 1
VAD-21: 0 _ 1
VAD-11: 0 _ 1
VAD'-21: 1 _ 0
VAD'-11: 1 _ 0
VAD'-3: 0 _ 1
VAD'-0: 1 _ 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 112 #$Opcode 34 #NCurPc: 16
D1: Object/2099201 D2: Object/64 Tos: 22 RegAddr: 0
****************** Errors ******************
D1-30: 1 _ 0
D1-21: 0 _ 1
D1-11: 0 _ 1
D1-3: 1 _ 0
D1-0: 0 _ 1
VAD-21: 0 _ 1
VAD-11: 0 _ 1
VAD'-21: 1 _ 0
VAD'-11: 1 _ 0
VAD'-3: 0 _ 1
VAD'-0: 1 _ 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 112 #$Opcode 34 #NCurPc: 16
D1: Object/2099265 D2: -- Tos: 22 RegAddr: 0
Executing uInst: refcountstorepop:216
#MIR: (Label_RefCountStorePop Cycle_R1 Waddr_K WCxt_K K_Decref CondCode_NoFault NextInstB_PageFault)
****************** Errors ******************
D1-30: 1 _ 0
D1-21: 0 _ 1
D1-11: 0 _ 1
D1-3: 1 _ 0
D1-0: 0 _ 1
VAD-21: 0 _ 1
VAD-11: 0 _ 1
VAD'-21: 1 _ 0
VAD'-11: 1 _ 0
VAD'-3: 0 _ 1
VAD'-0: 1 _ 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 112 #$Opcode 34 #NCurPc: 16
D1: Int/8 D2: Object/2099201 Tos: 22 RegAddr: 0
****************** Errors ******************
VAD-21: 0 _ 1
VAD-11: 0 _ 1
VAD'-21: 1 _ 0
VAD'-11: 1 _ 0
VAD'-3: 0 _ 1
VAD'-0: 1 _ 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 112 #$Opcode 34 #NCurPc: 16
D1: Int/1073741823 D2: Int/7 Tos: 22 RegAddr: 0
Executing uInst: LAB0037:111
#MIR: (Cycle_W1 Dswap Raddr_Tos CondCode_NoFault NextInstB_PageFault)
****************** Errors ******************
VAD-21: 0 _ 1
VAD-11: 0 _ 1
VAD'-21: 1 _ 0
VAD'-11: 1 _ 0
VAD'-3: 0 _ 1
VAD'-0: 1 _ 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 112 #$Opcode 34 #NCurPc: 16
D1: Object/2099201 D2: Int/8 Tos: 22 RegAddr: 0
****************** Errors ******************
D1-30: 1 _ 0
D1-21: 0 _ 1
D1-11: 0 _ 1
D1-3: 1 _ 0
D1-0: 0 _ 1
VAD-21: 0 _ 1
VAD-11: 0 _ 1
VAD'-21: 1 _ 0
VAD'-11: 1 _ 0
VAD'-3: 0 _ 1
VAD'-0: 1 _ 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011000 $Opcode: 112 #$Opcode 34 #NCurPc: 16
D1: -- D2: -- Tos: 22 RegAddr: 0
****************** Errors ******************
VAD-21: 0 _ 1
VAD-11: 0 _ 1
VAD'-21: 1 _ 0
VAD'-11: 1 _ 0
VAD'-3: 0 _ 1
VAD'-0: 1 _ 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010100 $Opcode: 112 #$Opcode 34 #NCurPc: 16
D1: -- D2: -- Tos: 22 RegAddr: 0
Executing uInst: pagefault:212
#MIR: (Label_PageFault EUop_D1 Tag_Int RD1addr_Mar Waddr_Tos' Tos'_Tos+1 NewTos_Tos' NewArg_K K_1 
Misc_OpLength=0 CondCode_FramesAvail Cwrite NextInstB_DumpFrame)
****************** Errors ******************
VAD-21: 0 _ 1
VAD-11: 0 _ 1
VAD'-21: 1 _ 0
VAD'-11: 1 _ 0
VAD'-3: 0 _ 1
VAD'-0: 1 _ 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 112 #$Opcode 34 #NCurPc: 16
D1: Object/2099265 D2: Object/2099201 Tos: 22 RegAddr: 0
****************** Errors ******************
D1-30: 1 _ 0
D1-21: 0 _ 1
D1-11: 0 _ 1
D1-3: 1 _ 0
D1-0: 0 _ 1
VAD-21: 0 _ 1
VAD-11: 0 _ 1
VAD'-21: 1 _ 0
VAD'-11: 1 _ 0
VAD'-3: 0 _ 1
VAD'-0: 1 _ 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 112 #$Opcode 34 #NCurPc: 16
D1: Int/2099265 D2: -- Tos: 23 RegAddr: 0
Executing uInst: LAB0072:146
#MIR: (EUop_D1 Tag_D1 Raddr_K K_PFCode RCxt_K W2addr_MarD1 NextInstA_Fn1)
****************** Errors ******************
D1-21: 0 _ 1
D1-11: 0 _ 1
D1-3: 1 _ 0
D1-0: 0 _ 1
VAD-21: 0 _ 1
VAD-11: 0 _ 1
VAD'-21: 1 _ 0
VAD'-11: 1 _ 0
VAD'-3: 0 _ 1
VAD'-0: 1 _ 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 34 #$Opcode 34 #NCurPc: 14
D1: Code/100663424 D2: -- Tos: 23 RegAddr: 0
****************** Errors ******************
VAD-21: 0 _ 1
VAD-11: 0 _ 1
VAD'-21: 1 _ 0
VAD'-11: 1 _ 0
VAD'-3: 0 _ 1
VAD'-0: 1 _ 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 34 #$Opcode 34 #NCurPc: 14
D1: Code/100663424 D2: -- Tos: 23 RegAddr: 0
Executing uInst: fn1:197
#MIR: (Label_Fn1 EUop_+4 Tag_D1 RD1addr_Mar W2addr_MarD1 NewArg2_Arg NewArg_K K_StkHdr CondCode_CCodeP
 NextInstB_Fn5)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 34 #$Opcode 34 #NCurPc: 14
D1: Code/100663424 D2: Int/8 Tos: 23 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 34 #$Opcode 34 #NCurPc: 14
D1: Code/100663428 D2: -- Tos: 23 RegAddr: 0
Executing uInst: LAB0041:115
#MIR: (Cycle_R4 WCxt_Next Waddr_Arg<6>/QW<2> EUop_+4 Tag_D1 RD1addr_Mar W2addr_MarD1 CondCode_NoFault 
NextInstB_PageFault)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010010 $Opcode: 34 #$Opcode 34 #NCurPc: 14
D1: Code/100663428 D2: Int/8 Tos: 23 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010001 $Opcode: 34 #$Opcode 34 #NCurPc: 14
D1: Code/100663432 D2: Int/16 Tos: 23 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010000 $Opcode: 34 #$Opcode 34 #NCurPc: 14
D1: -- D2: Int/0 Tos: 23 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011000 $Opcode: 34 #$Opcode 34 #NCurPc: 14
D1: -- D2: Code/100663424 Tos: 23 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010100 $Opcode: 34 #$Opcode 34 #NCurPc: 14
D1: -- D2: Code/100663424 Tos: 23 RegAddr: 0
Executing uInst: LAB0042:116
#MIR: (EUop_D2 Tag_D2 RD2addr_Unbound Waddr_K K_PVar WCxt_Next Misc_WriteOctal NewArg_Arg2)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 34 #$Opcode 34 #NCurPc: 14
D1: Int/2099265 D2: Ptr-32/0 Tos: 23 RegAddr: 0
****************** Errors ******************
D1-21: 0 _ 1
D1-11: 0 _ 1
D1-3: 1 _ 0
D1-0: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 34 #$Opcode 34 #NCurPc: 14
D1: Ptr-32/0 D2: -- Tos: 23 RegAddr: 0
Executing uInst: fn2:198
#MIR: (Label_Fn2 EUop_D2 Tag_D2 RD2addr_Nil Waddr_K K_IVar WCxt_Next Misc_WriteOctal)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 34 #$Opcode 34 #NCurPc: 14
D1: Int/2099265 D2: Atm/3584 Tos: 23 RegAddr: 0
****************** Errors ******************
D1-21: 0 _ 1
D1-11: 0 _ 1
D1-3: 1 _ 0
D1-0: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 34 #$Opcode 34 #NCurPc: 14
D1: Atm/3584 D2: -- Tos: 23 RegAddr: 0
Executing uInst: LAB0043:117
#MIR: (EUop_D2 Tag_Int RD2addr_PC Waddr_K K_Pc Misc_Oplength=0&SetInitialRefill)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 34 #$Opcode 34 #NCurPc: 14
D1: Int/2099265 D2: Int/46 Tos: 23 RegAddr: 0
****************** Errors ******************
D1-21: 0 _ 1
D1-11: 0 _ 1
D1-3: 1 _ 0
D1-0: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 34 #$Opcode 34 #NCurPc: 14
D1: Int/46 D2: -- Tos: 23 RegAddr: 0
Executing uInst: LAB0044:118
#MIR: (EUop_+ Tag_Int RD1addr_Mar RD2addr_MuxRdSel MuxRdSel_Arg W2Addr_MarD1)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 34 #$Opcode 34 #NCurPc: 14
D1: Code/100663432 D2: Object/1 Tos: 23 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 34 #$Opcode 34 #NCurPc: 14
D1: Int/100663433 D2: -- Tos: 23 RegAddr: 0
Executing uInst: LAB0045:119
#MIR: (Cycle_R1 Waddr_K WCxt_Next K_Pc)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 34 #$Opcode 34 #NCurPc: 14
D1: Int/2099265 D2: Int/8 Tos: 23 RegAddr: 0
****************** Errors ******************
D1-21: 0 _ 1
D1-11: 0 _ 1
D1-3: 1 _ 0
D1-0: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 34 #$Opcode 34 #NCurPc: 14
D1: Int/1073741823 D2: Int/560 Tos: 23 RegAddr: 0
Executing uInst: LAB0046:120
#MIR: (EUop_D1 Tag_Int Raddr_K RCxt_Next K_PC W2addr_PCD1)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 34 #$Opcode 34 #NCurPc: 14
D1: Int/560 D2: Int/16 Tos: 23 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 34 #$Opcode 34 #NCurPc: 14
D1: Int/560 D2: -- Tos: 23 RegAddr: 0
Executing uInst: LAB0047:121
#MIR: (EUop_D2 Tag_Int RD2addr_MuxRdSel MuxRdSel_K K_Ivar NewArg2_K W2addr_MarD1 NewArg_Arg' 
Arg'_Arg-1 CondCode_Arg#0 NextInstB_Fn3)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 112 #$Opcode 34 #NCurPc: 16
D1: Int/2099265 D2: Object/8 Tos: 23 RegAddr: 0
****************** Errors ******************
D1-21: 0 _ 1
D1-11: 0 _ 1
D1-3: 1 _ 0
D1-0: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 112 #$Opcode 34 #NCurPc: 16
D1: Int/8 D2: -- Tos: 23 RegAddr: 0
Executing uInst: LAB0048:122
#MIR: (EUop_+ Tag_Int RD1addr_Mar RD2addr_MuxRdSel MuxRdSel_Arg W2addr_Tmp1D1)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 112 #$Opcode 34 #NCurPc: 16
D1: Int/8 D2: Object/0 Tos: 23 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 112 #$Opcode 34 #NCurPc: 16
D1: Int/8 D2: -- Tos: 23 RegAddr: 0
Executing uInst: LAB0049:123
#MIR: (RD2addr_Tmp1 NewArg_D2)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 112 #$Opcode 34 #NCurPc: 16
D1: Int/2099265 D2: Int/8 Tos: 23 RegAddr: 0
****************** Errors ******************
D1-21: 0 _ 1
D1-11: 0 _ 1
D1-3: 1 _ 0
D1-0: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 112 #$Opcode 34 #NCurPc: 16
D1: Int/1073741823 D2: -- Tos: 23 RegAddr: 0
Executing uInst: LAB0050:124
#MIR: (EUop_D1 Tag_D1 Raddr_Tos WCxt_Next Waddr_Arg NewTos_Tos' Tos'_Tos-1 NewArg_Arg' Arg'_Arg-1 
CondCode_Arg=Arg2 NextInstB_Rpt)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 112 #$Opcode 34 #NCurPc: 16
D1: Int/2099265 D2: Int/8 Tos: 23 RegAddr: 0
****************** Errors ******************
D1-21: 0 _ 1
D1-11: 0 _ 1
D1-3: 1 _ 0
D1-0: 0 _ 1
****************** Errors ******************
#CONDA: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 112 #$Opcode 34 #NCurPc: 16
D1: Int/2099265 D2: -- Tos: 22 RegAddr: 0
Executing uInst: fn3:199
#MIR: (Label_Fn3 EUop_D1<24>/D2<8> Tag_D1 RD2addr_MuxRdSel MuxRdSel_Tos Raddr_K Waddr_K K_StkHdr)
****************** Errors ******************
D1-21: 0 _ 1
D1-11: 0 _ 1
D1-3: 1 _ 0
D1-0: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 112 #$Opcode 34 #NCurPc: 16
D1: XType/1073741590 D2: Object/22 Tos: 22 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 112 #$Opcode 34 #NCurPc: 16
D1: XType/1073741590 D2: -- Tos: 22 RegAddr: 0
Executing uInst: LAB0051:125
#MIR: (EUop_D2 Tag_D2 Dswap Raddr_K K_StkHdr RCxt_Next WCxt_Next NewTos_D2 NewTopCxt_Next 
NextInstA_Done)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 112 #$Opcode 34 #NCurPc: 16
D1: -- D2: Int/16 Tos: 22 RegAddr: 0
****************** Errors ******************
D1-31: 0 _ 1
D1-29: 0 _ 1
D1-28: 0 _ 1
D1-27: 0 _ 1
D1-26: 0 _ 1
D1-25: 0 _ 1
D1-24: 0 _ 1
D1-23: 0 _ 1
D1-22: 0 _ 1
D1-21: 0 _ 1
D1-20: 0 _ 1
D1-19: 0 _ 1
D1-18: 0 _ 1
D1-17: 0 _ 1
D1-16: 0 _ 1
D1-15: 0 _ 1
D1-14: 0 _ 1
D1-13: 0 _ 1
D1-12: 0 _ 1
D1-11: 0 _ 1
D1-10: 0 _ 1
D1-9: 0 _ 1
D1-8: 0 _ 1
D1-7: 0 _ 1
D1-6: 0 _ 1
D1-5: 0 _ 1
D1-3: 0 _ 1
D1-2: 0 _ 1
D1-1: 0 _ 1
D1-0: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 112 #$Opcode 112 #NCurPc: 16
D1: Int/16 D2: -- Tos: 16 RegAddr: 0
New Opcode: 112 Length: 0 Data: Object/0 N: 5 PC: 16 OldOpLength: 0
Executing uInst: loadibuf:209
#MIR: (Label_LoadIBuf Cycle_R4 RD1addr_PcAddr W2addr_IBufD2PcD1 EUop_+16 Tag_Int 
Misc_ResetInitialRefill CondCode_NoFault NextInstA_Done NextInstB_IBufPageFault)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010010 $Opcode: 112 #$Opcode 112 #NCurPc: 16
D1: Int/560 D2: Atm/3584 Tos: 16 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010001 $Opcode: 112 #$Opcode 112 #NCurPc: 16
D1: Int/576 D2: List/80235720 Tos: 16 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010000 $Opcode: 112 #$Opcode 112 #NCurPc: 16
D1: -- D2: Int/862283366 Tos: 16 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011000 $Opcode: 200 #$Opcode 112 #NCurPc: 16
D1: -- D2: XType/1069448763 Tos: 16 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010100 $Opcode: 200 #$Opcode 200 #NCurPc: 16
D1: -- D2: XType/526176237 Tos: 16 RegAddr: 0
New Opcode: 200 Length: 1 Data: Object/0 N: 145 PC: 16 OldOpLength: 1
Executing uInst: vark:233
#MIR: (Label_Vark EUop_D1 Tag_D1 Raddr_0<4>/OpCode<4> Waddr_Tos' Tos'_Tos+1 NewTos_Tos' NextInstA_Done
)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 145 #$Opcode 200 #NCurPc: 17
D1: Int/2099265 D2: -- Tos: 16 RegAddr: 0
****************** Errors ******************
D1-21: 0 _ 1
D1-11: 0 _ 1
D1-3: 1 _ 0
D1-0: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 145 #$Opcode 145 #NCurPc: 17
D1: Int/2099265 D2: -- Tos: 17 RegAddr: 0
New Opcode: 145 Length: 5 Data: Int/16777215 N: 255 PC: 17 OldOpLength: 5
Executing uInst: intconst:81
#MIR: (Label_IntConst EUop_D1 Tag_Int RD1addr_IBufData Waddr_TOS' TOS'_TOS+1 NewTos_Tos' 
NextInstA_Done)
****************** Errors ******************
D1-21: 0 _ 1
D1-11: 0 _ 1
D1-3: 1 _ 0
D1-0: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 16 #$Opcode 145 #NCurPc: 22
D1: Int/16777215 D2: Ptr-32/0 Tos: 17 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 16 #$Opcode 16 #NCurPc: 22
D1: Int/16777215 D2: -- Tos: 18 RegAddr: 0
New Opcode: 16 Length: 0 Data: Object/0 N: 47 PC: 22 OldOpLength: 0
Executing uInst: loadibuf:209
#MIR: (Label_LoadIBuf Cycle_R4 RD1addr_PcAddr W2addr_IBufD2PcD1 EUop_+16 Tag_Int 
Misc_ResetInitialRefill CondCode_NoFault NextInstA_Done NextInstB_IBufPageFault)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010010 $Opcode: 16 #$Opcode 16 #NCurPc: 22
D1: Int/576 D2: Int/2099265 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010001 $Opcode: 16 #$Opcode 16 #NCurPc: 22
D1: Int/592 D2: XType/1071816350 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010000 $Opcode: 16 #$Opcode 16 #NCurPc: 22
D1: -- D2: Float/1073477457 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011000 $Opcode: 16 #$Opcode 16 #NCurPc: 22
D1: -- D2: XType/1004404446 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010100 $Opcode: 16 #$Opcode 16 #NCurPc: 22
D1: -- D2: Int/1073217523 Tos: 18 RegAddr: 0
New Opcode: 16 Length: 1 Data: Object/0 N: 47 PC: 22 OldOpLength: 1
Executing uInst: and:16
#MIR: (Label_And EUop_And Tag_Int Raddr_Tos RD2addr_Raddr-1 Waddr_Tos' Tos'_Tos-1 NewTos_Tos' 
CondCode_IntegerD1D2 CWrite NextInstA_Done NextInstB_Ufn-2)
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 47 #$Opcode 16 #NCurPc: 23
D1: Int/16777215 D2: Int/2099265 Tos: 18 RegAddr: 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 47 #$Opcode 47 #NCurPc: 23
D1: Int/2099265 D2: -- Tos: 17 RegAddr: 0
New Opcode: 47 Length: 2 Data: Object/10 N: 10 PC: 23 OldOpLength: 2
Executing uInst: lrsh.n:228
#MIR: (Label_Lrsh.N EUop_D1 Tag_Int Raddr_Tos W2addr_MarD1 NewArg_IBufN CondCode_Integerp 
NextInstB_Ufn-1d)
****************** Errors ******************
D1-23: 1 _ 0
D1-22: 1 _ 0
D1-20: 1 _ 0
D1-19: 1 _ 0
D1-18: 1 _ 0
D1-17: 1 _ 0
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/2099265 D2: Ptr-32/0 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-23: 1 _ 0
D1-22: 1 _ 0
D1-20: 1 _ 0
D1-19: 1 _ 0
D1-18: 1 _ 0
D1-17: 1 _ 0
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/2099265 D2: -- Tos: 17 RegAddr: 0
Executing uInst: LAB0031:105
#MIR: (Arg'_Arg-1 NewArg_Arg' CondCode_Arg=0 NextInstA_Done)
****************** Errors ******************
D1-23: 1 _ 0
D1-22: 1 _ 0
D1-20: 1 _ 0
D1-19: 1 _ 0
D1-18: 1 _ 0
D1-17: 1 _ 0
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-10: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/2099265 D2: Ptr-32/0 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-23: 1 _ 0
D1-22: 1 _ 0
D1-20: 1 _ 0
D1-19: 1 _ 0
D1-18: 1 _ 0
D1-17: 1 _ 0
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-10: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/1073741823 D2: -- Tos: 17 RegAddr: 0
Executing uInst: LAB0032:106
#MIR: (EUop_Rshft1 Tag_Int Raddr_Tos Waddr_Tos NewArg_Arg' Arg'_Arg-1 CondCode_Arg=0 NextInstA_Done 
NextInstB_Rpt)
****************** Errors ******************
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-10: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/2099265 D2: Ptr-32/0 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-23: 1 _ 0
D1-22: 1 _ 0
D1-20: 1 _ 0
D1-19: 1 _ 0
D1-18: 1 _ 0
D1-17: 1 _ 0
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-10: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/1049632 D2: -- Tos: 17 RegAddr: 0
Executing uInst: LAB0032:106
#MIR: (EUop_Rshft1 Tag_Int Raddr_Tos Waddr_Tos NewArg_Arg' Arg'_Arg-1 CondCode_Arg=0 NextInstA_Done 
NextInstB_Rpt)
****************** Errors ******************
D1-22: 1 _ 0
D1-21: 1 _ 0
D1-19: 1 _ 0
D1-18: 1 _ 0
D1-17: 1 _ 0
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-10: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/1049632 D2: Ptr-32/0 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-22: 1 _ 0
D1-21: 1 _ 0
D1-19: 1 _ 0
D1-18: 1 _ 0
D1-17: 1 _ 0
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-10: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/524816 D2: -- Tos: 17 RegAddr: 0
Executing uInst: LAB0032:106
#MIR: (EUop_Rshft1 Tag_Int Raddr_Tos Waddr_Tos NewArg_Arg' Arg'_Arg-1 CondCode_Arg=0 NextInstA_Done 
NextInstB_Rpt)
****************** Errors ******************
D1-21: 1 _ 0
D1-20: 1 _ 0
D1-18: 1 _ 0
D1-17: 1 _ 0
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-10: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/524816 D2: Ptr-32/0 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-21: 1 _ 0
D1-20: 1 _ 0
D1-18: 1 _ 0
D1-17: 1 _ 0
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-10: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/262408 D2: -- Tos: 17 RegAddr: 0
Executing uInst: LAB0032:106
#MIR: (EUop_Rshft1 Tag_Int Raddr_Tos Waddr_Tos NewArg_Arg' Arg'_Arg-1 CondCode_Arg=0 NextInstA_Done 
NextInstB_Rpt)
****************** Errors ******************
D1-20: 1 _ 0
D1-19: 1 _ 0
D1-17: 1 _ 0
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-10: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/262408 D2: Ptr-32/0 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-20: 1 _ 0
D1-19: 1 _ 0
D1-17: 1 _ 0
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-10: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/131204 D2: -- Tos: 17 RegAddr: 0
Executing uInst: LAB0032:106
#MIR: (EUop_Rshft1 Tag_Int Raddr_Tos Waddr_Tos NewArg_Arg' Arg'_Arg-1 CondCode_Arg=0 NextInstA_Done 
NextInstB_Rpt)
****************** Errors ******************
D1-19: 1 _ 0
D1-18: 1 _ 0
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-10: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/131204 D2: Ptr-32/0 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-19: 1 _ 0
D1-18: 1 _ 0
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-10: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/65602 D2: -- Tos: 17 RegAddr: 0
Executing uInst: LAB0032:106
#MIR: (EUop_Rshft1 Tag_Int Raddr_Tos Waddr_Tos NewArg_Arg' Arg'_Arg-1 CondCode_Arg=0 NextInstA_Done 
NextInstB_Rpt)
****************** Errors ******************
D1-18: 1 _ 0
D1-17: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-10: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/65602 D2: Ptr-32/0 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-18: 1 _ 0
D1-17: 1 _ 0
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-10: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/32801 D2: -- Tos: 17 RegAddr: 0
Executing uInst: LAB0032:106
#MIR: (EUop_Rshft1 Tag_Int Raddr_Tos Waddr_Tos NewArg_Arg' Arg'_Arg-1 CondCode_Arg=0 NextInstA_Done 
NextInstB_Rpt)
****************** Errors ******************
D1-17: 1 _ 0
D1-16: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-10: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/32801 D2: Ptr-32/0 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-17: 1 _ 0
D1-16: 1 _ 0
D1-14: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-4: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-10: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/16400 D2: -- Tos: 17 RegAddr: 0
Executing uInst: LAB0032:106
#MIR: (EUop_Rshft1 Tag_Int Raddr_Tos Waddr_Tos NewArg_Arg' Arg'_Arg-1 CondCode_Arg=0 NextInstA_Done 
NextInstB_Rpt)
****************** Errors ******************
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-10: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 011010 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/16400 D2: Ptr-32/0 Tos: 17 RegAddr: 0
****************** Errors ******************
D1-16: 1 _ 0
D1-15: 1 _ 0
D1-13: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-3: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-10: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1
 *pre/*clock/*op/*micro/*firstcy/*secondcy: 010101 $Opcode: 35 #$Opcode 47 #NCurPc: 25
D1: Int/8200 D2: -- Tos: 17 RegAddr: 0
Executing uInst: LAB0032:106
#MIR: (EUop_Rshft1 Tag_Int Raddr_Tos Waddr_Tos NewArg_Arg' Arg'_Arg-1 CondCode_Arg=0 NextInstA_Done 
NextInstB_Rpt)
****************** Errors ******************
D1-15: 1 _ 0
D1-14: 1 _ 0
D1-12: 1 _ 0
D1-11: 1 _ 0
D1-10: 1 _ 0
D1-9: 1 _ 0
D1-8: 1 _ 0
D1-7: 1 _ 0
D1-6: 1 _ 0
D1-5: 1 _ 0
D1-4: 1 _ 0
D1-2: 1 _ 0
D1-1: 1 _ 0
D1-0: 1 _ 0
VAD-23: 1 _ 0
VAD-22: 1 _ 0
VAD-20: 1 _ 0
VAD-19: 1 _ 0
VAD-18: 1 _ 0
VAD-17: 1 _ 0
VAD-16: 1 _ 0
VAD-15: 1 _ 0
VAD-14: 1 _ 0
VAD-13: 1 _ 0
VAD-12: 1 _ 0
VAD-10: 1 _ 0
VAD'-23: 0 _ 1
VAD'-22: 0 _ 1
VAD'-20: 0 _ 1
VAD'-19: 0 _ 1
VAD'-18: 0 _ 1
VAD'-17: 0 _ 1
VAD'-16: 0 _ 1
VAD'-15: 0 _ 1
VAD'-14: 0 _ 1
VAD'-13: 0 _ 1
VAD'-12: 0 _ 1
VAD'-10: 0 _ 1
VAD'-9: 0 _ 1
VAD'-8: 0 _ 1
VAD'-7: 0 _ 1
VAD'-5: 0 _ 1
VAD'-4: 0 _ 1
VAD'-3: 0 _ 1
VAD'-2: 0 _ 1
VAD'-1: 0 _ 1