[phylum]<CTamarin>TestVecs>TopBoothTestVecs.tioga!1

TopBoothTestVecs.tioga

Last Edited by: Ross February 27, 1987 12:20:38 pm PST

D1 reset ld start | done sign bout x2 neg

reset

00000000 1 1 0 | X X ( XX XX ) X X

00000000 0 1 0 | X X ( XX XX ) X X

load in number

C0462F9D 0 1 0 | X X ( XX XX ) X X

start Boothing

00000000 0 0 1 | X X ( XX XX ) X X

00000000 0 0 0 | 0 1 ( 01 01 ) 0 2

00000000 0 0 0 | 0 1 ( 02 02 ) 3 2

00000000 0 0 0 | 0 1 ( 08 08 ) 0 1

00000000 0 0 0 | 1 1 ( 10 10 ) 3 1

00000000 0 0 0 | 0 1 ( 20 00 ) (XX0X) (XX0X)

00000000 0 0 0 | 2 1 ( 80 00 ) (XX0X) (XX1X)

00000000 0 0 0 | 0 1 ( 00 00 ) X X