DIRECTORY Basics, BitOps, Core, CoreClasses, CoreCreate, CoreFlat, CoreProperties, Logic, Ports, Rosemary, RosemaryUser, TamPorts, Rope, TamDefs, TerminalIO; TamIBuf6TCell: CEDAR PROGRAM IMPORTS CoreCreate, CoreFlat, CoreClasses, Logic, Ports, Rosemary, TamPorts, TerminalIO = BEGIN OPEN TamDefs, TamPorts; busBits: NAT _ 32; IBuf6TRamCellState: TYPE = REF IBuf6TRamCellStateRec; IBuf6TRamCellStateRec: TYPE = RECORD [in, nIn, selWrite, out, vdd, gnd: NAT _ LAST[NAT], storedval: NAT]; IBuf6TCellName: Rope.ROPE = Rosemary.Register[roseClassName: "IBuf6TRamCell", init: IBufFile6TRamCellInit, evalSimple: IBuf6TRamCellEvalSimple]; IBuf6TRamCell: PUBLIC PROC RETURNS [ct: CoreCreate.CellType] = { ct _ CoreClasses.CreateUnspecified[ name: IBuf6TCellName, public: CoreCreate.Wires["In", "nIn", "Out", "SelWrite", "Vdd", "Gnd"]]; [] _ Rosemary.BindCellType[cellType: ct, roseClassName: IBuf6TCellName]; [] _ CoreFlat.CellTypeCutLabels[ct, Logic.logicCutSet]; TerminalIO.PutRope["Creating IBuf 6T RamCell\n"]; }; IBufFile6TRamCellInit: Rosemary.InitProc = { state: IBuf6TRamCellState _ NEW[IBuf6TRamCellStateRec]; [] _ Ports.InitPorts[cellType, l, none, "Vdd", "Gnd"]; [] _ Ports.InitPorts[cellType, l, none, "In", "nIn", "SelWrite"]; [] _ Ports.InitPorts[cellType, l, drive, "Out",]; [state.vdd, state.gnd] _ Ports.PortIndexes[cellType.public, "Vdd", "Gnd"]; [state.in, state.nIn, state.selWrite, state.out] _ Ports.PortIndexes[cellType.public, "In", "nIn", "SelWrite", "Out"]; state.storedval _ 0; [] _ Rosemary.SetFixedWire[cellType.public[state.vdd], H]; [] _ Rosemary.SetFixedWire[cellType.public[state.gnd], L]; stateAny _ state; }; IBuf6TRamCellEvalSimple: Rosemary.EvalProc = { state: IBuf6TRamCellState _ NARROW[stateAny]; xS: BOOL _ HasXs[p, state.in] OR HasXs[p, state.nIn] OR HasXs[p, state.selWrite]; IF NOT xS THEN IF PortToNat[p, state.selWrite] = 1 THEN { in: NAT _ PortToNat[p, state.in]; nIn: NAT _ PortToNat[p, state.nIn]; IF (in + nIn) = 1 THEN state.storedval _ in; }; IF state.storedval = 1 THEN {SetP[p, state.out, state.storedval]; p[state.out].d _ none; p[state.out].d _ drive;} ELSE {SetP[p, state.out, state.storedval]; p[state.out].d _ drive;}; stateAny _ state; }; END. lTamIBuf6TCell.mesa Copyright Σ 1987 by Xerox Corporation. All rights reserved. July 1, 1987 9:52:11 am PDT Last Edited by: Krivacic April June 26, 1987 3:09:37 pm PDT -------------------- IBuf6TRamCell --------------------- --PROC [cellType: Core.CellType, p: Ports.Port] RETURNS [stateAny: REF ANY _ NIL]-- PROC [p: Ports.Port, stateAny: REF ANY]-- Κq˜Jšœ‹ΟkΟr™¨J˜J˜Jš œ•˜žJ˜šΟn œœ˜JšœP˜WJ˜Jšœœœ˜ J˜Jšœ œ˜J˜J˜J˜J™J™JšΟcœ œ™8J˜Jšœœœ˜5Icodeš œœœ$œœœœ˜iK˜K˜KšŸœœw˜K˜šŸ œœœœ˜@˜#Kšœ˜KšœH˜HKšœH˜HKšœ7˜7K˜1Kšœ˜——K˜K˜šŸœ˜,K™Kš S™SK˜Kšœœ˜7K˜Kšœ6˜6KšœA˜AKšœ1˜1K˜KšœJ˜JKšœv˜vK˜K˜K˜Kšœ:˜:Kšœ:˜:Kšœ˜Kšœ˜K˜—J˜šŸœ˜.J˜Jšœœœ ™*J˜Jšœœ ˜-Jšœœœœ˜SJ˜šœœœ˜šœ#œ˜+Jšœœ˜!Jšœœ˜#Jšœœ˜,J˜J˜——JšœœXœ@˜·Jšœ˜Jšœ˜—J˜˜J˜—J˜J˜J˜J˜J˜J˜Jšœ˜—J™—…—Ύ ›