DIRECTORY TamDefs; TamGenDefs: CEDAR DEFINITIONS = BEGIN OPEN TamDefs; -- raddr raddr: TYPE = MACHINE DEPENDENT { Tos (0), Arg (1), Arg2 (2), IBufN (3), Opcode (4), K (5) }; waddr: TYPE = MACHINE DEPENDENT { NewTos (0), NewArg (1), NewArg2 (2), IBufN (3), Opcode (4), K (5) }; rd1addr: TYPE = MACHINE DEPENDENT { Raddr (0), IBufData (2), Mar (3), MuxBus (4), Temp1 (5), Nil (6) }; rd2addr: TYPE = MACHINE DEPENDENT { PrevRaddr1 (0), CurrPc (1), Temp1 (2), Nil (3), T (4), Unbound (5), MuxBus (7), SymbolTypeBits (8), Zero (9), PtrMask (10), Three (11), TosWord (12), MVArgBit (13), NextPc (14) }; w2addr: TYPE = MACHINE DEPENDENT { None (0), Pc (1), Temp1 (2), TosWord (3), TosWordnArg (4) }; tag: TYPE = MACHINE DEPENDENT {Int (0), D2b87 (1), D1 (2), D2 (3)}; MuxRec: TYPE = MACHINE DEPENDENT RECORD [ selReg (00: 00..00): BOOL _ FALSE, -- select reg or 0 selOp (00: 01..01): BOOL _ FALSE, -- select + or - selMux (00: 02..02): BOOL _ FALSE, -- select MuxBus or 0 selIncr (00: 03..03): BOOL _ FALSE -- select +1 or +0 ]; -- Data Path Condition Codes altcxt: TYPE = MACHINE DEPENDENT { Top (0), NextTop (1), PrevTop (2), Bot (3), NextBot (4), PrevBot (5), K (6), Global (7) }; cycle: TYPE = MACHINE DEPENDENT { None (0), R40 (1), RWAccess (2), W34 (3), W6 (4), W40 (5) }; opmask: TYPE = MACHINE DEPENDENT {None (0), b0111 (1), b1111 (2)}; muxbus: TYPE = MACHINE DEPENDENT { Tos (0), Arg (1), Arg2 (2), IBufN (3), Opcode (4), K (5), K2 (6), D2 (7), R (8) }; memoffset: TYPE = MACHINE DEPENDENT { None (0), MuxBus (1), K2 (2) }; muxccode: TYPE = MACHINE DEPENDENT { T (0), ArgEQArg2 (1), ArgNEQArg2 (2), ArgEQ0 (3), ArgNEQ0 (4), FramesFull (5), FramesAvail (6), FramesEmpty (7), Opcodeb3 (8), Argb3 (9), TosEQArg2 (10) }; euccode: TYPE = MACHINE DEPENDENT { T (0), overFlow (1), carry (2), gt (3) }; memccode: TYPE = MACHINE DEPENDENT { T (0), RWAccess (1), PageFault (2), NoPageFault (3) }; uCode: ARRAY[0..511] OF POINTER TO UCodeWord; dpCCMax: NAT = 4; dpCCodes: ARRAY[0..dpCCMax] OF DPCondCodeRec = [ [[0,0], [0,0], [0,0], [0,0], [0,0]], [[0,0], [0,0], [0,0], [0,0], [0,0]], [[0,0], [0,0], [0,0], [0,0], [0,0]], [[0,0], [0,0], [0,0], [0,0], [0,0]], [[0,0], [0,0], [0,0], [0,0], [0,0]] ]; END. Τ-- TamGenDefs.mesa Last Edited by: Krivacic April 23, 1987 11:37:22 am PST -- Code Generated From The Lisp Simulator rd1addrs rd2addrs w2addrs tags regmux stuff -- UCode Rom -- Data Path Condition Codes Κ†˜™Icode™7—J™J™)J™J˜J™šΟn œΟkœž ˜Kšœžœžœ ˜K˜K˜K˜šœžœžœž œ˜!K˜ K˜K˜ K˜ K˜ K˜K˜—K˜šœžœžœž œ˜!K˜ K˜ K˜ K˜ K˜ K˜K˜—K˜Kšœ™K˜šœ žœžœž œ˜#Kšœ ˜ Kšœ ˜ K˜K˜ K˜ K˜K˜—K˜K˜Kšœ™K˜šœ žœžœž œ˜#Kšœ˜Kšœ ˜ K˜ K˜K˜K˜ K˜ K˜K˜ K˜ K˜ K˜ K˜Kšœ ˜ K˜—K˜K˜Kšœ™K˜K˜šœžœžœž œ˜"Kšœ ˜ Kšœ˜K˜ K˜ K˜K˜—K˜K˜K™K˜Kšœžœžœž œ&˜CK˜K™ K˜š œžœžœž œžœ˜)KšœžœžœΟc˜5KšœžœžœŸ˜2KšœžœžœŸ˜8KšœžœžœŸ˜5K˜—K˜K˜K˜šœžœžœž œ˜"K˜K˜ K˜ K˜K˜ K˜ K˜K˜ K˜—K˜šœžœžœž œ˜!K˜ K˜K˜ K˜K˜K˜K˜—K˜Kšœžœžœž œ"˜BK˜šœžœžœž œ˜"K˜K˜K˜ K˜ K˜ K˜K˜K˜K˜K˜—K˜šœ žœžœž œ˜%K˜ K˜ K˜K˜—K˜šœ žœžœž œ˜$K˜K˜K˜K˜ K˜ K˜K˜K˜K˜ K˜ K˜K˜—K˜šœ žœžœž œ˜#J–1.2 in tabStopsšœ˜J–1.2 in tabStopsšœ žœ˜ J–1.2 in tabStopsšœ ˜ J–1.2 in tabStopsšœ˜J–1.2 in tabStops˜—K˜šœ žœžœž œ˜$K˜K˜ K˜K˜K˜——K–26 sp tabStops˜K–26 sp tabStops™ K–26 sp tabStops˜K–26 sp tabStopsšœžœ žœž œ ˜-K–26 sp tabStops˜K–26 sp tabStops™K–26 sp tabStops˜K–26 sp tabStops˜–26 sp tabStops˜0K–26 sp tabStops˜$K–26 sp tabStops˜$K–26 sp tabStops˜$K–26 sp tabStops˜$K–26 sp tabStops˜#K–26 sp tabStops˜—K–26 sp tabStops˜–26 sp tabStops˜K–26 sp tabStops˜—K–26 sp tabStops˜K–26 sp tabStops˜J˜J˜—…—Ύ