DIRECTORY Basics, BitOps, Core, CoreClasses, CoreCreate, CoreProperties, Ports, Rosemary, RosemaryUser, TamPorts, TamEu, Rope, TamDefs; EuCells: CEDAR PROGRAM IMPORTS Ports, Rosemary, TamPorts, TamEu, TamDefs = BEGIN OPEN TamDefs; BoolToInt: PROC [b: BOOL] RETURNS [NAT] = {RETURN[IF b THEN 1 ELSE 0]}; busBits: NAT _ 32; EUSelect: PROC [p: Ports.Port, portindex: NAT] RETURNS [NAT] = { RETURN[TamPorts.PortToNat[p, portindex] / 16]; }; EUMask: PROC [p: Ports.Port, portindex: NAT] RETURNS [CARD] = { RETURN[TamPorts.PortToNat[p, portindex] MOD 16]; }; LuState: TYPE = REF LuStateRec; LuStateRec: TYPE = RECORD [d1, d2, r, euControl, nEuControl, vdd, gnd: NAT _ LAST[NAT]]; LuInit: Rosemary.InitProc = { state: LuState _ NEW[LuStateRec]; [] _ Ports.InitPorts[cellType, ls, none, "D1", "D2", "EUControl", "nEUControl"]; [] _ Ports.InitPorts[cellType, ls, drive, "R"]; [state.d1, state.d2, state.r, state.euControl, state.nEuControl, state.vdd, state.gnd] _ Ports.PortIndexes[cellType.public, "D1", "D2", "R", "EUControl", "nEUControl", "Vdd", "Gnd"]; [] _ Rosemary.SetFixedWire[cellType.public[state.vdd], H]; [] _ Rosemary.SetFixedWire[cellType.public[state.gnd], L]; stateAny _ state; }; LuEvalSimple: Rosemary.EvalProc = { state: LuState _ NARROW[stateAny]; hasXs: BOOL _ TamPorts.HasXs[p, state.euControl] OR TamPorts.HasXs[p, state.d1] OR TamPorts.HasXs[p, state.d2]; IF (NOT hasXs) AND (LOOPHOLE[EUSelect[p, state.euControl], EuUnits] = LU) THEN TamPorts.SetP[ p, state.r, TamDefs.WordToCard[ TamEu.LogicalUnit[ EUMask[p, state.euControl], TamPorts.PortToTamWord[p, state.d1], TamPorts.PortToTamWord[p, state.d2]]]] ELSE TamPorts.ClrP[p, state.r]; }; AdderState: TYPE = REF AdderStateRec; AdderStateRec: TYPE = RECORD [d1, d2, r, euControl, nEuControl, euCC, vdd, gnd: NAT _ LAST[NAT]]; AdderInit: Rosemary.InitProc = { state: AdderState _ NEW[AdderStateRec]; [] _ Ports.InitPorts[cellType, l, none, "Vdd", "Gnd"]; [] _ Ports.InitPorts[cellType, ls, none, "D1", "D2", "EUControl", "nEUControl"]; [] _ Ports.InitPorts[cellType, ls, drive, "R", "euCC"]; [state.d1, state.d2, state.r, state.euControl, state.nEuControl, state.euCC, state.vdd, state.gnd] _ Ports.PortIndexes[cellType.public, "D1", "D2", "R", "EUControl", "nEUControl", "euCC", "Vdd", "Gnd"]; [] _ Rosemary.SetFixedWire[cellType.public[state.vdd], H]; [] _ Rosemary.SetFixedWire[cellType.public[state.gnd], L]; stateAny _ state; }; AdderEvalSimple: Rosemary.EvalProc = { result: TamDefs.Word; overFlow, carry, gt: BOOL _ FALSE; state: AdderState _ NARROW[stateAny]; hasXs: BOOL _ TamPorts.HasXs[p, state.euControl] OR TamPorts.HasXs[p, state.d1] OR TamPorts.HasXs[p, state.d2]; IF NOT hasXs THEN [result, overFlow, carry, gt] _ TamEu.Adder[ EUMask[p, state.euControl], TamPorts.PortToTamWord[p, state.d1], TamPorts.PortToTamWord[p, state.d2]]; TamPorts.SetP[p, state.euCC, BoolToInt[carry]*4+BoolToInt[overFlow]*2+BoolToInt[gt]]; IF (NOT hasXs) AND (LOOPHOLE[EUSelect[p, state.euControl], EuUnits] = Adder) THEN TamPorts.SetP[p, state.r, TamDefs.WordToCard[result]] ELSE TamPorts.ClrP[p, state.r]; }; ShifterState: TYPE = REF ShifterStateRec; ShifterStateRec: TYPE = RECORD [d1, d2, r, euControl, nEuControl, muxBus, vdd, gnd: NAT _ LAST[NAT]]; ShifterInit: Rosemary.InitProc = { state: ShifterState _ NEW[ShifterStateRec]; [] _ Ports.InitPorts[cellType, l, none, "Vdd", "Gnd"]; [] _ Ports.InitPorts[cellType, ls, none, "D1", "D2", "MuxBus", "EUControl", "nEUControl"]; [] _ Ports.InitPorts[cellType, ls, drive, "R"]; [state.d1, state.d2, state.r, state.euControl, state.nEuControl, state.muxBus, state.vdd, state.gnd] _ Ports.PortIndexes[cellType.public, "D1", "D2", "R", "EUControl", "nEUControl", "MuxBus", "Vdd", "Gnd"]; [] _ Rosemary.SetFixedWire[cellType.public[state.vdd], H]; [] _ Rosemary.SetFixedWire[cellType.public[state.gnd], L]; stateAny _ state; }; ShifterEvalSimple: Rosemary.EvalProc = { state: ShifterState _ NARROW[stateAny]; hasXs: BOOL _ TamPorts.HasXs[p, state.euControl] OR TamPorts.HasXs[p, state.d1] OR TamPorts.HasXs[p, state.d2] OR TamPorts.HasXs[p, state.muxBus]; IF (NOT hasXs) AND (LOOPHOLE[EUSelect[p, state.euControl], EuUnits] = Shifter) THEN TamPorts.SetP[p, state.r, TamDefs.WordToCard[ TamEu.Shifter[ TamPorts.PortToTamWord[p, state.d1], TamPorts.PortToTamWord[p, state.d2], TamPorts.GetPVal[p, state.muxBus]]]] ELSE TamPorts.ClrP[p, state.r]; }; PriorityState: TYPE = REF PriorityStateRec; PriorityStateRec: TYPE = RECORD [d1, r, euControl, vdd, gnd: NAT _ LAST[NAT]]; PriorityInit: Rosemary.InitProc = { state: PriorityState _ NEW[PriorityStateRec]; [] _ Ports.InitPorts[cellType, l, none, "Vdd", "Gnd"]; [] _ Ports.InitPorts[cellType, ls, none, "D1", "EUControl"]; [] _ Ports.InitPorts[cellType, ls, drive, "R"]; [state.d1, state.r, state.euControl, state.vdd, state.gnd] _ Ports.PortIndexes[cellType.public, "D1", "R", "EUControl", "Vdd", "Gnd"]; [] _ Rosemary.SetFixedWire[cellType.public[state.vdd], H]; [] _ Rosemary.SetFixedWire[cellType.public[state.gnd], L]; stateAny _ state; }; PriorityEvalSimple: Rosemary.EvalProc = { state: PriorityState _ NARROW[stateAny]; hasXs: BOOL _ TamPorts.HasXs[p, state.d1]; IF (NOT hasXs) AND (LOOPHOLE[EUSelect[p, state.euControl], EuUnits] = Prior) THEN TamPorts.SetP[p, state.r, TamDefs.WordToCard[ TamEu.PriorityEncoder[ TamPorts.PortToTamWord[p, state.d1]]]] ELSE TamPorts.ClrP[p, state.r]; }; ExecutionUnitsState: TYPE = REF ExecutionUnitsStateRec; ExecutionUnitsStateRec: TYPE = RECORD [d1, d2, r, euControl, nEuControl, muxBus, euCC, vdd, gnd: NAT _ LAST[NAT]]; ExecutionUnitsInit: Rosemary.InitProc = { state: ExecutionUnitsState _ NEW[ExecutionUnitsStateRec]; [] _ Ports.InitPorts[cellType, ls, none, "D1", "D2", "MuxBus", "EUControl", "nEUControl"]; [] _ Ports.InitPorts[cellType, ls, drive, "R", "euCC"]; [state.d1, state.d2, state.r, state.euControl, state.nEuControl, state.muxBus, state.euCC, state.vdd, state.gnd] _ Ports.PortIndexes[cellType.public, "D1", "D2", "R", "EUControl", "nEUControl", "MuxBus", "euCC", "Vdd", "Gnd"]; [] _ Rosemary.SetFixedWire[cellType.public[state.vdd], H]; [] _ Rosemary.SetFixedWire[cellType.public[state.gnd], L]; stateAny _ state; }; ExecutionUnitsEvalSimple: Rosemary.EvalProc = { result: TamDefs.Word; overFlow, carry, gt: BOOL _ FALSE; state: ExecutionUnitsState _ NARROW[stateAny]; hasXs: BOOL _ TamPorts.HasXs[p, state.euControl] OR TamPorts.HasXs[p, state.d1] OR TamPorts.HasXs[p, state.d2] OR TamPorts.HasXs[p, state.muxBus]; IF NOT hasXs THEN [result, overFlow, carry, gt] _ TamEu.ExecutionUnits[ TamPorts.PortToNat[p, state.euControl], TamPorts.PortToTamWord[p, state.d1], TamPorts.PortToTamWord[p, state.d2], TamPorts.PortToNat[p, state.muxBus]]; IF hasXs THEN TamPorts.ClrP[p, state.r] ELSE TamPorts.SetP[p, state.r, TamDefs.WordToCard[result]] ; TamPorts.SetP[p, state.euCC, BoolToInt[carry]*4+BoolToInt[overFlow]*2+BoolToInt[gt]]; }; executionUnitsName: Rope.ROPE = Rosemary.Register[roseClassName: "ExecutionUnits", init: ExecutionUnitsInit, evalSimple: ExecutionUnitsEvalSimple]; shifterName: Rope.ROPE = Rosemary.Register[roseClassName: "Shifter", init: ShifterInit, evalSimple: ShifterEvalSimple]; luName: Rope.ROPE = Rosemary.Register[roseClassName: "LU", init: LuInit, evalSimple: LuEvalSimple]; adderName: Rope.ROPE = Rosemary.Register[roseClassName: "Adder", init: AdderInit, evalSimple: AdderEvalSimple]; priorityName: Rope.ROPE = Rosemary.Register[roseClassName: "Priority", init: PriorityInit, evalSimple: PriorityEvalSimple]; END. X-- EuCells.mesa Copyright س 1987 by Xerox Corporation. All rights reserved. April 10, 1987 1:04:28 pm PST Last Edited by: Krivacic April 6, 1987 4:08:37 pm PDT -------------------- LU - Logical Unit --------------------- --PROC [cellType: Core.CellType, p: Ports.Port] RETURNS [stateAny: REF ANY _ NIL]-- PROC [p: Ports.Port, stateAny: REF ANY]-- -------------------- Adder --------------------- --PROC [cellType: Core.CellType, p: Ports.Port] RETURNS [stateAny: REF ANY _ NIL]-- PROC [p: Ports.Port, stateAny: REF ANY]-- -------------------- Shifter --------------------- --PROC [cellType: Core.CellType, p: Ports.Port] RETURNS [stateAny: REF ANY _ NIL]-- PROC [p: Ports.Port, stateAny: REF ANY]-- EUMask[p, state.euControl], -------------------- Priority --------------------- --PROC [cellType: Core.CellType, p: Ports.Port] RETURNS [stateAny: REF ANY _ NIL]-- PROC [p: Ports.Port, stateAny: REF ANY]-- -------------------- ExecutionUnits --------------------- --PROC [cellType: Core.CellType, p: Ports.Port] RETURNS [stateAny: REF ANY _ NIL]-- PROC [p: Ports.Port, stateAny: REF ANY]-- ‌تNکJڑœ‌دkدr™،J™J™Jڑ‌ ک Icodeڑœ}ک}JکJکڑدnœ‌œ‌کJڑ‌œ*ک1JکJڑœ‌œ‌œ کJکڑں œ‌œ‌œ‌œ‌œ‌œ‌œ‌œ‌œکGJک—JکJڑœ ‌œکJکJکڑ ںœ‌œ‌œ‌œ‌œک@Jڑ‌œ(ک.Jک—Jکڑ ںœ‌œ‌œ‌œ‌œک?Jڑ‌œ"‌œک0Jک—JکJڑدcœ‌œ œ™