Basics, BitOps, Core, CoreClasses, CoreCreate, CoreProperties, Ports, Rosemary, RosemaryUser, TamPorts, TamEu, Rope, TamDefs;
EuCells:
CEDAR
PROGRAM
IMPORTS Ports, Rosemary, TamPorts, TamEu, TamDefs
= BEGIN OPEN TamDefs;
BoolToInt:
PROC [b:
BOOL]
RETURNS [
NAT] = {
RETURN[
IF b
THEN 1
ELSE 0]};
busBits: NAT ← 32;
EUSelect:
PROC [p: Ports.Port, portindex:
NAT]
RETURNS [
NAT] = {
RETURN[TamPorts.PortToNat[p, portindex] / 16];
};
EUMask:
PROC [p: Ports.Port, portindex:
NAT]
RETURNS [
CARD] = {
RETURN[TamPorts.PortToNat[p, portindex] MOD 16];
};
-------------------- LU - Logical Unit ---------------------
LuState: TYPE = REF LuStateRec;
LuStateRec: TYPE = RECORD [d1, d2, r, euControl, nEuControl, vdd, gnd: NAT ← LAST[NAT]];
LuInit: Rosemary.InitProc = {
--PROC [cellType: Core.CellType, p: Ports.Port] RETURNS [stateAny: REF ANY ← NIL]--
state: LuState ← NEW[LuStateRec];
[] ← Ports.InitPorts[cellType, ls, none, "D1", "D2", "EUControl", "nEUControl"];
[] ← Ports.InitPorts[cellType, ls, drive, "R"];
[state.d1, state.d2, state.r, state.euControl, state.nEuControl, state.vdd, state.gnd] ← Ports.PortIndexes[cellType.public, "D1", "D2", "R", "EUControl", "nEUControl", "Vdd", "Gnd"];
[] ← Rosemary.SetFixedWire[cellType.public[state.vdd], H];
[] ← Rosemary.SetFixedWire[cellType.public[state.gnd], L];
stateAny ← state;
};
LuEvalSimple: Rosemary.EvalProc = {
PROC [p: Ports.Port, stateAny: REF ANY]--
state: LuState ← NARROW[stateAny];
hasXs: BOOL ← TamPorts.HasXs[p, state.euControl] OR TamPorts.HasXs[p, state.d1] OR TamPorts.HasXs[p, state.d2];
IF (
NOT hasXs)
AND (
LOOPHOLE[EUSelect[p, state.euControl], EuUnits] =
LU)
THEN
TamPorts.SetP[
p,
state.r,
TamDefs.WordToCard[
TamEu.LogicalUnit[
EUMask[p, state.euControl],
TamPorts.PortToTamWord[p, state.d1],
TamPorts.PortToTamWord[p, state.d2]]]]
ELSE TamPorts.ClrP[p, state.r];
};
-------------------- Adder ---------------------
AdderState: TYPE = REF AdderStateRec;
AdderStateRec: TYPE = RECORD [d1, d2, r, euControl, nEuControl, euCC, vdd, gnd: NAT ← LAST[NAT]];
AdderInit: Rosemary.InitProc = {
--PROC [cellType: Core.CellType, p: Ports.Port] RETURNS [stateAny: REF ANY ← NIL]--
state: AdderState ← NEW[AdderStateRec];
[] ← Ports.InitPorts[cellType, l, none, "Vdd", "Gnd"];
[] ← Ports.InitPorts[cellType, ls, none, "D1", "D2", "EUControl", "nEUControl"];
[] ← Ports.InitPorts[cellType, ls, drive, "R", "euCC"];
[state.d1, state.d2, state.r, state.euControl, state.nEuControl, state.euCC, state.vdd, state.gnd] ← Ports.PortIndexes[cellType.public, "D1", "D2", "R", "EUControl", "nEUControl", "euCC", "Vdd", "Gnd"];
[] ← Rosemary.SetFixedWire[cellType.public[state.vdd], H];
[] ← Rosemary.SetFixedWire[cellType.public[state.gnd], L];
stateAny ← state;
};
AdderEvalSimple: Rosemary.EvalProc = {
PROC [p: Ports.Port, stateAny: REF ANY]--
result: TamDefs.Word;
overFlow, carry, gt: BOOL ← FALSE;
state: AdderState ← NARROW[stateAny];
hasXs: BOOL ← TamPorts.HasXs[p, state.euControl] OR TamPorts.HasXs[p, state.d1] OR TamPorts.HasXs[p, state.d2];
IF
NOT hasXs
THEN
[result, overFlow, carry, gt] ←
TamEu.Adder[
EUMask[p, state.euControl],
TamPorts.PortToTamWord[p, state.d1],
TamPorts.PortToTamWord[p, state.d2]];
TamPorts.SetP[p, state.euCC, BoolToInt[carry]*4+BoolToInt[overFlow]*2+BoolToInt[gt]];
IF (
NOT hasXs)
AND (
LOOPHOLE[EUSelect[p, state.euControl], EuUnits] = Adder)
THEN
TamPorts.SetP[p, state.r, TamDefs.WordToCard[result]]
ELSE TamPorts.ClrP[p, state.r];
};
-------------------- Shifter ---------------------
ShifterState: TYPE = REF ShifterStateRec;
ShifterStateRec: TYPE = RECORD [d1, d2, r, euControl, nEuControl, muxBus, vdd, gnd: NAT ← LAST[NAT]];
ShifterInit: Rosemary.InitProc = {
--PROC [cellType: Core.CellType, p: Ports.Port] RETURNS [stateAny: REF ANY ← NIL]--
state: ShifterState ← NEW[ShifterStateRec];
[] ← Ports.InitPorts[cellType, l, none, "Vdd", "Gnd"];
[] ← Ports.InitPorts[cellType, ls, none, "D1", "D2", "MuxBus", "EUControl", "nEUControl"];
[] ← Ports.InitPorts[cellType, ls, drive, "R"];
[state.d1, state.d2, state.r, state.euControl, state.nEuControl, state.muxBus, state.vdd, state.gnd] ← Ports.PortIndexes[cellType.public, "D1", "D2", "R", "EUControl", "nEUControl", "MuxBus", "Vdd", "Gnd"];
[] ← Rosemary.SetFixedWire[cellType.public[state.vdd], H];
[] ← Rosemary.SetFixedWire[cellType.public[state.gnd], L];
stateAny ← state;
};
ShifterEvalSimple: Rosemary.EvalProc = {
PROC [p: Ports.Port, stateAny: REF ANY]--
state: ShifterState ← NARROW[stateAny];
hasXs: BOOL ← TamPorts.HasXs[p, state.euControl] OR TamPorts.HasXs[p, state.d1] OR TamPorts.HasXs[p, state.d2] OR TamPorts.HasXs[p, state.muxBus];
IF (
NOT hasXs)
AND (
LOOPHOLE[EUSelect[p, state.euControl], EuUnits] = Shifter)
THEN
TamPorts.SetP[p, state.r,
TamDefs.WordToCard[
TamEu.Shifter[
EUMask[p, state.euControl],
TamPorts.PortToTamWord[p, state.d1],
TamPorts.PortToTamWord[p, state.d2],
TamPorts.GetPVal[p, state.muxBus]]]]
ELSE TamPorts.ClrP[p, state.r];
};
-------------------- Priority ---------------------
PriorityState: TYPE = REF PriorityStateRec;
PriorityStateRec: TYPE = RECORD [d1, r, euControl, vdd, gnd: NAT ← LAST[NAT]];
PriorityInit: Rosemary.InitProc = {
--PROC [cellType: Core.CellType, p: Ports.Port] RETURNS [stateAny: REF ANY ← NIL]--
state: PriorityState ← NEW[PriorityStateRec];
[] ← Ports.InitPorts[cellType, l, none, "Vdd", "Gnd"];
[] ← Ports.InitPorts[cellType, ls, none, "D1", "EUControl"];
[] ← Ports.InitPorts[cellType, ls, drive, "R"];
[state.d1, state.r, state.euControl, state.vdd, state.gnd] ← Ports.PortIndexes[cellType.public, "D1", "R", "EUControl", "Vdd", "Gnd"];
[] ← Rosemary.SetFixedWire[cellType.public[state.vdd], H];
[] ← Rosemary.SetFixedWire[cellType.public[state.gnd], L];
stateAny ← state;
};
PriorityEvalSimple: Rosemary.EvalProc = {
PROC [p: Ports.Port, stateAny: REF ANY]--
state: PriorityState ← NARROW[stateAny];
hasXs: BOOL ← TamPorts.HasXs[p, state.d1];
IF (
NOT hasXs)
AND (
LOOPHOLE[EUSelect[p, state.euControl], EuUnits] = Prior)
THEN
TamPorts.SetP[p, state.r,
TamDefs.WordToCard[
TamEu.PriorityEncoder[
TamPorts.PortToTamWord[p, state.d1]]]]
ELSE TamPorts.ClrP[p, state.r];
};
-------------------- ExecutionUnits ---------------------
ExecutionUnitsState: TYPE = REF ExecutionUnitsStateRec;
ExecutionUnitsStateRec: TYPE = RECORD [d1, d2, r, euControl, nEuControl, muxBus, euCC, vdd, gnd: NAT ← LAST[NAT]];
ExecutionUnitsInit: Rosemary.InitProc = {
--PROC [cellType: Core.CellType, p: Ports.Port] RETURNS [stateAny: REF ANY ← NIL]--
state: ExecutionUnitsState ← NEW[ExecutionUnitsStateRec];
[] ← Ports.InitPorts[cellType, ls, none, "D1", "D2", "MuxBus", "EUControl", "nEUControl"];
[] ← Ports.InitPorts[cellType, ls, drive, "R", "euCC"];
[state.d1, state.d2, state.r, state.euControl, state.nEuControl, state.muxBus, state.euCC, state.vdd, state.gnd] ← Ports.PortIndexes[cellType.public, "D1", "D2", "R", "EUControl", "nEUControl", "MuxBus", "euCC", "Vdd", "Gnd"];
[] ← Rosemary.SetFixedWire[cellType.public[state.vdd], H];
[] ← Rosemary.SetFixedWire[cellType.public[state.gnd], L];
stateAny ← state;
};
ExecutionUnitsEvalSimple: Rosemary.EvalProc = {
PROC [p: Ports.Port, stateAny: REF ANY]--
result: TamDefs.Word;
overFlow, carry, gt: BOOL ← FALSE;
state: ExecutionUnitsState ← NARROW[stateAny];
hasXs: BOOL ← TamPorts.HasXs[p, state.euControl] OR TamPorts.HasXs[p, state.d1] OR TamPorts.HasXs[p, state.d2] OR TamPorts.HasXs[p, state.muxBus];
IF
NOT hasXs
THEN
[result, overFlow, carry, gt] ←
TamEu.
ExecutionUnits[
TamPorts.PortToNat[p, state.euControl],
TamPorts.PortToTamWord[p, state.d1],
TamPorts.PortToTamWord[p, state.d2],
TamPorts.PortToNat[p, state.muxBus]];
IF hasXs
THEN TamPorts.ClrP[p, state.r]
ELSE TamPorts.SetP[p, state.r, TamDefs.WordToCard[result]] ;
TamPorts.SetP[p, state.euCC, BoolToInt[carry]*4+BoolToInt[overFlow]*2+BoolToInt[gt]];
};
executionUnitsName: Rope.ROPE = Rosemary.Register[roseClassName: "ExecutionUnits", init: ExecutionUnitsInit, evalSimple: ExecutionUnitsEvalSimple];
shifterName: Rope.ROPE = Rosemary.Register[roseClassName: "Shifter", init: ShifterInit, evalSimple: ShifterEvalSimple];
luName: Rope.ROPE = Rosemary.Register[roseClassName: "LU", init: LuInit, evalSimple: LuEvalSimple];
adderName: Rope.ROPE = Rosemary.Register[roseClassName: "Adder", init: AdderInit, evalSimple: AdderEvalSimple];
priorityName: Rope.ROPE = Rosemary.Register[roseClassName: "Priority", init: PriorityInit, evalSimple: PriorityEvalSimple];
END.