-- (ClockIn ResetIn Hold XEnb X<40> ClockBIn) (HoldA EnbBufs Cas RasEnable WriteEnableTag WriteEnableData WriteCycle PhyAddr<32> X<40> temp1 temp2 temp3 temp4) 
-- Last Edited by: Alan Bell September 23, 1987 3:24:34 pm PDT
-- Krivacic September 18, 1987 1:18:01 pm PDT

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