* --------------------------------------------------------; * Tamarin microcode 11/10 /87 * for * CMOS Chip I * --------------------------------------------------------; * -------------------------------------------------------- * Copyright (c) 1987 Xerox Corporation * All rights reserved. * ------------------------------------------------------- * ------------------------------------------------------; * Constants; * ------------------------------------------------------; * 'T; Label_'T Aside OpLength_1 EUop_D2 Tag_D2 RD1addr_0 RD2addr_T Waddr_NewTos_Tos+1 JumpT_Done; Label_SetT Aside EUop_D2 Tag_D2 RD1addr_0 RD2addr_T Waddr_NewTos JumpT_Done; Label_SetTB Bside EUop_D2 Tag_D2 RD1addr_0 RD2addr_T Waddr_NewTos JumpT_Done; * 'Nil; Label_'Nil Aside OpLength_1 EUop_D2 Tag_D2 RD1addr_0 RD2addr_Nil Waddr_NewTos_Tos+1 JumpT_Done; Label_SetNil Bside EUop_D2 Tag_D2 RD1addr_0 RD2addr_Nil Waddr_NewTos JumpT_Done; * '0; Label_'0 OpLength_1 EUop_D2 Tag_Int RD1addr_0 RD2addr_MuxBus_K_0 Waddr_NewTos_Tos+1 JumpT_Done; * '1; Label_'1 OpLength_1 EUop_D2 Tag_Int RD1addr_0 RD2addr_MuxBus_K_1 Waddr_NewTos_Tos+1 JumpT_Done; * 'UNBOUND; Label_'Unbound OpLength_1 EUop_D2 Tag_D2 RD1addr_0 RD2addr_Unbound Waddr_NewTos_Tos+1 JumpT_Done; * SICX,SICXX,ICONST; Label_SicX OpLength_2 EUop_D1 Tag_Int RD1addr_IBufData1 RD2addr_0 Waddr_NewTos_Tos+1 JumpT_Done; Label_SicXX OpLength_3 EUop_D1 Tag_Int RD1addr_IBufData2 RD2addr_0 Waddr_NewTos_Tos+1 JumpT_Done; Label_IntConst OpLength_5 EUop_D1 Tag_Int RD1addr_IBufData4 RD2addr_0 Waddr_NewTos_Tos+1 JumpT_Done; * SCONST; Label_SymbConst OpLength_5 EUop_Or Tag_D2 RD1addr_IBufData4 RD2addr_Symbol Waddr_NewTos_Tos+1 JumpT_Done; * FCONST; Label_FConst OpLength_5 EUop_D1 Tag_LowD2Tag RD1addr_IBufData4 RD2addr_MuxBus_K_FloatTypeBits Waddr_NewTos_Tos+1 JumpT_Done; * IMMCONST; Label_XConst OpLength_5 EUop_D1 Tag_LowD2Tag RD1addr_IBufData4 RD2addr_MuxBus_K_ImmTypeBits Waddr_NewTos_Tos+1 JumpT_Done; * PcONST; Label_Pconst1 OpLength_5 EUop_D1 Tag_LowD2Tag RD1addr_IBufData4 RD2addr_MuxBus_K_Ptr1TypeBits Waddr_NewTos_Tos+1 JumpT_Done; Label_Pconst2 OpLength_5 EUop_D1 Tag_LowD2Tag RD1addr_IBufData4 RD2addr_MuxBus_K_Ptr2TypeBits Waddr_NewTos_Tos+1 JumpT_Done; * ------------------------------------------------------; * Variable Access; * ------------------------------------------------------; * VARX , VARX_ , VARX_^ ; Label_VarX OpLength_2 EUop_D1 Tag_D1 Raddr_IBufN RD2addr_0 Waddr_NewTos_Tos+1 JumpT_Done; Label_VarX_ OpLength_2 EUop_D1 Tag_D1 Raddr_Tos RD2addr_0 Waddr_IBufN JumpT_Done; Label_VarX_^ OpLength_2 EUop_D1 Tag_D1 Raddr_Tos RD2addr_0 Waddr_IBufN NewTos_Tos-MuxBus MuxBus_K_1 JumpT_Done; * VARK; Label_VarK OpLength_1 EUop_D1 Tag_D1 Raddr_Opcode Waddr_NewTos_Tos+1 JumpT_Done; Label_Vark OpLength_1 EUop_D1 Tag_D1 Raddr_Opcode Waddr_NewTos_Tos+1 JumpT_Done; * VARK_; Label_VarK_ OpLength_1 EUop_D1 Tag_D1 Raddr_Tos Waddr_Opcode JumpT_Done; Label_Vark_ OpLength_1 EUop_D1 Tag_D1 Raddr_Tos Waddr_Opcode JumpT_Done; * VARK_^; Label_VarK_^ OpLength_1 EUop_D1 Tag_D1 Raddr_Tos Waddr_Opcode NewTos_Tos-MuxBus MuxBus_K_1 JumpT_Done; Label_Vark_^ OpLength_1 EUop_D1 Tag_D1 Raddr_Tos Waddr_Opcode NewTos_Tos-MuxBus MuxBus_K_1 JumpT_Done; * GVAR; Label_GVar OpLength_5 MemOp_Map; MemOp_Map MemOffset_K2_ValueCellOffset MemLatchSrc_MapAddr EUop_D1 Tag_Int RD1addr_IBufData4 RD2addr_0; MemOp_Ras MemOffset_K2_0 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr EUop_D1 Tag_Int RD1addr_IBufData4 RD2addr_0; MemOp_Cas MemOffset_K2_0 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr EUop_XData W2addr_Temp1; EUop_D1 Tag_D1 RD1addr_Temp1 RD2addr_0 Waddr_NewTos_Tos+1 WriteF DpCCode_UnboundP JumpF_Done JumpT_Ufn-0d; * GVAR_; Label_GVar_^ OpLength_5 MemOp_Map; MemOp_Map MemOffset_K2_ValueCellOffset MemLatchSrc_MapAddr RD1addr_IBufData4 NewArg_MuxBus_Tos MemCCode_RWAccess JumpF_Ufn-1d; MemOp_Ras MemOffset_K2_0 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr NewArg_Arg-MuxBus MuxBus_K_1; MemOp_Cas MemOffset_K2_0 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr EUop_XData Waddr_K_DecRef WCxt AltCxt_Global; MemOp_Cas MemOffset_K2_0 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr WriteData EUop_D2 Tag_D2 Raddr_Tos Dswap Waddr_K_IncRef WCxt AltCxt_Global NewTos_MuxBus_Arg JumpT_RCcheck; * ------------------------------------------------------; * Free Variable References; * ------------------------------------------------------; * Removed for now; * ------------------------------------------------------; * Internal Global Registers; * ------------------------------------------------------; * IREGX ; Label_IReg.X OpLength_2 EUop_D1 Tag_D1 Raddr_IBufN RCxt AltCxt_Global Waddr_NewTos NewTos_Tos+1 JumpT_Done; * IREGX_^; Label_IReg.X_^ OpLength_2 EUop_D1 Tag_D1 Raddr_Tos Waddr_IBufN WCxt AltCxt_Global NewTos_Tos-MuxBus MuxBus_K_1 JumpT_Done; * ------------------------------------------------------; * Lexical Variables (1 frame back); * ------------------------------------------------------; * OVAR1.X; Label_Ovar1.X OpLength_2 EUop_D1 Tag_D1 Raddr_IBufN RCxt AltCxt_Top-1 Waddr_NewTos_Tos+1 MuxCCode_FramesEmpty WriteF JumpF_Done JumpT_Ufn-0d; * OVAR1.X_^; Label_Ovar1.X_^ OpLength_2 EUop_D1 Tag_D1 Raddr_Tos Waddr_IBufN WCxt AltCxt_Top-1 NewTos_Tos-MuxBus MuxBus_K_1 MuxCCode_FramesEmpty WriteF JumpF_Done JumpT_Ufn-1d; * ------------------------------------------------------; * Stack Modification * ------------------------------------------------------; * COPY; Label_Copy OpLength_1 EUop_D1 Tag_D1 Raddr_Tos Waddr_NewTos NewTos_Tos+1 JumpT_Done; * SWAP; Label_Swap OpLength_1 EUop_D2 Tag_D2 Raddr_Tos RD2addr_Raddr-1 W2addr_Temp1; EUop_D1 Tag_D1 Raddr_Tos RD2addr_Raddr-1 Waddr_NewTos NewTos_Tos-MuxBus MuxBus_K_1; EUop_D1 Tag_D1 RD1addr_Temp1 Waddr_NewTos NewTos_Tos+1 JumpT_Done; * POP; Label_Pop OpLength_1 NewTos_Tos-MuxBus MuxBus_K_1 JumpT_Done; * MOVETos; Label_MoveTos OpLength_2 EUop_D1 Tag_D1 Raddr_Tos Waddr_IBufN NewTos_MuxBus_IBufN JumpT_Done; * SETTos; Label_SetTos OpLength_2 NewTos_MuxBus_IBufN JumpT_Done; * ------------------------------------------------------; * Type Checking ; * ------------------------------------------------------; * FIXP; Label_FixP OpLength_1 EUop_D2 Tag_D2 Raddr_Tos Waddr_NewTos RD2addr_Nil DpCCode_FixP WriteF JumpF_Done JumpT_SetTB; * FLOATP; Label_FloatP OpLength_1 EUop_D2 Tag_D2 Raddr_Tos Waddr_NewTos RD2addr_Nil DpCCode_FloatP WriteF JumpF_Done JumpT_SetTB; * POINTERP; Label_PointerP OpLength_1 EUop_D2 Tag_D2 Raddr_Tos Waddr_NewTos RD2addr_Nil DpCCode_PointerP WriteF JumpF_Done JumpT_SetTB; * IMMEDIATEP; Label_ImmediateP OpLength_1 EUop_D2 Tag_D2 Raddr_Tos Waddr_NewTos RD2addr_Nil DpCCode_ImmediateP WriteF JumpF_Done JumpT_SetTB; * CONSP; Label_ConsP OpLength_1 EUop_D2 Tag_D2 Raddr_Tos Waddr_NewTos RD2addr_Nil DpCCode_ConsP WriteF JumpF_Done JumpT_SetTB; * SYMBOLP; Label_SymbolP OpLength_1 EUop_D2 Tag_D2 Raddr_Tos Waddr_NewTos RD2addr_Nil DpCCode_SymbolP WriteF JumpF_Done JumpT_SetTB; * SUBTYPEP.N; Label_SubTypeP OpLength_2 EUop_TypeBits Tag_Int Raddr_Tos W2addr_Temp1 DpCCode_PointerP JumpF_Ufn-1; EUop_D1 Tag_D1 RD1addr_Temp1 RD2addr_MuxBus_IBufN DpCCode_D1<8>=D2<8> JumpT_SetT JumpF_SetNil; * GETTYPEBITS; Label_TypeBits OpLength_1 EUop_TypeBits Tag_Int Raddr_Tos Waddr_NewTos JumpT_Done; * GETPTRBITS; Label_PtrBits OpLength_1 EUop_And Tag_Int Raddr_Tos RD2addr_PtrMask Waddr_NewTos JumpT_Done; * SETTYPE.N; Label_SetType OpLength_2 EUop_D1 Tag_LowD2Tag Raddr_Tos RD2addr_MuxBus_IBufN Waddr_NewTos JumpT_Done; * SETSUBTYPE; Label_SetSubType OpLength_1 EUop_MergeSubtype Tag_LowD2Tag Dswap Raddr_Tos RD2addr_Raddr-1 Waddr_NewTos NewTos_Tos-MuxBus MuxBus_K_1 JumpT_Done; * ------------------------------------------------------; * Comparisons ; * ------------------------------------------------------; * EQ; Label_Eq OpLength_1 Raddr_Tos RD2addr_Raddr-1 NewTos_Tos-MuxBus MuxBus_K_1 DpCCode_D1=D2 JumpT_SetT JumpF_SetNil; * - CL: E QL entry; Label_Eql OpLength_1 Raddr_Tos RD2addr_Raddr-1 NewTos_Tos-MuxBus MuxBus_K_1 DpCCode_D1=D2 WriteT JumpT_SetT; * - Not Both Numbers or Characters then Nil; Raddr_Tos RD2addr_Raddr-1 NewTos_Tos-MuxBus MuxBus_K_1 DpCCode_NumberPD1D2orCharacterPD1D2 WriteF JumpF_SetNil; * - Check Both Numbers & EQ subtypes codes; Label_Eql0 Aside Raddr_Tos RD2addr_Raddr-1 DpCCode_NumberPD1D2&D1=D2 WriteT JumpT_Ufn-2; * - Check Both Chars & EQ character codes; Raddr_Tos RD2addr_Raddr-1 NewTos_Tos-MuxBus MuxBus_K_1 DpCCode_CharacterPD1D2&D1<8>=D2<8> JumpT_SetT JumpF_SetNil; * - CL: EQUAL entry; Label_Equal OpLength_1 Raddr_Tos RD2addr_Raddr-1 NewTos_Tos-MuxBus MuxBus_K_1 DpCCode_D1=D2 WriteT JumpT_SetT; * - If Both Number or Character then do EQL; Raddr_Tos RD2addr_Raddr-1 DpCCode_NumberPD1D2orCharacterPD1D2 JumpT_Eql0; * - If Either Fix, Float, Imm, Number, or SymbolP then Nil; Bside Raddr_Tos RD2addr_Raddr-1 NewTos_Tos-MuxBus MuxBus_K_2 DpCCode_FixPFloatPImmPSymbolPNumberPD1orD2 WriteT JumpT_'Nil JumpF_Ufn-2; * - CL: =; Label_Arith= OpLength_1 Raddr_Tos RD2addr_Raddr-1 NewTos_Tos-MuxBus MuxBus_K_1 DpCCode_D1=D2 WriteT JumpT_SetT; * - Both FixP or Float then Nil; Raddr_Tos RD2addr_Raddr-1 NewTos_Tos-MuxBus MuxBus_K_2 DpCCode_FixPD1D2orFloatPD1D2 WriteT JumpT_'Nil JumpF_Ufn-2; * GREATERP; Label_Greater OpLength_1 EUop_Diff1s Tag_Int Raddr_Tos RD2addr_Raddr-1 NewTos_Tos-MuxBus MuxBus_K_1 DpCCode_FixPD1D2 EuCCode_GreaterP WriteT JumpT_SetT; EUop_D1 Tag_Int Raddr_Tos RD2addr_Raddr-1 NewTos_Tos-MuxBus MuxBus_K_2 DpCCode_FixPD1D2 WriteT JumpT_'Nil JumpF_Ufn-2; * ------------------------------------------------------; * Arithmetic Instructions ; * ------------------------------------------------------; * PLUS; Label_Plus OpLength_1 EUop_+ Tag_Int Raddr_Tos RD2addr_Raddr-1 Waddr_NewTos NewTos_Tos-MuxBus MuxBus_K_1 DpCCode_FixPD1D2 EuCCode_NoOverflow WriteT JumpT_Done JumpF_Ufn-2; Label_AddX OpLength_2 EUop_+ Tag_Int Raddr_Tos RD2addr_MuxBus_IBufN Waddr_NewTos DpCCode_FixPD1D2 EuCCode_NoOverflow WriteT JumpT_Done JumpF_Ufn-1d; * DIFF; Label_Diff OpLength_1 EUop_- Tag_Int Raddr_Tos RD2addr_Raddr-1 Waddr_NewTos NewTos_Tos-MuxBus MuxBus_K_1 DpCCode_FixPD1D2 EuCCode_NoOverflow WriteT JumpT_Done JumpF_Ufn-2; Label_SubX OpLength_2 EUop_- Tag_Int Dswap Raddr_Tos RD1addr_MuxBus_IBufN Waddr_NewTos DpCCode_FixPD1D2 EuCCode_NoOverflow WriteT JumpT_Done JumpF_Ufn-1d; * NEG; Label_Neg OpLength_1 EUop_- Tag_Int Raddr_Tos RD2addr_MuxBus_K_0 Waddr_NewTos DpCCode_FixPD1D2 EuCCode_NoOverflow WriteT JumpT_Done JumpF_Ufn-1; * ------------------------------------------------------; * Logical Instructions ; * ------------------------------------------------------; * LOGAND; Label_And OpLength_1 EUop_And Tag_Int Raddr_Tos RD2addr_Raddr-1 Waddr_NewTos NewTos_Tos-MuxBus MuxBus_K_1 DpCCode_FixPD1D2 WriteT JumpT_Done JumpF_Ufn-2; * LOGOR; Label_Or OpLength_1 EUop_Or Tag_Int Raddr_Tos RD2addr_Raddr-1 Waddr_NewTos NewTos_Tos-MuxBus MuxBus_K_1 DpCCode_FixPD1D2 WriteT JumpT_Done JumpF_Ufn-2; * LOGXOR ; Label_Xor OpLength_1 EUop_Xor Tag_Int Raddr_Tos RD2addr_Raddr-1 Waddr_NewTos NewTos_Tos-MuxBus MuxBus_K_1 DpCCode_FixPD1D2 WriteT JumpT_Done JumpF_Ufn-2; * LNOT ; Label_LNot OpLength_1 EUop_Xor Tag_D2 Raddr_Tos Dswap RD1addr_-1 Waddr_NewTos DpCCode_FixPD2 WriteT JumpT_Done JumpF_Ufn-1; * ------------------------------------------------------; * Multi-Precision Arithmetic Instructions ; * ------------------------------------------------------; * NewTos _ Tos-2 + Tos-1 + Tos ; * Tos-2 is Carry T or Nil, i.e. the carry in ; Label_ADC OpLength_1 EUop_D1 Tag_Int Raddr_Tos RD2addr_Raddr-1 W2addr_Temp1 NewTos_Tos-MuxBus MuxBus_K_1 DpCCode_FixPD1D2 WriteT JumpF_Ufn-3; * - Determine if Carry Present; Raddr_Tos Dswap RD2addr_Nil NewArg_MuxBus_Tos DpCCode_D1=D2 JumpT_ADCNoCarry; * - Tos-1 + Tos + 1 ; EUop_+c Tag_Int Raddr_Tos RD2addr_Temp1 Waddr_NewTos EuCCode_Carry JumpT_Done JumpF_SetNoCarry; * - Tos-1 + Tos ; Label_ADCNoCarry EUop_+ Tag_Int Raddr_Tos RD2addr_Temp1 Waddr_NewTos EuCCode_Carry JumpT_SetCarry JumpF_Done; * NewTos _ Tos-1 - Tos + (IF Tos-2=Nil THEN 0 ELSE 1); Label_SBC OpLength_1 EUop_D1 Tag_Int Raddr_Tos RD2addr_Raddr-1 W2addr_Temp1 NewTos_Tos-MuxBus MuxBus_K_1 DpCCode_FixPD1D2 WriteT JumpF_Ufn-3; * - Determine if Carry Present; Raddr_Tos Dswap RD2addr_Nil NewArg_MuxBus_Tos DpCCode_D1=D2 JumpT_SBCNoCarry; * - Tos-1 - Tos ; EUop_- Tag_Int Raddr_Tos Dswap RD2addr_Raddr-1 RD1addr_Temp1 Waddr_NewTos EuCCode_Carry JumpT_Done JumpF_SetNoCarry; * - Tos-1 - Tos - 1 ; Label_SBCNoCarry EUop_Diff1s Tag_Int Raddr_Tos Dswap RD2addr_Raddr-1 RD1addr_Temp1 Waddr_NewTos EuCCode_Carry JumpT_SetCarry JumpF_Done; * - Return a Carry; Label_SetCarry EUop_D2 Tag_D2 RD2addr_T Waddr_NewArg NewArg_Arg-MuxBus MuxBus_K_1 JumpT_Done; * - Return No Carry; Label_SetNoCarry EUop_D2 Tag_D2 RD2addr_Nil Waddr_NewArg NewArg_Arg-MuxBus MuxBus_K_1 JumpT_Done; * ------------------------------------------------------; * Shift Operations; * ------------------------------------------------------; * ALSH Arithmetic Shift; * Tos-1 value to shift; * Tos shift amount; Label_Ash OpLength_1 EUop_D2 Tag_Int Dswap Raddr_Tos RD2addr_Raddr-1 W2addr_Temp1 NewArg_MuxBus_D2 NewArg2_MuxBus DpCCode_PosFixPD2 JumpF_Arsh; * - Arithmetic LEFT SHIFT; * - If shift amount is >= 32 then Ufn; * - NOTE: a shift amount of 0 causes a Ufn! Need to find room for a 0 check; RD1addr_Temp1 DpCCode_PosFixP<=32D2 JumpF_Ufn-2; * - Make sure all FixPs; Raddr_Tos RD2addr_Raddr-1 DpCCode_FixPD1D2 JumpF_Ufn-2; * - Do the Shift (set shiftback amount); EUop_Shift Tag_Int Raddr_Tos Dswap RD2addr_0 Waddr_K_RTmp1 WCxt AltCxt_Global NewArg2_-MuxBus MuxBus_Arg DpCCode_PosFixP JumpT_ALsh0; * - Negative number, Shift Back to test for overflow; EUop_Shift Tag_Int RD1addr_-1 Raddr_K_RTmp1 Dswap RCxt AltCxt_Global RD2addr_Raddr-1 W2addr_Temp1 MuxBus_Arg2 DpCCode_PosFixPD2 JumpF_ALsh1 JumpT_Ufn-2; * - Positive number, Shift Back to test for overflow; Label_ALsh0 EUop_Shift Tag_Int RD1addr_0 Raddr_K_RTmp1 Dswap RCxt AltCxt_Global RD2addr_Raddr-1 W2addr_Temp1 MuxBus_Arg2 DpCCode_PosFixPD2 JumpF_Ufn-2; * - Test for overflow; Label_ALsh1 Aside EUop_D2 Tag_D2 Raddr_Tos Dswap RD2addr_Temp1 NewTos_Tos-MuxBus MuxBus_K_1 DpCCode_D1=D2 WriteT JumpF_Ufn-2; EUop_D1 Tag_Int Raddr_K_RTmp1 RCxt AltCxt_Global Waddr_NewTos JumpT_Done; * Arithmetic RIGHT SHIFT; * Arg is setup with neg shift amount; * Tos-1 is item to shift; Label_Arsh EUop_+ Tag_Int Raddr_Tos Dswap RD2addr_Raddr-1 RD1addr_MuxBus_K_32 EuCCode_Carry JumpF_Ufn-2; Raddr_Tos RD2addr_Raddr-1 NewTos_Tos-MuxBus MuxBus_K_1 DpCCode_FixPD1D2 WriteT JumpF_Ufn-2; EUop_Shift Tag_Int Dswap Raddr_Tos RD1addr_0 Waddr_NewTos MuxBus_Arg DpCCode_PosFixPD2 WriteT JumpT_Done; * - Negative Number, so need to set D1 to sign bits (-1); EUop_Shift Tag_Int Dswap Raddr_Tos RD1addr_-1 Waddr_NewTos MuxBus_Arg JumpT_Done; * ------------------------------------------------------; * Logical Shifts on FixP's ; * (no overflow checking) ; * ------------------------------------------------------; * LLSH; Label_Llsh OpLength_1 Dswap Raddr_Tos NewArg_MuxBus MuxBus_D2 DpCCode_PosFixP<=32D2 JumpF_Ufn-2; EUop_Shift Tag_Int Raddr_Tos Dswap RD2addr_0 W2addr_Temp1 MuxBus_Arg DpCCode_FixPD1D2 WriteT JumpF_Ufn-2; EUop_D1 Tag_D1 RD1addr_Temp1 Waddr_NewTos_Tos-MuxBus MuxBus_K_1 JumpT_Done; * LRSH; Label_Lrsh OpLength_1 Dswap Raddr_Tos NewArg_-MuxBus MuxBus_D2 DpCCode_PosFixP<=32D2 JumpF_Ufn-2; EUop_Shift Tag_Int Raddr_Tos RD2addr_Raddr-1 RD1addr_0 W2addr_Temp1 MuxBus_Arg DpCCode_FixPD1D2 MuxCCode_Arg#0 WriteT JumpF_Ufn-2; EUop_D1 Tag_D1 RD1addr_Temp1 Waddr_NewTos_Tos-MuxBus MuxBus_K_1 JumpT_Done; * LLSH.N; Label_Llsh.N OpLength_2 EUop_Shift Tag_Int Raddr_Tos RD2addr_0 Waddr_NewTos MuxBus_IBufN DpCCode_FixP WriteT JumpT_Done JumpF_Ufn-1d; * LRSH.N Note: the N field is the Inverted Shift amount; Label_Lrsh.N OpLength_2 EUop_Shift Tag_Int RD1addr_0 Raddr_Tos Dswap Waddr_NewTos MuxBus_IBufN DpCCode_FixPD2 WriteT JumpT_Done JumpF_Ufn-1d; * ------------------------------------------------------; * Floating Point Helpers ; * ------------------------------------------------------; * Double Shift Opcodes ; Label_DShift.N OpLength_2 EUop_D1 Tag_Int Raddr_Tos RD2addr_Raddr-1 W2addr_Temp1 NewTos_Tos-MuxBus MuxBus_K_1 DpCCode_FixPD1D2 WriteT JumpF_Ufn-2d; EUop_Shift Tag_Int Raddr_Tos RD2addr_Temp1 Waddr_NewTos MuxBus_IBufN JumpT_Done; Label_DShift OpLength_1 EUop_D1 Tag_Int Raddr_Tos RD2addr_Raddr-1 Dswap W2addr_Temp1 NewArg_MuxBus_D2 DpCCode_FixPD1D2 WriteT JumpF_Ufn-3; Raddr_Tos Dswap NewTos_Tos-MuxBus MuxBus_K_2 DpCCode_PosFixP<=32D2 WriteT JumpF_Ufn-3; EUop_Shift Tag_Int Raddr_Tos RD2addr_Temp1 Waddr_NewTos MuxBus_Arg DpCCode_FixPD1D2 WriteT JumpT_Done; NewTos_Tos+MuxBus MuxBus_K_2 JumpT_Ufn-3; * Priority Encode ; Label_Priority OpLength_1 EUop_Priority Tag_Int Raddr_Tos Waddr_NewTos DpCCode_FixP WriteT JumpF_Ufn-1 JumpT_Done; * ------------------------------------------------------; * Data Cell Memory Reference & Address Calculation; * ------------------------------------------------------; * GETBASEPTR.N - Tos _ Mem[Tos + N] ; Label_Getptr OpLength_2 MemOp_Map; MemOp_Map MemOffset_MuxBus_IBufN MemLatchSrc_MapAddr Raddr_Tos DpCCode_PointerP JumpF_Ufn-1d; Label_Getptr2 Aside MemOp_Ras MemOffset_K2_0 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr; MemOp_Cas MemOffset_K2_0 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr EUop_XData Waddr_NewTos JumpT_Done; * GETBASE.N - Tos _ Mem[Tos + N] & force it to a FixP ; Label_GetFix OpLength_2 MemOp_Map; MemOp_Map MemOffset_MuxBus_IBufN MemLatchSrc_MapAddr Raddr_Tos DpCCode_PointerP JumpF_Ufn-1d; MemOp_Ras MemOffset_K2_0 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr; MemOp_Cas MemOffset_K2_0 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr EUop_XData Waddr_NewTos; EUop_And Tag_Int Raddr_Tos RD2addr_PtrMask Waddr_NewTos JumpT_Done; * SYMBOLCELL.N - Tos _ Mem[Tos + N] ... (Tos must be a SymbolP) ; Label_SymbolCell OpLength_2 MemOp_Map; MemOp_Map MemOffset_MuxBus_IBufN MemLatchSrc_MapAddr Raddr_Tos DpCCode_SymbolP JumpF_Ufn-1d JumpT_Getptr2; * PUTBASEPTR.N - Mem[Tos-1 + N] _ Tos ... Tos_Tos-1 ; Label_Putptr OpLength_2 MemOp_Map; MemOp_Map MemOffset_MuxBus_IBufN MemLatchSrc_MapAddr Raddr_Tos RD2addr_Raddr-1 Dswap DpCCode_PointerP JumpF_Ufn-2d; MemOp_Ras MemOffset_K2_0 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr; MemOp_Cas MemOffset_K2_0 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr WriteData Raddr_Tos Dswap NewTos_Tos-MuxBus MuxBus_K_1 JumpT_Done; * RPLPTR.N - Mem[Tos-1 + N] _ Tos ... Tos_Tos-1 ; Label_Rplptr OpLength_2 MemOp_Map; MemOp_Map MemOffset_MuxBus_IBufN MemLatchSrc_MapAddr Dswap Raddr_Tos RD2addr_Raddr-1 DpCCode_PointerP MemCCode_RWAccess WriteT JumpF_Ufn-2d; MemOp_Ras MemOffset_K2_0 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr; MemOp_Cas MemOffset_K2_0 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr EUop_XData Waddr_K_DecRef WCxt AltCxt_Global; MemOp_Cas MemOffset_K2_0 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr WriteData EUop_D2 Tag_D2 Raddr_Tos Dswap Waddr_K_IncRef WCxt AltCxt_Global NewTos_Tos-MuxBus MuxBus_K_1 JumpT_RCcheck; * ADDBASE; Label_Addbase OpLength_1 EUop_+ Tag_D2 Raddr_Tos RD2addr_Raddr-1 Waddr_NewTos NewTos_Tos-MuxBus MuxBus_K_1 DpCCode_FixPD1PointerPD2 WriteT JumpF_Ufn-2; EUop_MergeSubtype Tag_LowD2Tag Raddr_Tos RD2addr_MuxBus_K_Ptr1TypeBits Waddr_NewTos JumpT_Done; * ------------------------------------------------------; * Tag Memory Reference ; * ------------------------------------------------------; * GETTAG.N - Tos _ MemTag[Tos + N] ; Label_GetTag OpLength_2 MemOp_Map; MemOp_Map MemOffset_MuxBus_IBufN MemLatchSrc_MapAddr Raddr_Tos DpCCode_PointerP JumpF_Ufn-1d; Aside MemOp_Ras MemOffset_K2_0 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr; MemOp_Cas MemOffset_K2_0 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr EUop_XTag Waddr_NewTos JumpT_Done; * PUTTAG.N - MemTag[Tos-1 + N] _ Tos ... Tos_Tos-1 ; Label_PutTag OpLength_2 MemOp_Map; MemOp_Map MemOffset_MuxBus_IBufN MemLatchSrc_MapAddr Raddr_Tos RD2addr_Raddr-1 Dswap DpCCode_PointerP JumpF_Ufn-2d; MemOp_Ras MemOffset_K2_0 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr; MemOp_Cas MemOffset_K2_0 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr WriteTags Raddr_Tos Dswap NewTos_Tos-MuxBus MuxBus_K_1 JumpT_Done; * ------------------------------------------------------; * Conditional Store Opcodes ; * ------------------------------------------------------; * ------------------------------------------------------; * CSTORE (Conditional Store Data Memory Cell) * Tos-2 = Ptr to memory * Tos-MuxBus MuxBus_K_1 = Data to Compare EQ * Tos = Data to store * Returns T or Nil to indicate success or failure * ------------------------------------------------------; * - Get Data to Store; Label_CStore Aside OpLength_1 MemOp_Map EUop_D1 Tag_D1 Raddr_Tos W2addr_Temp1 WCxt AltCxt_Global NewTos_Tos-MuxBus MuxBus_K_1; * Start Memory Operation; MemOp_Map MemOffset_K2_0 MemLatchSrc_MapAddr Raddr_Tos Dswap EUop_D2 Tag_D2 RD2addr_T Waddr_K_RTmp1 WCxt AltCxt_Global NewTos_Tos+1 DpCCode_PointerP MemCCode_RWAccess JumpF_CSError; MemOp_Ras MemOffset_K2_0 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr; * - Read the current data; MemOp_Cas MemOffset_K2_0 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr EUop_XData Waddr_NewTos; * - Test if Data is as Expected; * (Tos) = (Memory) ; * (Tos-1) = (Supposed contents of Memory) ; MemOp_Ras MemOffset_K2_0 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr Raddr_Tos RD2addr_Raddr-1 NewTos_Tos-MuxBus MuxBus_K_2 DpCCode_D1=D2 JumpF_SetNil; * - Write the new data, & place it at Tos; * RTmp1 = T ; * Temp1 = New Data (Tos) ; MemOp_Cas MemOffset_K2_0 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr WriteData EUop_D1 Tag_D1 Raddr_K_RTmp1 RD2addr_Temp1 RCxt AltCxt_Global Waddr_NewTos JumpT_Done; * ------------------------------------------------------; * CSTORETAG (Conditional Store Memory Tag) * Tos-2 = Ptr to memory * Tos-MuxBus MuxBus_K_1 = Tag to Compare EQ * Tos = Tag to store * Returns T or Nil to indicate success or failure * ------------------------------------------------------; * - Get Data to Store; Label_CStoreTag Aside OpLength_1 MemOp_Map EUop_D1 Tag_D1 Raddr_Tos W2addr_Temp1 WCxt AltCxt_Global NewTos_Tos-MuxBus MuxBus_K_1; * Start Memory Operation; MemOp_Map MemOffset_K2_0 MemLatchSrc_MapAddr Raddr_Tos Dswap EUop_D2 Tag_D2 RD2addr_T Waddr_K_RTmp1 WCxt AltCxt_Global NewTos_Tos+1 DpCCode_PointerP MemCCode_RWAccess JumpF_CSError; MemOp_Ras MemOffset_K2_0 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr; * - Read the current data; MemOp_Cas MemOffset_K2_0 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr EUop_XTag Waddr_NewTos; * - Test if Data is as Expected; * (Tos) = (Memory) ; * (Tos-1) = (Supposed contents of Memory) ; MemOp_Ras MemOffset_K2_0 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr Raddr_Tos RD2addr_Raddr-1 NewTos_Tos-MuxBus MuxBus_K_2 DpCCode_D1=D2 JumpF_SetNil; * - Write the new data, & place it at Tos; * RTmp1 = T ; * Temp1 = New Data (Tos) ; MemOp_Cas MemOffset_K2_0 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr WriteTags EUop_D1 Tag_D1 Raddr_K_RTmp1 RD2addr_Temp1 RCxt AltCxt_Global Waddr_NewTos JumpT_Done; * ------------------------------------------------------; * - Conditional Store Error * ------------------------------------------------------; * - Determine cause of error & branch appropriatly ; * - While adjusting TOS; Label_CSError Raddr_Tos DpCCode_PointerP JumpF_UfnA-3 JumpT_PageFault; * ------------------------------------------------------; * Reference Counting ; * DecRef : Points to item to decrement * IncRef : Points to item to increment * ------------------------------------------------------; Label_RCcheck MemOp_Map MemOffset_K2_0 MemLatchSrc_MapAddr PhysAddrSrc_PhysAddr Raddr_K_IncRef RCxt AltCxt_Global DpCCode_RefCountPtr MemCCode_RWAccess JumpF_ClrInc; MemOp_Ras MemOffset_K2_0 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr EUop_D2 Tag_D2 RD2addr_Nil Waddr_K_IncRef2 WCxt AltCxt_Global; Label_RC2 MemOp_Cas MemOffset_K2_0 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr EUop_XTag Tag_Int W2addr_Temp1; MemOp_Ras MemOffset_K2_0 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr EUop_+ Tag_Int RD1addr_MuxBus_K_1 RD2addr_Temp1 DpCCode_D2<4>=15 W2addr_Temp1 JumpT_SkipInc; MemOp_Cas MemOffset_K2_0 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr WriteTags RD2addr_Temp1 MuxBus_D2 EUop_D1 Tag_D1 RD1addr_0 Waddr_K_IncRef WCxt AltCxt_Global JumpT_SkipInc; Label_ClrInc MemOp_Ras MemOffset_K2_0 MemLatchSrc_MapAddr PhysAddrSrc_PhysAddr EUop_D1 Tag_D1 RD1addr_0 Waddr_K_IncRef WCxt AltCxt_Global; Label_SkipInc MemOp_Map MemOffset_K2_0 MemLatchSrc_MapAddr Raddr_K_IncRef2 RCxt AltCxt_Global DpCCode_RefCountPtr MemCCode_RWAccess JumpF_ClrInc2; MemOp_Ras MemOffset_K2_0 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr; MemOp_Cas MemOffset_K2_0 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr EUop_XTag Tag_Int W2addr_Temp1; MemOp_Ras MemOffset_K2_0 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr EUop_+ Tag_Int RD1addr_MuxBus_K_1 RD2addr_Temp1 DpCCode_D2<4>=15 W2addr_Temp1 JumpT_SkipInc2; MemOp_Cas MemOffset_K2_0 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr WriteTags RD2addr_Temp1 MuxBus_D2 EUop_D1 Tag_D1 RD1addr_0 Waddr_K_IncRef2 WCxt AltCxt_Global JumpT_SkipInc2; Label_ClrInc2 MemOp_Ras MemOffset_K2_0 MemLatchSrc_MapAddr PhysAddrSrc_PhysAddr EUop_D1 Tag_D1 RD1addr_0 Waddr_K_IncRef2 WCxt AltCxt_Global; Label_SkipInc2 MemOp_Map MemOffset_K2_0 MemLatchSrc_MapAddr Raddr_K_DecRef RCxt AltCxt_Global DpCCode_RefCountPtr MemCCode_RWAccess JumpF_ClrDec; MemOp_Ras MemOffset_K2_0 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr; MemOp_Cas MemOffset_K2_0 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr EUop_XTag Tag_Int W2addr_Temp1; MemOp_Ras MemOffset_K2_0 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr EUop_- Tag_Int RD1addr_MuxBus_K_1 RD2addr_Temp1 DpCCode_D2<4>=0or1 W2addr_Temp1 JumpT_SkipDec; MemOp_Cas MemOffset_K2_0 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr WriteTags RD2addr_Temp1 MuxBus_D2 EUop_D1 Tag_D1 RD1addr_0 Waddr_K_DecRef WCxt AltCxt_Global JumpT_SkipDec; Label_ClrDec MemOp_Ras MemOffset_K2_0 MemLatchSrc_MapAddr PhysAddrSrc_PhysAddr EUop_D1 Tag_D1 RD1addr_0 Waddr_K_DecRef WCxt AltCxt_Global; Label_SkipDec Raddr_K_IncRef RD2addr_Raddr-1 RCxt AltCxt_Global DpCCode_RefCountPtrD1orD2 JumpT_SetRC; Aside Raddr_K_IncRef2 RCxt AltCxt_Global DpCCode_RefCountPtr JumpF_Done; Label_SetRC Bside MuxBus_K_RefCountMask SetFlags JumpT_Dead; * ------------------------------------------------------; * Reference Counting ; * IncRef : Points to item to increment * IncRef2 : Points to item to increment * ------------------------------------------------------; Label_RCcheck2 MemOp_Map MemOffset_K2_0 MemLatchSrc_MapAddr PhysAddrSrc_PhysAddr Raddr_K_IncRef RCxt AltCxt_Global DpCCode_RefCountPtr MemCCode_RWAccess JumpF_ClrInc; MemOp_Ras MemOffset_K2_0 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr EUop_D2 Tag_D2 RD2addr_Nil Waddr_K_DecRef WCxt AltCxt_Global JumpT_RC2; * ------------------------------------------------------; * Reference Count Opcodes ; * ------------------------------------------------------; Label_IncRef OpLength_1 Aside EUop_D1 Tag_D1 Raddr_Tos Waddr_K_IncRef WCxt AltCxt_Global NewArg_1; MemOp_Map EUop_D2 Tag_D2 RD2addr_0 Waddr_K_DecRef WCxt AltCxt_Global NewTos_Tos-MuxBus MuxBus_Arg JumpT_RCcheck; Label_DecRef OpLength_1 Aside EUop_D1 Tag_D1 Raddr_Tos Waddr_K_DecRef WCxt AltCxt_Global NewArg_1; MemOp_Map EUop_D2 Tag_D2 RD2addr_0 Waddr_K_IncRef WCxt AltCxt_Global NewTos_Tos-MuxBus MuxBus_Arg JumpT_RCcheck; * ------------------------------------------------------; * List Operations ; * ------------------------------------------------------; * CAR; Label_Car OpLength_1 MemOp_Map; MemOp_Map MemOffset_K2_CarDispl MemLatchSrc_MapAddr Raddr_Tos DpCCode_ConsP MemCCode_NoPageFault JumpF_CxrNil; Label_CadrCont Aside MemOp_Ras MemOffset_K2_0 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr; MemOp_Cas MemOffset_K2_0 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr EUop_XData Waddr_NewTos JumpT_Done; * CDR; Label_Cdr OpLength_1 MemOp_Map; MemOp_Map MemOffset_K2_CdrDispl MemLatchSrc_MapAddr Raddr_Tos DpCCode_ConsP MemCCode_NoPageFault JumpF_CxrNil JumpT_CadrCont; Label_CxrNil Bside Raddr_Tos RD2addr_Nil DpCCode_D1=D2 JumpF_Ufn-1 JumpT_Done; * SETF-CAR; Label_Setf-Car OpLength_1 MemOp_Map; MemOp_Map MemOffset_K2_CarDispl MemLatchSrc_MapAddr Raddr_Tos Dswap DpCCode_ConsP MemCCode_RWAccess JumpF_CxrNil; Label_SetfCont Aside MemOp_Ras MemOffset_K2_0 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr; MemOp_Cas MemOffset_K2_0 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr EUop_XData Waddr_K_DecRef WCxt AltCxt_Global NewArg_1; MemOp_Cas MemOffset_K2_0 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr WriteData EUop_D2 Tag_D2 Raddr_Tos Dswap Waddr_K_IncRef WCxt AltCxt_Global NewTos_Tos-MuxBus MuxBus_Arg JumpT_RCcheck; * SETF-CDR; Label_Setf-Cdr OpLength_1 MemOp_Map; MemOp_Map MemOffset_K2_CdrDispl MemLatchSrc_MapAddr Raddr_Tos Dswap DpCCode_ConsP MemCCode_RWAccess JumpF_CxrNil JumpT_SetfCont; * ------------------------------------------------------; * CONS * - (CONS Tos-1 Tos) * ------------------------------------------------------; Label_Cons OpLength_1 MemOp_Map ; MemOp_Map MemOffset_K2_CarDispl MemLatchSrc_MapAddr PhysAddrSrc_PhysAddr Raddr_K_ConsPtr RCxt AltCxt_Global RD2addr_Nil NewArg_MuxBus_Tos DpCCode_D1=D2 JumpT_Ufn-2; MemOp_Ras MemOffset_K2_0 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr NewArg_Arg-MuxBus MuxBus_K_1; * - Write The CAR Cell with the Value at Tos-1, Set the IncRef Value; MemOp_Cas MemOffset_K2_0 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr WriteData EUop_D2 Tag_D2 Raddr_Tos RD2addr_Raddr-1 Waddr_K_IncRef WCxt AltCxt_Global; * - Clear the Reference Count to 0, Set Tos-1 to the Cons Cell; MemOp_Cas MemOffset_K2_1 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr WriteTags RD2addr_0 EUop_D1 Tag_D1 Raddr_K_ConsPtr RCxt AltCxt_Global Waddr_NewArg; * -Read the CDR of the New Cell to set the new Cons Ptr; MemOp_Cas MemOffset_K2_0 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr EUop_XData Waddr_K_ConsPtr WCxt AltCxt_Global; * - Write The CDR Cell with the Value at Tos, Set the Next IncRef value; * - Set New Tos; MemOp_Cas MemOffset_K2_0 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr WriteData EUop_D2 Tag_D2 Raddr_Tos Dswap RD2addr_Raddr-1 Waddr_K_IncRef2 WCxt AltCxt_Global NewTos_MuxBus_Arg JumpT_RCcheck2; * ------------------------------------------------------; * RPLCONS * - (CDR Tos-1) _ (CONS Tos NIL) * ------------------------------------------------------; Label_RplCons OpLength_1 MemOp_Map ; * - Startup the Read of the Next Cons cell in the Free list; MemOp_Map MemOffset_K2_CarDispl MemLatchSrc_MapAddr PhysAddrSrc_PhysAddr Raddr_K_ConsPtr RCxt AltCxt_Global RD2addr_Nil EUop_D1 Tag_D1 W2addr_Temp1 NewArg_MuxBus_Tos DpCCode_D1=D2 JumpT_Ufn-2; MemOp_Ras MemOffset_K2_0 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr NewArg_Arg-MuxBus MuxBus_K_1 Raddr_Tos Dswap DpCCode_ConsP JumpF_Ufn-2; * - Write The CAR Cell with the Value at Tos, Set the IncRef Value; MemOp_Cas MemOffset_K2_0 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr WriteData EUop_D2 Tag_D2 Raddr_Tos Dswap RD2addr_Raddr-1 Waddr_K_IncRef WCxt AltCxt_Global; * - Set the Reference Count to 1; * - NOTE: this implies the CarDispl is 0! ; MemOp_Cas MemOffset_K2_1 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr WriteTags RD2addr_MuxBus_K_1; * - Read the CDR of the New Cell to set the new Cons Ptr; MemOp_Cas MemOffset_K2_0 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr EUop_XData Waddr_K_ConsPtr WCxt AltCxt_Global; * - Write The CDR Cell with Nil; MemOp_Cas MemOffset_K2_0 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr WriteData RD2addr_Nil; * - Replace the CDR of the Tos-1 Cons Cell with the Newly created cell; MemOp_Map MemOffset_K2_CdrDispl MemLatchSrc_MapAddr PhysAddrSrc_PhysAddr Raddr_Tos Dswap RD2addr_Raddr-1; MemOp_Ras MemOffset_K2_0 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr; MemOp_Cas MemOffset_K2_0 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr EUop_XData Waddr_K_DecRef WCxt AltCxt_Global; MemOp_Cas MemOffset_K2_0 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr WriteData EUop_D2 Tag_D2 RD2addr_Temp1 Waddr_NewTos_Tos-MuxBus MuxBus_K_1 JumpT_RCcheck; * ------------------------------------------------------; * Normal Function Call; * ------------------------------------------------------; * - Read the definition cell, set # args, IVars to Nil, set code slot; Label_FnCall OpLength_5 MemOp_Map MuxCCode_FramesFull JumpT_DumpFrame; MemOp_Map MemOffset_K2_DefCellOffset MemLatchSrc_MapAddr RD1addr_IBufData4 EUop_D2 Tag_D2 RD2addr_MuxBus Waddr_K_HdrSlot WCxt AltCxt_Top+1 NewArg_MuxBus_Opcode OpMask_b0111 MuxCCode_FramesFull WriteF JumpT_DumpFrame; MemOp_Ras MemOffset_K2_0 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr EUop_D2 Tag_D2 RD2addr_Nil Waddr_K_IVar WCxt AltCxt_Top+1 WriteOctal; MemOp_Cas MemOffset_K2_0 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr EUop_XData W2addr_Temp1 NewArg2_MuxBus_Tos JumpT_Fn1; * ------------------------------------------------------; * Tail Function Call; * ------------------------------------------------------; * - Read the definition cell, set # args, IVars to Nil, set code slot; Label_TailFnCall OpLength_5 MemOp_Map MuxCCode_FramesFull JumpT_DumpFrame; MemOp_Map MemOffset_K2_DefCellOffset MemLatchSrc_MapAddr RD1addr_IBufData4 EUop_D2 Tag_D2 RD2addr_Nil Waddr_K_IVar WCxt AltCxt_Top+1 WriteOctal NewArg_MuxBus_Opcode OpMask_b0111 MuxCCode_FramesFull WriteF JumpT_DumpFrame; MemOp_Ras MemOffset_K2_0 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr EUop_D2 Tag_D2 RD2addr_MuxBus_Opcode OpMask_b1111 Waddr_K_HdrSlot WCxt AltCxt_Top+1 Raddr_K DpCCode_MultipleValuesBit JumpT_MvFn2; MemOp_Cas MemOffset_K2_0 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr EUop_XData W2addr_Temp1 NewArg2_MuxBus_Tos JumpT_Fn1; * ------------------------------------------------------; * Multiple Value Function Call; * ------------------------------------------------------; * - Read the definition cell, set # args, IVars to Nil, set code slot; Label_MvFnCall OpLength_5 MemOp_Map MuxCCode_FramesFull JumpT_DumpFrame; MemOp_Map MemOffset_K2_DefCellOffset MemLatchSrc_MapAddr RD1addr_IBufData4 EUop_D2 Tag_D2 RD2addr_Nil Waddr_K_IVar WCxt AltCxt_Top+1 WriteOctal MuxCCode_FramesFull WriteF JumpT_DumpFrame; MemOp_Ras MemOffset_K2_0 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr EUop_D2 Tag_D2 RD2addr_MuxBus Waddr_K_HdrSlot WCxt AltCxt_Top+1 NewArg_MuxBus_Opcode OpMask_b0111; * - Set MV flag, Sorry bout the extra 2 Cycles * - Mabey it can be fixed later; Label_MvFn2 Aside MemOp_Ras MemOffset_K2_0 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr NewArg2_MuxBus_K_MultipleValueMask; MemOp_Ras MemOffset_K2_0 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr EUop_Or Tag_D1 Raddr_K RCxt RD2addr_MuxBus_Arg2 Waddr_K_HdrSlot WCxt AltCxt_Top+1; MemOp_Cas MemOffset_K2_0 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr EUop_XData W2addr_Temp1 NewArg2_MuxBus_Tos JumpT_Fn1; * ------------------------------------------------------; * Function Call Continuation * ------------------------------------------------------; * - Invariants at this Point: * - Temp1 = Definition Cell of the Funciton; * - 1st 8 Var Slots are NIL; * - Arg = Number of parameters; * - Arg2 = Tos; * - Top+1 HdrSlot = Number of paramters (+ any set flags); * - A page fault from here on will cause the Undefn Ufn, and that will have to * - perform the function call; * ------------------------------------------------------; * - Map, Set PhysAddr to D1 + Arg, Save Pc, Tos_Tos - #Args Test for CCodeP; Label_Fn1 Bside MemOp_Map MemOffset_MuxBus_Arg RD1addr_Temp1 MemLatchSrc_MapAddr EUop_D1 Tag_D1 Waddr_K_CodeSlot WCxt AltCxt_Top+1 NewTos_Tos-MuxBus DpCCode_CCodeP WriteT JumpF_FnFault2; * - Ras, Bump PhysAddr to start of Pc Vector Table, Tos; MemOp_Ras MemOffset_K2_4 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr EUop_MergeSubtype Tag_Int Raddr_K RD2addr_MuxBus_Tos Waddr_K_HdrSlot; * - Cas, Read 1st Pc, Save Return Pc, Tos _ 16; MemOp_Cas MemOffset_K2_0 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr EUop_XData W2addr_Temp1 NewTos_MuxBus_K_16; EUop_D2 Tag_Int RD2addr_NextPc Waddr_K_PcSlot; * - Set Pc, FetchPc, Binding Stack, Tos, New Cxt; OpLength_0 MemOp_Map MemOffset_K2_0 MemLatchSrc_MapAddr ByteAddr LatchFetchPc RD1addr_Temp1 PcSrc_D1 EUop_D2 Tag_D2 Raddr_K_BsSlot Dswap Waddr_K WCxt AltCxt_Top+1 NewTopCxt MuxCCode_Arg=0 JumpT_NotOpValid; * - Copy the paramaters (# parms in Arg)....not decrementing TOS!!!; MemOffset_K2_0 EUop_D1 Tag_D1 Raddr_Arg2 RCxt Waddr_NewArg AltCxt_Top-1 NewArg2_Arg2-MuxBus MuxBus_K_1 NewArg_Arg-MuxBus MuxCCode_Arg#Mux JumpT_Rpt JumpF_Done; * ------------------------------------------------------; * Error Processing and Other Fn call types; * ------------------------------------------------------; Label_FnFault1 JumpT_Stop; * ------------------------------------------------------; * - Definition is not CCodeP, * - Test for a MethodP or a ClosureP * ------------------------------------------------------; Label_FnFault2 Aside RD1addr_Temp1 DpCCode_MethodP WriteT JumpT_MethodCall; RD1addr_Temp1 DpCCode_ClosureP WriteT JumpT_ClosureCall; * ------------------------------------------------------; * - Illegal Definition, We Must Ufn * - Determine the Opcode Type (Apply or Fnk) * - Push the Number of ARgs and the * - Origional Symbol / Definition & Ufn * ------------------------------------------------------; * - If Opcode is > 127 then an Apply; * - Set Tos back to the # args & Ufn RD2addr_Opcode NewTos_Tos+MuxBus MuxBus_K_2 DpCCode_D2>127 WriteF JumpF_Ufn-2; * - An FnK Opcode, Push # Args & Symbol; EUop_Or Tag_D2 RD1addr_IBufData4 RD2addr_Symbol Waddr_NewTos NewTos_Tos+1; EUop_D1 Tag_Int RD1addr_MuxBus_Opcode OpMask_b0111 Waddr_NewTos NewTos_Tos+1 JumpT_Ufn-2; * ------------------------------------------------------; * Closure Calls; * ------------------------------------------------------; * - Normal Closure, put environment in PVar slot; Label_ClosureCall MemOp_Map MemOffset_K2_ClosureEnvOffset MemLatchSrc_MapAddr RD1addr_Temp1; MemOp_Ras MemOffset_K2_0 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr; MemOp_Cas MemOffset_K2_1 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr EUop_XData Waddr_K_ClosureEnvSlot WCxt AltCxt_Top+1; * - Get the code pointer; MemOp_Cas MemOffset_K2_0 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr EUop_XData W2addr_Temp1 JumpT_Fn1; { *** * - Tail Closure, put environment in PVar slot; Label_TailClosureCall MemOp_Read MemOffset_K2_ClosureEnvOffset RD1addr_Temp1 Waddr_K_ClosureEnvSlot MemCCode_NoPageFault WriteT JumpF_TFn5; * - Get the code pointer; MemOp_Read MemOffset_K2_ClosureCodeOffset RD1addr_Temp1 W2addr_Temp1 JumpT_TailCall; } * ------------------------------------------------------; * Tail Function Calls that re-use current frame; * ------------------------------------------------------; Label_ExchFnCall OpLength_5 JumpT_Stop; { *** Label_TailCall Aside * - Set IVars to Nil, setup Arg & Arg2; EUop_D2 Tag_D2 RD2addr_Nil RD2addr_TosWord Waddr_K_IVar WriteOctal NewArg_MuxBus_Opcode OpMask_b1111 NewArg2_Arg2+1 DpCCode_MVokD2 JumpF_TailFn1; * - Set Multiple Value Flag into Arg; EUop_Or Tag_Int RD1addr_MuxBus_Arg RD2addr_MVArgBit Waddr_K_RTmp1; Raddr_K_RTmp1 Dswap NewArg_MuxBus_D2; * - Set the Pc of the new frame's Pc + # Args; Label_TailFn1 OpLength_0 MemOp_Read MemOffset_MuxBus_Arg2 RD1addr_Temp1 W2addr_Pc DpCCode_CCodeP MemCCode_NoPageFault WriteT JumpF_Tc5; * - Read SP & flag word of function definition header; * **** need to set arg to # args! MemOp_Read MemOffset_K2_FnHeaderOffset RD1addr_Temp1 NewArg2_MuxBus_Tos NewArg_Arg W2addr_TosWordArg; * - Set the Code Pointer; EUop_D1 Tag_D1 RD1addr_Temp1 Waddr_K_CodeSlot NewArg_Arg-1 MuxCCode_Arg=0 JumpT_Done; * - Copy the paramaters (# parms in Arg)....not decrementing TOS!!!; EUop_D1 Tag_D1 Raddr_Arg2 Waddr_NewArg NewArg2_Arg2Sub1 NewArg_Arg-1 MuxCCode_Arg#0 JumpT_Rpt JumpF_Done; * ------------------------------------------------------; * Other Tail Fn call types; * ------------------------------------------------------; * - See if a method call or a closure call * - Undefined function, lets Ufn to UnDefFn function; * - Read the stack header for UnDefFn; * - Set the Name of the Undefn function as the 1st PVar; * - Go copy the other parms & call the function; * * * NOTE this will cause infinite loop if UnDefFn is not a CCodeP......; Label_Tc5 Aside RD1addr_Temp1 DpCCode_MethodP WriteT JumpT_MethodCall; RD1addr_Temp1 DpCCode_ClosureP WriteT JumpT_TailClosureCall; * * * NOTE this will cause infinite loop if UnDefFn is not a CCodeP......; EUop_D1 Tag_D1 Raddr_K_UnDefFn RCxt AltCxt_Global W2addr_Temp1; MemOp_Read RD1addr_Temp1 WCxt AltCxt_Top+1 Waddr_K_CodeSlot; EUop_MergeSubtype Tag_LowD2Tag RD1addr_IBufData4 RD2addr_MuxBus_K2_SymbTypeBits Waddr_K_UnDefnSlot WCxt AltCxt_Top+1 JumpT_TailFn1; } * ------------------------------------------------------; * Method calls; * ------------------------------------------------------; * * - Entry: * Temp1 = Addr of MethodP * Tos = Still valid Tos * Arg = # Args & Flags * Arg2 = # Args * * - Registers used: * RTmp1 = saved Arg2; * RTmp2 = ptr into method table; * RTmp3 = wrapper to compare; * * - Get index of 1st parm; Label_MethodCall EUop_D1 Tag_Int RD1addr_MuxBus_Arg2 Waddr_K_RTmp1 WCxt AltCxt_Global NewTos_Tos-MuxBus; { **** Label_McLoop EUop_+ Tag_D1 RD1addr_Temp1 RD2addr_MuxBus_K2_MethodTableDisp Waddr_K_RTmp2 WCxt AltCxt_Global NewArg2_Arg2Plus1 MuxCCode_Arg2EQTos JumpT_McUfn; * - Find the Wrapper for the object, index type table EUop_TypeBits Tag_Int Raddr_Arg2 MuxWrite_RBus NewArg_MuxWrite; MemOp_Read MemOffset_+ Raddr_WrapperTable RCxt MuxBus_Arg Waddr_RTmp3 WCxt AltCxt_Global ResultCCode_0 MemCCode_NoPageFault JumpF_Mc5; MemOp_Read MemOffset_+ Raddr_Arg2 MuxBus_K_WrapperOffset Waddr_RTmp3 WCxt AltCxt_Global MemCCode_NoPageFault JumpF_Mc5; * - Mask Wrapper to get table offset; Label_Mc5 EUop_And Tag_Int Raddr_RTmp3 RCxt AltCxt_Global RD2addr_MuxBus_K_30 NewArg_MuxBus_RBus; MemOp_Read MemOffset_+ Raddr_RTmp2 RCxt AltCxt_Global MuxBus_Arg W2addr_Temp1; * - Check for a Match; Raddr_RTmp3 RCxt AltCxt_Global RD2addr_Temp1 NewArg_NewArg NewArg_Arg+4 DpCCode_D1=D2 JumpT_McMatch; * - Look into Overflow Table, get displacement to overflow table; NewArg_MuxBus_K K_MethodWordHashLength; * - Compare entry; Label_McLp Bside MemOp_Read MemOffset_+ Raddr_RTmp2 RCxt AltCxt_Global MuxBus_Arg W2addr_Temp1 NewArg_Arg+4 ResultCCode_0 JumpT_McUfn; * - Check for a Match; Raddr_RTmp3 RCxt AltCxt_Global RD2addr_Temp1 DpCCode_D1=D2 JumpT_McMatch JumpF_McLp; * - Wrapper match found; * RTmp1 = saved Arg2; * RTmp2 + Arg = points just past the found entry; * RTmp3 = the wrapper compared; Label_McMatch Aside NewArg_NewArg NewArg_Arg-1; * - Get the found method entry, store in code slot; MemOp_Read MemOffset_+ Raddr_RTmp2 RCxt AltCxt_Global MuxBus_Arg W2addr_Temp1 NewArg_Arg-1; Waddr_CodeSlot WCxt AltCxt_Top+1; * - See if it was a code slot or another class to match; RD1addr_Temp1 NewArg_Arg-1; DpCCode_MethodP JumpT_McLoop; * - Read PV, Restore Arg2, Determine Call Type; Raddr_RTmp2 RD2addr_Raddr-1 RCxt AltCxt_Global W2addr_Temp1 NewArg2_MuxBus_D2 MuxCCode_Opcodeb3 JumpT_TailM; * - Normal call, set the Permutation Vector; MemOp_Read MemOffset_+ RD1addr_Temp1 MuxBus_Arg NewArg_MuxBus_Opcode OpMask_b1111 Waddr_PVSlot WCxt AltCxt_Top+1 JumpT_Fn1; * - Tail call, set Permutation Vector in current frame; Label_TailM MemOp_Read MemOffset_+ RD1addr_Temp1 MuxBus_Arg NewArg_MuxBus_Opcode OpMask_b1111 Waddr_PVSlot JumpT_TailFn1; ***** } * ------------------------------------------------------; * APPLY Fn calls; * ------------------------------------------------------; * APPLY oocodes: * Normal APPLY * Tail APPLY * MV APPLY * * Arg is set to: * Bit: 4 3 210 * MV Tail #Args * * Parameters: * Tos Number of Args * Tos-1 Function Symbol, CCodeP, MethodP, or ClosureP * Tos-2 Parameters *; Label_Apply OpLength_1 MemOp_Map MuxCCode_FramesFull JumpT_DumpFrame; * - Startupt The Memory Operation Assuming Tos-1 is a SymbolP; * - Move # parameters to the Header Slot; * - Set Arg to the # of parameters; * - Check Frames Available; MemOp_Map MemOffset_K2_DefCellOffset MemLatchSrc_MapAddr PhysAddrSrc_PhysAddr EUop_D2 Tag_D2 Raddr_Tos RD2addr_Raddr-1 Dswap Waddr_K_HdrSlot WCxt AltCxt_Top+1 NewArg_MuxBus_D2 MuxCCode_FramesFull WriteF JumpT_DumpFrame; * - Do the Ras; * - Move Tos-1 to Temp1; * - Tos _ Tos - 2; * - TypeCheck Tos-1 & Tos; MemOp_Ras MemOffset_K2_0 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr EUop_D1 Tag_D1 Raddr_Tos Dswap RD2addr_Raddr-1 W2addr_Temp1 NewTos_Tos-MuxBus MuxBus_K_2 DpCCode_SymbolPCCodePClosurePorMethodPD1&D2<8 WriteT JumpF_Ufn-2; * - Keep in Ras; * - Set IVars to Nil; * - Go do Function Call if not a SymbolP; MemOp_Ras MemOffset_K2_0 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr EUop_D2 Tag_D2 RD1addr_Temp1 RD2addr_Nil Waddr_K_0 WCxt AltCxt_Top+1 NewArg2_MuxBus_Tos DpCCode_SymbolP JumpF_Fn1; * - Complete the Read; * - Set Temp1 to the Definition Slot of the SymbolP; * - Go do the Function Call; MemOp_Cas MemOffset_K2_0 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr EUop_XData W2addr_Temp1 JumpT_Fn1; Label_TailApply OpLength_1 MemOp_Map MuxCCode_FramesFull JumpT_DumpFrame; * - Startupt The Memory Operation Assuming Tos-1 is a SymbolP; * - Move # parameters to the Header Slot; * - Set Arg to the # of parameters; * - Check Frames Available; MemOp_Map MemOffset_K2_DefCellOffset MemLatchSrc_MapAddr PhysAddrSrc_PhysAddr EUop_D2 Tag_D2 Raddr_Tos RD2addr_Raddr-1 Dswap Waddr_K_HdrSlot WCxt AltCxt_Top+1 NewArg_MuxBus_D2 MuxCCode_FramesFull WriteF JumpT_DumpFrame; * - Do the Ras; * - Move Tos-1 to Temp1; * - Tos _ Tos - 2; * - TypeCheck Tos-1 & Tos; MemOp_Ras MemOffset_K2_0 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr EUop_D1 Tag_D1 Raddr_Tos Dswap RD2addr_Raddr-1 W2addr_Temp1 NewTos_Tos-MuxBus MuxBus_K_2 DpCCode_SymbolPCCodePClosurePorMethodPD1&D2<8 WriteT JumpF_Ufn-2; * - Test For A Multiple Value Result Expected; MemOp_Ras MemOffset_K2_0 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr EUop_D1 Tag_D1 Raddr_K_HdrSlot DpCCode_MultipleValuesBit JumpT_MvAp2; * - Keep in Ras; * - Set IVars to Nil; * - Go do Function Call if not a SymbolP; MemOp_Ras MemOffset_K2_0 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr EUop_D2 Tag_D2 RD1addr_Temp1 RD2addr_Nil Waddr_K_0 WCxt AltCxt_Top+1 NewArg2_MuxBus_Tos DpCCode_SymbolP JumpF_Fn1; * - Complete the Read; * - Set Temp1 to the Definition Slot of the SymbolP; * - Go do the Function Call; MemOp_Cas MemOffset_K2_0 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr EUop_XData W2addr_Temp1 JumpT_Fn1; Label_MvApply OpLength_1 MemOp_Map MuxCCode_FramesFull JumpT_DumpFrame; * - Startupt The Memory Operation Assuming Tos-1 is a SymbolP; * - Move # parameters to the Header Slot; * - Set Arg to the # of parameters; * - Check Frames Available; MemOp_Map MemOffset_K2_DefCellOffset MemLatchSrc_MapAddr PhysAddrSrc_PhysAddr EUop_D2 Tag_D2 Raddr_Tos RD2addr_Raddr-1 Dswap Waddr_K_HdrSlot WCxt AltCxt_Top+1 NewArg_MuxBus_D2 MuxCCode_FramesFull WriteF JumpT_DumpFrame; * - Do the Ras; * - Move Tos-1 to Temp1; * - Tos _ Tos - 2; * - TypeCheck Tos-1 & Tos; MemOp_Ras MemOffset_K2_0 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr EUop_D1 Tag_D1 Raddr_Tos Dswap RD2addr_Raddr-1 W2addr_Temp1 NewTos_Tos-MuxBus MuxBus_K_2 DpCCode_SymbolPCCodePClosurePorMethodPD1&D2<8 WriteT JumpF_Ufn-2; Label_MvAp2 Aside MemOp_Ras MemOffset_K2_0 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr NewArg2_MuxBus_K_MultipleValueMask; MemOp_Ras MemOffset_K2_0 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr EUop_Or Tag_D1 Raddr_K_HdrSlot RCxt RD2addr_MuxBus_Arg2 Waddr_K WCxt AltCxt_Top+1; * - Keep in Ras; * - Set IVars to Nil; * - Go do Function Call if not a SymbolP; MemOp_Ras MemOffset_K2_0 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr EUop_D2 Tag_D2 RD1addr_Temp1 RD2addr_Nil Waddr_K_0 WCxt AltCxt_Top+1 NewArg2_MuxBus_Tos DpCCode_SymbolP JumpF_Fn1; * - Complete the Read; * - Set Temp1 to the Definition Slot of the SymbolP; * - Go do the Function Call; MemOp_Cas MemOffset_K2_0 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr EUop_XData W2addr_Temp1 JumpT_Fn1; Label_ExchApply OpLength_1 JumpT_Stop; * ------------------------------------------------------; * Fn returns; * ------------------------------------------------------; * RET; * - Get the result (Dead cycle insures no delay when reading Pc); Label_Ret OpLength_1 MemOp_Map MuxCCode_FramesEmpty JumpT_LoadFrame; MemOp_Map MemOffset_K2_0 MemLatchSrc_MapAddr PhysAddrSrc_PhysAddr ByteAddr LatchFetchPc EUop_D1 Tag_D1 Raddr_K_PcSlot RCxt AltCxt_Top-1 W2addr_Temp1 NewArg_MuxBus_Tos MuxCCode_FramesEmpty WriteF JumpT_LoadFrame; * - Restore Pc; OpLength_0 RD1addr_Temp1 PcSrc_D1 EUop_D2 Tag_D2 Raddr_K_HdrSlot Dswap RD2addr_Raddr-1 W2addr_Temp1 DpCCode_NotSlowReturnPD2 JumpF_Ufn-1; * - Get Tos ; EUop_TypeBits Tag_Int Raddr_K_HdrSlot RCxt AltCxt_Top-1 W2addr_Temp1 NewTopCxt RD2addr_Temp1 DpCCode_TailCallPD2 JumpT_RetThrough; * - Push the result, restore Tos; EUop_D1 Tag_D1 Raddr_Arg RCxt AltCxt_Top+1 Waddr_NewTos RD2addr_Temp1 MuxBus_D2 NewTos_MuxBus+1 JumpT_Done; * - Return to a Tail Call, go & continue another return w/out fetching the opcode; Label_RetThrough EUop_D1 Tag_D1 Raddr_Arg RCxt AltCxt_Top+1 Waddr_NewTos RD2addr_Temp1 MuxBus_D2 NewTos_MuxBus+1 JumpT_Ret; * RETNP; Label_RetNP OpLength_1 MemOp_Map MuxCCode_FramesEmpty JumpT_LoadFrame; MemOp_Map MemOffset_K2_0 MemLatchSrc_MapAddr PhysAddrSrc_PhysAddr ByteAddr LatchFetchPc EUop_D1 Tag_D1 Raddr_K_PcSlot RCxt AltCxt_Top-1 W2addr_Temp1 MuxCCode_FramesEmpty WriteF JumpT_LoadFrame; * - Restore Pc; OpLength_0 RD1addr_Temp1 PcSrc_D1 Raddr_K_HdrSlot RCxt AltCxt_Top-1 Dswap RD2addr_Raddr-1 DpCCode_NotSlowReturnPD2 JumpF_Ufn-1; * - Get Tos; EUop_TypeBits Tag_Int Raddr_K_HdrSlot RCxt AltCxt_Top-1 W2addr_Temp1 NewTopCxt; * - Restore Tos; Raddr_K_0 RD1addr_0 RD2addr_Temp1 MuxBus_D2 NewTos_MuxBus JumpT_Done; * RETEI; * - Set returnee's SP, enable interrupts; * - Set returnee's Pc, set new context; Label_RetEI OpLength_1 MemOp_Map MuxCCode_FramesEmpty JumpT_LoadFrame; MemOp_Map MemOffset_K2_0 MemLatchSrc_MapAddr PhysAddrSrc_PhysAddr ByteAddr LatchFetchPc EUop_D1 Tag_D1 Raddr_K_PcSlot RCxt AltCxt_Top-1 W2addr_Temp1 MuxCCode_FramesEmpty WriteF JumpT_LoadFrame; * - Restore Pc, re-enable interrupts; OpLength_0 RD1addr_Temp1 PcSrc_D1 MuxBus_K_IrqEnableMask SetFlags; * - Get Tos; EUop_TypeBits Tag_Int Raddr_K_HdrSlot RCxt AltCxt_Top-1 W2addr_Temp1 NewTopCxt; * - Restore Tos; RD2addr_Temp1 MuxBus_D2 NewTos_MuxBus JumpT_Done; * ------------------------------------------------------; * UFN handling; * ------------------------------------------------------; * UFNs; Label_Ufn-0 Bside NewArg_MuxBus_K_0 MuxCCode_FramesFull JumpT_UfnDump JumpF_Ufn; Label_Ufn-1 Bside NewArg_MuxBus_K_1 MuxCCode_FramesFull JumpT_UfnDump JumpF_Ufn; Label_Ufn-2 Bside NewArg_MuxBus_K_2 MuxCCode_FramesFull JumpT_UfnDump JumpF_Ufn; Label_Ufn-3 Bside NewArg_MuxBus_K_3 MuxCCode_FramesFull JumpT_UfnDump JumpF_Ufn; Label_UfnA-3 Aside NewArg_MuxBus_K_3 MuxCCode_FramesFull JumpT_UfnDump JumpF_Ufn; Label_Ufn-0d Bside EUop_D1 Tag_Int RD1addr_IBufData4 Waddr_NewTos NewTos_Tos+1 NewArg_MuxBus_K_1 MuxCCode_FramesFull WriteF JumpT_UfnDump JumpF_Ufn; Label_Ufn-1d Bside EUop_D1 Tag_Int RD1addr_IBufData4 Waddr_NewTos NewTos_Tos+1 NewArg_MuxBus_K_2 MuxCCode_FramesFull WriteF JumpT_UfnDump JumpF_Ufn; Label_Ufn-2d Bside EUop_D1 Tag_Int RD1addr_IBufData4 Waddr_NewTos NewTos_Tos+1 NewArg_MuxBus_K_3 MuxCCode_FramesFull WriteF JumpT_UfnDump JumpF_Ufn; Label_Ufn Bside MemOp_Map MemOffset_MuxBus_Opcode MemLatchSrc_MapAddr Raddr_K_UfnBase RCxt AltCxt_Global; MemOp_Ras MemOffset_K2_0 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr EUop_D2 Tag_D2 RD2addr_Nil Waddr_K_IVar WriteOctal WCxt AltCxt_Top+1 NewArg2_MuxBus_Tos; MemOp_Cas MemOffset_K2_0 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr EUop_XData W2addr_Temp1 NewArg2_MuxBus_Tos; EUop_D1 Tag_Int RD1addr_MuxBus_Arg Waddr_K_HdrSlot WCxt AltCxt_Top+1 JumpT_Fn1; Label_UfnDump OpLength_0 Aside JumpT_DumpFrame; * ------------------------------------------------------; * Page Faults; * ------------------------------------------------------; * Temp1 must have offending address; Label_PageFault Bside OpLength_0 EUop_D1 Tag_Int RD1addr_Temp1 Waddr_NewTos NewTos_Tos+1 NewArg_1 MuxCCode_FramesFull WriteF JumpT_DumpFrame; EUop_D1 Tag_D1 Raddr_K_PFCode RCxt AltCxt_Global W2addr_Temp1 JumpT_WOctFn1; * ------------------------------------------------------; * Special Precondition Functions; * ------------------------------------------------------; * This initilizes the machine by setting the Pc to 0 and then * starting the machine. May have to be careful that it can load * Pc directly before DONE.; Label_Reset Aside OpLength_0 MemOp_Map MemOffset_K2_0 MemLatchSrc_MapAddr PhysAddrSrc_PhysAddr LatchFetchPc ByteAddr EUop_D1 Tag_Int RD1addr_MuxBus_K_0 RD2addr_MuxBus Raddr_K RCxt Waddr_K WCxt WriteOctal PcSrc_D1 NewArg_MuxBus NewArg2_MuxBus NewTos_MuxBus NewBotCxt AltCxt_K NewTopCxt WriteData; EUop_D2 Tag_D2 RD1addr_0 RD2addr_Unbound MuxBus_K_255 ClrFlags; EUop_D2 Tag_D2 RD1addr_0 RD2addr_Unbound NewTos_MuxBus_K_16 Waddr_K WriteOctal; EUop_D2 Tag_D2 RD2addr_Nil Waddr_K_8 WriteOctal JumpT_NotOpValid; Label_Interrupt1 Aside OpLength_0 EUop_D1 Tag_D1 Raddr_K_Irq1Code RCxt AltCxt_Global W2addr_Temp1 NewArg_0 MuxCCode_FramesFull JumpT_DumpFrame; * Clear both irq1 & irqenable; MuxBus_K_Irq1&IrqEnableMask ClrFlags JumpT_WOctFn1; Label_Interrupt2 Aside OpLength_0 EUop_D1 Tag_D1 Raddr_K_Irq2Code RCxt AltCxt_Global W2addr_Temp1 NewArg_0 MuxCCode_FramesFull JumpT_DumpFrame; MuxBus_K_Irq2&IrqEnableMask ClrFlags JumpT_WOctFn1; Label_RefCount Aside OpLength_0 EUop_D1 Tag_D1 Raddr_K_DecRef RCxt AltCxt_Global Waddr_NewTos NewTos_Tos+1 NewArg_1 MuxCCode_FramesFull WriteF JumpT_DumpFrame; EUop_D1 Tag_D1 Raddr_K_IncRef RCxt AltCxt_Global Waddr_NewTos NewTos_Tos+1 NewArg_Arg+1; EUop_D1 Tag_D1 Raddr_K_IncRef2 RCxt AltCxt_Global Waddr_NewTos NewTos_Tos+1 MuxBus_K_RefCountMask ClrFlags NewArg_Arg+1; EUop_D1 Tag_D1 Raddr_K_RefCountCode RCxt AltCxt_Global W2addr_Temp1 JumpT_WOctFn1; Label_AdjustFrames Aside OpLength_0 EUop_D1 Tag_D1 Raddr_K_StackAdjustCode RCxt AltCxt_Global W2addr_Temp1 NewArg_1 MuxCCode_FramesFull JumpT_DumpFrame; MuxBus_K_StackRefillMask ClrFlags JumpT_WOctFn1; Label_NotOpValid Aside OpLength_0 EUop_D1 Tag_D1 RD1addr_0 RD2addr_0 JumpT_Done; Label_WOctFn1 Aside EUop_D2 Tag_D2 RD2addr_Nil Waddr_K_IVar WCxt AltCxt_Top+1 WriteOctal NewArg2_MuxBus_Tos; EUop_D1 Tag_Int RD1addr_MuxBus_Arg Waddr_K_HdrSlot WCxt AltCxt_Top+1 JumpT_Fn1; * ------------------------------------------------------; * Other Special Opcodes; * ------------------------------------------------------; Label_Dead Bside JumpT_Done; Label_FRaid OpLength_1 Raddr_Tos RD2addr_Raddr-1 NewTos_Tos-MuxBus MuxBus_K_2 DpCCode_D1=D2 WriteT JumpT_Done; Label_FRaidStop OpLength_1 JumpT_FRaidStop; Label_Raid OpLength_1 JumpT_Stop; Label_Stop OpLength_1 JumpT_Stop; Label_Reset-VMM OpLength_1 Misc_ResetVMM JumpT_Done; Label_WriteOctNil OpLength_2 EUop_D2 Tag_D2 RD2addr_Nil Waddr_IBufN WriteOctal JumpT_Done; Label_WriteOctUnbound OpLength_2 EUop_D2 Tag_D2 RD2addr_Unbound Waddr_IBufN WriteOctal JumpT_Done; Label_SetOutputInt OpLength_1 MuxBus_K_IrqOutMask SetFlags JumpT_Done; Label_ClrOutputInt OpLength_1 MuxBus_K_IrqOutMask ClrFlags JumpT_Done; Label_SetFlags OpLength_3 EUop_Or Tag_Int RD1addr_IBufData2 Raddr_K_HdrSlot Dswap Waddr_K JumpT_Done; Label_ClrFlags OpLength_3 EUop_Or Tag_Int RD1addr_IBufData2 Raddr_K_HdrSlot Dswap W2addr_Temp1; EUop_Xor Tag_Int RD1addr_IBufData2 RD2addr_Temp1 Waddr_K_HdrSlot JumpT_Done; Label_TestFlags OpLength_3 EUop_And Tag_Int RD1addr_IBufData2 Raddr_K_HdrSlot Dswap W2addr_Temp1; RD1addr_Temp1 RD2addr_0 NewTos_Tos+1 DpCCode_D1=D2 JumpT_SetNil JumpF_SetT; * DISINT; Label_DisInt OpLength_1 MuxBus_K_IrqEnableMask ClrFlags JumpT_Done; * ENBINT; Label_EnbInt OpLength_1 MuxBus_K_IrqEnableMask SetFlags JumpT_Done; * MYCLINK; Label_MyClink OpLength_1 EUop_D1 Tag_D1 Raddr_K K_Clink Waddr_NewTos NewTos_Tos+1 MuxCCode_FramesEmpty WriteT JumpT_Done JumpF_DumpFrame; * MYCLINK_^; Label_MyClink_^ OpLength_1 EUop_D1 Tag_D1 Raddr_Tos Waddr_K K_Clink MuxCCode_FramesEmpty WriteT JumpT_Pop JumpF_DumpFrame; * ------------------------------------------------------; * Stack Frame Swapping; * ------------------------------------------------------; * LOAD; * This loads the previous frame. * Assumes: only executed on a return. * no further page faults on frame after 1st read.; Label_LoadFrame Bside OpLength_0 MemOp_Map; MemOp_Map MemOffset_K2_FrameOffset MemLatchSrc_MapAddr Raddr_K_Clink; MemOp_Ras MemOffset_K2_0 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr; MemOp_Cas MemOffset_K2_0 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr EUop_XData W2addr_Temp1 NewArg2_MuxBus_K_255; MemOp_Ras MemOffset_K2_1 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr RD2addr_Temp1 NewArg_MuxBus_D2 AltCxt_Top-1 NewBotCxt; MemOp_Cas MemOffset_K2_1 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr EUop_XData Waddr_NewArg2 WCxt AltCxt_Bot NewArg2_Arg2+1 NewArg_Arg-MuxBus MuxBus_K_1; MemOp_Cas MemOffset_K2_1 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr EUop_XData Waddr_NewArg2 WCxt AltCxt_Bot NewArg2_Arg2+1 MuxBus_Arg2 MuxCCode_Arg=Mux JumpF_Rpt JumpT_Done; * DUMP; * This dumps the last frame. * - Get the next free pointer by following the Clink of the last frame. * - Read the free pointer from memory. ; Label_DumpFrame Bside OpLength_0 MemOp_Map; MemOp_Map MemOffset_K2_NextLink MemLatchSrc_MapAddr EUop_D1 Tag_D1 Raddr_K_Clink RCxt AltCxt_Bot W2addr_Temp1; MemOp_Ras MemOffset_K2_0 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr; MemOp_Cas MemOffset_K2_0 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr EUop_XData W2addr_Temp1; MemOp_Map MemOffset_K2_FrameOffset MemLatchSrc_MapAddr RD1addr_Temp1 EUop_D1 Tag_D1 Waddr_K_Clink WCxt AltCxt_Bot+1; MemOp_Ras MemOffset_K2_0 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr EUop_TypeBits Tag_Int Raddr_K_HdrSlot RCxt AltCxt_Bot W2addr_Temp1 NewArg2_0; MemOp_Cas MemOffset_K2_1 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr WriteData RD2addr_Temp1 NewArg_MuxBus_D2; MemOp_Cas MemOffset_K2_1 MemLatchSrc_PhysAddr PhysAddrSrc_PhysAddr WriteData Dswap Raddr_Arg2 RCxt AltCxt_Bot NewArg2_Arg2+1 MuxBus_Arg2 MuxCCode_Arg=Mux JumpF_Rpt; AltCxt_Bot+1 NewBotCxt JumpT_Done; * DpCCode_LastStackP JumpF_Done; * MuxBus_K_StackRefillMask SetFlags JumpT_Done; * ------------------------------------------------------; * Jumps; * ------------------------------------------------------; * * Jumps *; Label_Noop OpLength_1 Aside JumpT_Done; * JUMPX; Label_DoJmp OpLength_2 EUop_+ Tag_Int RD1addr_MuxBus_IBufN RD2addr_NextPc W2addr_Temp1 JumpT_MapRead; * TJUMPX^; Label_TJump^ OpLength_2 Raddr_Tos NewTos_Tos-MuxBus MuxBus_K_1 RD2addr_Nil DpCCode_D1=D2 JumpF_JumpXB JumpT_Done; * FJUMPX^; Label_FJump^ OpLength_2 Raddr_Tos NewTos_Tos-MuxBus MuxBus_K_1 RD2addr_Nil DpCCode_D1=D2 JumpT_JumpXB JumpF_Done; * ; * Off Page Relative Jumps ; * ; * JUMPK; Label_JumpK OpLength_1 EUop_+ Tag_Int RD1addr_MuxBus_Opcode RD2addr_NextPc OpMask_b1111 W2addr_Temp1 JumpT_MapRead; * TJUMPK^; Label_TJumpK^ OpLength_1 Raddr_Tos NewTos_Tos-MuxBus MuxBus_K_1 RD2addr_Nil DpCCode_D1=D2 JumpF_JumpKB JumpT_Done; * FJUMPK^; Label_FJumpK^ OpLength_1 Raddr_Tos NewTos_Tos-MuxBus MuxBus_K_1 RD2addr_Nil DpCCode_D1=D2 JumpT_JumpKB JumpF_Done; * JUMPXX; Label_JumpXX OpLength_3 EUop_+ Tag_Int RD1addr_IBufData2 RD2addr_NextPc W2addr_Temp1 JumpT_MapRead; * NJUMPX; Label_NJumpX OpLength_2 EUop_- Tag_Int RD1addr_IBufData1 RD2addr_NextPc W2addr_Temp1 JumpT_MapRead; * NJUMPXX; Label_NJumpXX OpLength_3 EUop_- Tag_Int RD1addr_IBufData2 RD2addr_NextPc W2addr_Temp1 JumpT_MapRead; * T^JUMP; Label_NTJump OpLength_2 Raddr_Tos NewTos_Tos-MuxBus MuxBus_K_1 RD2addr_Nil DpCCode_D1=D2 WriteT JumpT_Done JumpF_JumpXB; * F^JUMP; Label_NFJump OpLength_2 Raddr_Tos RD2addr_Nil NewTos_Tos-MuxBus MuxBus_K_1 DpCCode_D1=D2 WriteF JumpF_Done JumpT_JumpXB; * CONTINUATIONS; Label_JumpXB Bside EUop_+ Tag_Int RD1addr_MuxBus_IBufN RD2addr_NextPc W2addr_Temp1 JumpT_MapRead; Label_JumpKB Bside EUop_+ Tag_Int RD1addr_MuxBus_Opcode RD2addr_NextPc OpMask_b0111 W2addr_Temp1 JumpT_MapRead; Label_MapRead Bside MemOp_Map MemOffset_K2_0 MemLatchSrc_MapAddr LatchFetchPc ByteAddr RD1addr_Temp1 PcSrc_D1 RD2addr_0 JumpT_NotOpValid; End; UniStart; OpNbr_1 Start_Reset; OpNbr_2 Start_NotOpValid; OpNbr_4 Start_Interrupt1; OpNbr_8 Start_Interrupt2; OpNbr_16 Start_RefCount; OpNbr_32 Start_AdjustFrames; MultiStart OpNbr_40; OpName_JUMPK Start_JumpK; MultiStart OpNbr_48; OpName_VARK_^ Start_VarK_^; OpName_VARk_^ Start_Vark_^; OpName_VARK Start_VarK; OpName_VARk Start_Vark; OpName_FN0 OpName_FN1 OpName_FN2 OpName_FN3 OpName_FN4 OpName_FN5 OpName_FN6 OpName_FN7 Start_FnCall; OpName_TAIL-FN0 OpName_TAIL-FN1 OpName_TAIL-FN2 OpName_TAIL-FN3 OpName_TAIL-FN4 OpName_TAIL-FN5 OpName_TAIL-FN6 OpName_TAIL-FN7 Start_TailFnCall; OpName_MV-FN0 OpName_MV-FN1 OpName_MV-FN2 OpName_MV-FN3 OpName_MV-FN4 OpName_MV-FN5 OpName_MV-FN6 OpName_MV-FN7 Start_MvFnCall; OpName_EXCH-FN0 OpName_EXCH-FN1 OpName_EXCH-FN2 OpName_EXCH-FN3 OpName_EXCH-FN4 OpName_EXCH-FN5 OpName_EXCH-FN6 OpName_EXCH-FN7 Start_ExchFnCall; OpName_FJUMPK^ Start_FJumpK^; OpName_TJUMPK^ Start_TJumpK^; UniStart OpNbr_200Q; OpName_STOP Start_Stop; OpName_NOP Start_Noop; OpName_FIXP Start_FixP; OpName_FLOATP Start_FloatP; OpName_POINTERP Start_PointerP; OpName_SYMBOLP Start_SymbolP; OpName_IMMEDIATEP Start_ImmediateP; OpName_CONSP Start_ConsP; OpName_GETTYPEBITS Start_TypeBits; OpName_GETPTRBITS Start_PtrBits; OpName_SETSUBTYPE Start_SetSubType; OpName_SETTYPE.N Start_SetType; OpName_SUBTYPEP.N Start_SubTypeP; OpName_EQ Start_Eq; OpName_EQL Start_Eql; OpName_EQUAL Start_Equal; OpName_= Start_Arith=; OpName_GREATERP Start_Greater; OpName_PLUS Start_Plus; OpName_ADDX Start_AddX; OpName_DIFFERENCE Start_Diff; OpName_SUBX Start_SubX; OpName_NEG Start_Neg; OpName_ADC Start_ADC; OpName_SBC Start_SBC; OpName_LOGAND Start_And; OpName_LOGOR Start_Or; OpName_LOGXOR Start_Xor; OpName_LOGNOT Start_LNot; OpName_CAR Start_Car; OpName_CDR Start_Cdr; OpName_SETF-CAR Start_Setf-Car; OpName_SETF-CDR Start_Setf-Cdr; OpName_CONS Start_Cons; OpName_RPLCONS Start_RplCons; OpName_GETBASEPTR.N Start_Getptr; OpName_PUTBASEPTR.N Start_Putptr; OpName_RPLPTR.N Start_Rplptr; OpName_ADDBASE Start_Addbase; OpName_GETBASE.N Start_GetFix; OpName_SYMBOLCELL.N Start_SymbolCell; OpName_CSTORE Start_CStore; OpName_GETTAG.N Start_GetTag; OpName_PUTTAG.N Start_PutTag; OpName_CSTORETAG Start_CStoreTag; OpName_INCREFCOUNT Start_IncRef; OpName_DECREFCOUNT Start_DecRef; OpName_IREGX Start_IReg.X; OpName_IREGX_^ Start_IReg.X_^; OpName_VARX Start_VarX ; OpName_VARX_ Start_VarX_; OpName_VARX_^ Start_VarX_^; OpName_GVAR Start_GVar; OpName_GVAR_^ Start_GVar_^; OpName_OVAR1.X Start_Ovar1.X ; OpName_OVAR1.X_^ Start_Ovar1.X_^; OpName_ALSH Start_Ash; OpName_LLSH.N Start_Llsh.N; OpName_LRSH.N Start_Lrsh.N; OpName_LRSH Start_Lrsh; OpName_LLSH Start_Llsh; OpName_DLLSH.N Start_DShift.N; OpName_DLLSH Start_DShift; OpName_PRIORITY Start_Priority; OpName_MOVETOS Start_MoveTos; OpName_SETTOS Start_SetTos; OpName_POP Start_Pop; OpName_COPY Start_Copy; OpName_SWAP Start_Swap; OpName_JUMPX Start_DoJmp; OpName_NJUMPX Start_NJumpX; OpName_TJUMPX^ Start_TJump^; OpName_FJUMPX^ Start_FJump^; OpName_N^TJUMPX Start_NTJump; OpName_N^FJUMPX Start_NFJump; OpName_JUMPXX Start_JumpXX; OpName_NJUMPXX Start_NJumpXX; OpName_APPLY Start_Apply ; OpName_TAIL-APPLY Start_TailApply ; OpName_MV-APPLY Start_MvApply ; OpName_EXCH-APPLY Start_ExchApply ; OpName_RETURN Start_Ret ; OpName_RETEI Start_RetEI; OpName_RETNP Start_RetNP; OpName_'NIL Start_'Nil; OpName_'T Start_'T ; OpName_'UNBOUND Start_'Unbound; OpName_'0 Start_'0; OpName_'1 Start_'1; OpName_SICX Start_SicX; OpName_SICXX Start_SicXX; OpName_PCONST1 Start_Pconst1; OpName_PCONST2 Start_Pconst2; OpName_SCONST Start_SymbConst; OpName_ICONST Start_IntConst; OpName_FCONST Start_FConst; OpName_IMMCONST Start_XConst; OpName_DISINT Start_DisInt; OpName_ENBINT Start_EnbInt; OpName_SETOUTPUTINT Start_SetOutputInt; OpName_CLROUTPUTINT Start_ClrOutputInt; OpName_RESET-VMM Start_Reset-VMM; OpName_MYCLINK Start_MyClink; OpName_MYCLINK_^ Start_MyClink_^; OpName_WRITEOCTNIL.N Start_WriteOctNil; OpName_WRITEOCTUNBOUND.N Start_WriteOctUnbound; OpName_SETFLAGS.XX Start_SetFlags; OpName_CLRFLAGS.XX Start_ClrFlags; OpName_TESTFLAGS.XX Start_TestFlags; OpName_FRAID Start_FRaid; OpName_RAID Start_Raid; End; GACHA11z�