(DEFINE-FILE-INFO PACKAGE "INTERLISP" READTABLE "XCL" BASE 10)
(FILECREATED "28-Oct-87 18:47:22" {PHYLUM}<CTAMARIN>EMULATOR>CEDARGENS.\;84 79524
|changes| |to:| (FNS |MakeEUVectors| |MakeSpecRegConstD1| |ChipVectors| |SetupChipVectors|)
|previous| |date:| "14-Oct-87 17:39:22" {PHYLUM}<CTAMARIN>EMULATOR>CEDARGENS.\;81)
; Copyright (c) 1987 by Xerox Corporation. All rights reserved.
(PRETTYCOMPRINT CEDARGENSCOMS)
(RPAQQ CEDARGENSCOMS ((* * |Make| CEDAR |Defs| |file|)
(FNS |MakeCedarDefs|)
(FNS |MakeUCodeInfo| |PrintUCodeBits| |MakeUCodeBits| |MIFetch|
|MakeUCodeConsts|)
(FNS |MakeMemoryFile|)
(FNS |MakeDpCCodeInfo| |MakeDpCCode| |DpCcEntry|)
(FNS |MakeSpecRegConstInfo| |MakeSpecRegConstD1| |MakeSpecRegConstD2|)
(FNS |MakeDefnsInfo| |CedarSpecials|)
(FNS |GetLCFieldNames| |GetFieldNames| |MakeFieldInfo| |MakePLType|)
(FNS |MakeString| |ListToStr|)
(* * |Test| |Vector| |Generation| |Primitives|)
(FNS |SaveVectors| |SaveLastVectors| |PrintWire| |MakeSizes| |PrintList|
|PrintNum| |XOutputs| |XVector| |uProp|)
(* |;;;| "Whole Chip")
(FNS |SetupChipVectors| |ChipVectors|)
(* |;;;| "UCode")
(FNS |MakeUCodeVectors| |UCodeTestCycle|)
(* |;;;| "Data Path")
(FNS |MakeSpecRegVectors|)
(FNS |MakeEUVectors| |EUProp| |MakeDpCcVectors| |DPProp|)
(FNS |SaveRegMuxVectors|)
(* |;;;| "Register File")
(FNS |MakeRegisterFileVectors| |RegCycle|)
(* |;;;| "MemPath")
(FNS |MakeIBufLogicVectors| |WriteIBufWord| |ReadIBuf|)
(FNS |MakePcLogicVectors| |WriteThePc| |ReadThePc|)
(FNS |MakeAddrSelVectors|)
(* |;;| " Control")
(FNS |MakeUCodeCtlVectors| |MakeContextVectors| |SetContext|)))
(* * |Make| CEDAR |Defs| |file|)
(DEFINEQ
(|MakeCedarDefs|
(LAMBDA (|filename| |noucode|) (* \; "Edited 30-Sep-87 16:56 by Krivacic")
(LET (|stream| |fields| |lines| |chars| |ucodesize|)
(|if| (NULL |filename|)
|then| (SETQ |filename| '|{Phylum}<CTamarin>TamarinRoseSim>TamGenImpl.mesa|))
(SETQ |stream| (|if| (EQ |filename| T)
|then| T
|else| (OPENSTREAM |filename| 'OUTPUT)))
(RADIX 10)
(PRINTOUT |stream| "-- TamGenImpl.mesa" T)
(PRINTOUT |stream| "-- Generated by Lisp" T)
(PRINTOUT |stream| "-- Date: " (DATE)
T)
(PRINTOUT |stream| "DIRECTORY TamarinUtil;" T)
(PRINTOUT |stream| "TamGenImpl: CEDAR PROGRAM " T)
(PRINTOUT |stream| " IMPORTS TamarinUtil" T)
(PRINTOUT |stream| " = BEGIN OPEN TamarinUtil;" T)
(TERPRI |stream|)
(PRINTOUT |stream| " ResetTamarinDefs[];" T)
(TERPRI |stream|)
(SETQ |lines| (|MakeFieldInfo| 'MI))
(|if| (NULL |noucode|)
|then| (|MakeUCodeInfo| NIL NIL |lines|))
(|MakeUCodeConsts| |stream| |lines|)
(|MakeDpCCodeInfo| |stream|)
(|MakeSpecRegConstInfo| |stream|)
(TERPRI |stream|)
(PRINTOUT |stream| " GetUCode[];" T)
(TERPRI |stream|)
(PRINTOUT |stream| "END." T)
(|if| (NEQ |filename| T)
|then| (CLOSEF |stream|)))))
)
(DEFINEQ
(|MakeUCodeInfo|
(LAMBDA (|ustream| |maxsize| |ucodelines|) (* \; "Edited 30-Sep-87 16:55 by Krivacic")
(RADIX 10)
(LET (|fields| |lines| |chars| |ucodesize| (|ucodestream| (OR |ustream| '
|{Phylum}<CTamarin>TamarinRoseSim>TamUcode|
)))
(|if| (NEQ |ucodestream| T)
|then| (SETQ |ucodestream| (OPENSTREAM |ucodestream| 'OUTPUT))
(LINELENGTH 300 |ucodestream|))
(TERPRI T)
(PRINTOUT T "-- Micro Code Initialization to: " |ucodestream| T)
(TERPRI T)
(SETQ |lines| (OR |ucodelines| (|MakeFieldInfo| 'MI)))
(|if| |maxsize|
|then| (|if| (NEQ 0 (LOGAND |maxsize| 7))
|then| (PRINTOUT T "*** WARNING Rounding maxsize to " (LOGAND |maxsize| 248)
" from " |maxsize| T)))
(|for| \i |from| 0 |to| (SUB1 (OR (AND |maxsize| (LOGAND |maxsize| 248))
128)) |do| (LET* ((|even| (TIMES \i 2))
(|odd| (ADD1 |even|)))
(TERPRI |ucodestream|)
(PRINTOUT |ucodestream| |even| ", ")
(|PrintUCodeBits| (ELT |UCodeRomA| |even|
)
|lines| |ucodestream|)
(PRINTOUT |ucodestream| ", ")
(|PrintUCodeBits| (ELT |UCodeRomA| |odd|)
|lines| |ucodestream|)
(TERPRI |ucodestream|)
(PRINTOUT |ucodestream| |even| ", ")
(|PrintUCodeBits| (ELT |UCodeRomB| |even|
)
|lines| |ucodestream|)
(PRINTOUT |ucodestream| ", ")
(|PrintUCodeBits| (ELT |UCodeRomB| |odd|)
|lines| |ucodestream|)))
(|if| (NEQ |ucodestream| T)
|then| (CLOSEF |ucodestream|))
|lines|)))
(|PrintUCodeBits|
(LAMBDA (|mi| |deflist| |stream|) (* \; "Edited 30-Sep-87 18:41 by Krivacic")
(LET (|fieldvalue|)
(|for| \i |in| |deflist| |do| (SETQ |fieldvalue|
(|if| (AND |mi| (NUMBERP (|MIFetch| (CAR \i)
|mi|)))
|then| (|MIFetch| (CAR \i)
|mi|)
|else| 0))
(PRINTNUM (LIST 'FIX (CADDR \i)
2 T)
(LOADBYTE |fieldvalue| 0 (CADDR \i))
|stream|)))))
(|MakeUCodeBits|
(LAMBDA (|ucode| |deflist| |noconcat|) (* \; "Edited 15-Jul-87 13:42 by Krivacic")
(LET ((|ucodelist| (|for| \i |in| |deflist| |join| (|MakeString| (|if| |ucode|
|then| (|MIFetch|
(CAR \i)
|ucode|)
|else| 0)
(CADDR \i)))))
(|if| (LESSP (LENGTH |ucodelist|)
120)
|then| (SETQ |ucodelist| (APPEND |ucodelist| (|for| \i |from| 1
|to| (DIFFERENCE 120 (LENGTH |ucodelist|
))
|collect| 'X))))
(|if| |noconcat|
|then| |ucodelist|
|else| (CONCATLIST |ucodelist|)))))
(|MIFetch|
(LAMBDA (|field| |rec|) (* \; "Edited 8-Oct-87 15:03 by Krivacic")
(SELECTQ |field|
(|AltCxt| (|fetch| (MI |AltCxt|) |of| |rec|))
(|ByteAddr| (|fetch| (MI |ByteAddr|) |of| |rec|))
(|Done| (|fetch| (MI |Done|) |of| |rec|))
(|DpCCode| (|fetch| (MI |DpCCode|) |of| |rec|))
(|Dswap| (|fetch| (MI |Dswap|) |of| |rec|))
(|EUop| (|fetch| (MI |EUop|) |of| |rec|))
(|EuCCode| (|fetch| (MI |EuCCode|) |of| |rec|))
(|ForceDone| (|fetch| (MI |ForceDone|) |of| |rec|))
(|InvertCCode| (|fetch| (MI |InvertCCode|) |of| |rec|))
(K (|fetch| (MI K) |of| |rec|))
(K2 (|fetch| (MI K2) |of| |rec|))
(|LatchFetchPc|
(|fetch| (MI |LatchFetchPc|) |of| |rec|))
(|LatchPc| (|fetch| (MI |LatchPc|) |of| |rec|))
(|MemCCode| (|fetch| (MI |MemCCode|) |of| |rec|))
(|MemLatchSrc| (|fetch| (MI |MemLatchSrc|) |of| |rec|))
(|MemOffset| (|fetch| (MI |MemOffset|) |of| |rec|))
(|MemOp| (|fetch| (MI |MemOp|) |of| |rec|))
(|Misc| (|fetch| (MI |Misc|) |of| |rec|))
(|MuxBus| (|fetch| (MI |MuxBus|) |of| |rec|))
(|MuxCCode| (|fetch| (MI |MuxCCode|) |of| |rec|))
(|NewArg| (|fetch| (MI |NewArg|) |of| |rec|))
(|NewArg2| (|fetch| (MI |NewArg2|) |of| |rec|))
(|NewBotCxt| (|fetch| (MI |NewBotCxt|) |of| |rec|))
(|NewTopCxt| (|fetch| (MI |NewTopCxt|) |of| |rec|))
(|NewTos| (|fetch| (MI |NewTos|) |of| |rec|))
(|NextInstA| (|fetch| (MI |NextInstA|) |of| |rec|))
(|NextInstB| (|fetch| (MI |NextInstB|) |of| |rec|))
(|OpLength| (|fetch| (MI |OpLength|) |of| |rec|))
(|OpMask| (|fetch| (MI |OpMask|) |of| |rec|))
(|PcSrc| (|fetch| (MI |PcSrc|) |of| |rec|))
(|PhysAddrSrc| (|fetch| (MI |PhysAddrSrc|) |of| |rec|))
(|RCxt| (|fetch| (MI |RCxt|) |of| |rec|))
(|RD1addr| (|fetch| (MI |RD1addr|) |of| |rec|))
(|RD2addr| (|fetch| (MI |RD2addr|) |of| |rec|))
(|Raddr| (|fetch| (MI |Raddr|) |of| |rec|))
(|Tag| (|fetch| (MI |Tag|) |of| |rec|))
(|Ucode| (|fetch| (MI |Ucode|) |of| |rec|))
(|W2addr| (|fetch| (MI |W2addr|) |of| |rec|))
(|WCxt| (|fetch| (MI |WCxt|) |of| |rec|))
(|Waddr| (|fetch| (MI |Waddr|) |of| |rec|))
(|WriteF| (|fetch| (MI |WriteF|) |of| |rec|))
(|WriteOctal| (|fetch| (MI |WriteOctal|) |of| |rec|))
(|WriteT| (|fetch| (MI |WriteT|) |of| |rec|))
(|WriteTags| (|fetch| (MI |WriteTags|) |of| |rec|))
(|WriteData| (|fetch| (MI |WriteData|) |of| |rec|))
(|SetFlags| (|fetch| (MI |SetFlags|) |of| |rec|))
(|ClrFlags| (|fetch| (MI |ClrFlags|) |of| |rec|))
(|Unused| (|fetch| (MI |Unused|) |of| |rec|))
(PROGN (PRINTOUT T "Undefined Fi Tdeld: " |field|)
(RECORDACCESS |field| |rec| NIL 'FETCH)))))
(|MakeUCodeConsts|
(LAMBDA (|stream| |lines|) (* \; "Edited 30-Sep-87 16:54 by Krivacic")
(TERPRI T)
(PRINTOUT T "-- Micro Code Fields" T)
(TERPRI T)
(TERPRI |stream|)
(PRINTOUT |stream| "-- Micro Code Fields" T)
(TERPRI |stream|)
(|for| \i |in| |lines| |do| (PRINTOUT |stream| "TamConstant[$p" (CAR \i)
", "
(CADR \i)
"];" T)
(PRINTOUT |stream| "TamConstant[$s" (CAR \i)
", "
(CADDR \i)
"];" T))))
)
(DEFINEQ
(|MakeMemoryFile|
(LAMBDA (|filename| |size|) (* \; "Edited 24-Sep-87 14:28 by Krivacic")
(RADIX 10)
(LET* ((|memsize| (OR |size| 100))
(|streamname| (OR |filename| '|{Phylum}<CTamarin>TamarinRoseSim>TamMemory|))
(|stream| (|if| (NEQ |streamname| T)
|then| (OPENSTREAM |streamname| 'OUTPUT))))
(TERPRI T)
(PRINTOUT T "-- Saving Tamarin Memory Configuration" T)
(TERPRI T)
(|for| \i |from| 0 |to| (SUB1 |memsize|) |do| (TERPRI |stream|)
(PRINTNUM '(FIX 5) \i |stream|)
(PRIN1 ", " |stream|)
(PRINTNUM '(FIX 40 2 T) (|MemoryAccess|
\i NIL T)
|stream|))
(|if| (AND (NEQ |streamname| T))
|then| (CLOSEF |stream|)))))
)
(DEFINEQ
(|MakeDpCCodeInfo|
(LAMBDA (|stream|) (* \; "Edited 18-May-87 16:41 by rtk")
(LET (|lines|)
(TERPRI |stream|)
(PRINTOUT |stream| "-- Data Path Condition Code Setup" T)
(TERPRI |stream|)
(SETQ |lines| (|MakeDpCCode|))
(|for| \i |in| |lines| |do| (DESTRUCTURING-BIND (|index| |d1val| |d2val| |nd1val| |nd2val|
|d1xord2val|)
\i
(PRINTOUT |stream| "DpCCode[" |index| ", "
(|MakeString| |d1val| 34 T)
", "
(|MakeString| |d2val| 34 T)
", "
(|MakeString| |nd1val| 34 T)
", "
(|MakeString| |nd2val| 34 T)
", "
(|MakeString| |d1xord2val| 34 T)
"];" T)))
(TERPRI |stream|))))
(|MakeDpCCode|
(LAMBDA NIL (* \; "Edited 14-Aug-87 10:34 by Krivacic")
(|MakeCondCodeArray|)
(PROG (|cond-code-list|)
(|for| \j |from| 0 |to| (SUB1 (ARRAYSIZE |CondAArray|))
|do| (LET ((\i (ELT |CondAArray| \j)))
(|if| (LISTP \i)
|then| (|for| |entries| |in| \i |do| (SETQ |cond-code-list|
(|DpCcEntry| \j |entries|
|cond-code-list|)))
|else| (SETQ |cond-code-list| (|DpCcEntry| \j \i |cond-code-list|)))))
(RETURN |cond-code-list|))))
(|DpCcEntry|
(LAMBDA (|index| |rec| |current-list|) (* \; "Edited 14-Aug-87 10:30 by Krivacic")
(CONS (LIST |index| (|fetch| (|CondCode| D1) |of| |rec|)
(|fetch| (|CondCode| D2) |of| |rec|)
(|fetch| (|CondCode| \nD1) |of| |rec|)
(|fetch| (|CondCode| \nD2) |of| |rec|)
(|fetch| (|CondCode| |D1xorD2|) |of| |rec|))
|current-list|)))
)
(DEFINEQ
(|MakeSpecRegConstInfo|
(LAMBDA (|stream|) (* \; "Edited 18-May-87 17:51 by rtk")
(LET (|lines|)
(TERPRI |stream|)
(PRINTOUT |stream| "-- Special Registers on D1" T)
(TERPRI |stream|)
(SETQ |lines| (|MakeSpecRegConstD1|))
(|for| \i |in| |lines| |do| (DESTRUCTURING-BIND (|index| |value|)
\i
(PRINTOUT |stream| "SpecRegConst[0, " |index| ", "
(|MakeString| |value| 34 T)
"];" T)))
(TERPRI |stream|)
(PRINTOUT |stream| "-- Special Registers on D2" T)
(TERPRI |stream|)
(SETQ |lines| (|MakeSpecRegConstD2|))
(|for| \i |in| |lines| |do| (DESTRUCTURING-BIND (|index| |value|)
\i
(PRINTOUT |stream| "SpecRegConst[1, " |index| ", "
(|MakeString| |value| 34 T)
"];" T)))
(TERPRI |stream|))))
(|MakeSpecRegConstD1|
(LAMBDA NIL (* \; "Edited 19-Oct-87 10:02 by Krivacic")
(LET ((|proplist| (GETPROP '|rd1addr| '|uField|)))
(|for| \i |in| |proplist| |when| (AND (GREATERP (CADR \i)
7)
(NOT (FMEMB (CAR \i)
'(|Temp1| |MuxBus|))))
|collect| (LIST (CADR \i)
(|TamRep| (SELECTQ (CAR \i)
(|Nil| NIL)
(T T)
(0 0)
(|Unbound| '|Unbound|)
(CAR \i))))))))
(|MakeSpecRegConstD2|
(LAMBDA NIL (* \; "Edited 30-Sep-87 16:33 by Krivacic")
(LET ((|proplist| (GETPROP '|rd2addr| '|uField|)))
(|for| \i |in| |proplist| |when| (AND (TF (|ConcatBits| '(((|Eval| (CADR \i))
0 1 3))))
(NEQ (CAR \i)
'|Temp1|)
(NEQ (CAR \i)
'|MuxBus|))
|collect| (LIST (CADR \i)
(|TamRep| (SELECTQ (CAR \i)
(|Nil| NIL)
(0 0)
(CAR \i))))))))
)
(DEFINEQ
(|MakeDefnsInfo|
(LAMBDA (|stream|) (* |edited:| "18-May-87 15:25")
(LET (|fields| |lines| |chars| |ucodesize|)
(|if| (NULL |filename|)
|then| (SETQ |filename| '|{Phylum}<CTamarin>TamSim>TamGenDefs2.mesa|))
(SETQ |stream| (|if| (EQ |filename| T)
|then| T
|else| (OPENSTREAM |filename| 'OUTPUT)))
(PRINTOUT |stream| "-- TamGenDefs.mesa" T)
(PRINTOUT |stream| "-- Generated by Lisp" T)
(PRINTOUT |stream| "DIRECTORY TamDefs;" T)
(PRINTOUT |stream| "TamGenDefs: CEDAR DEFINITIONS = BEGIN OPEN TamDefs ;" T)
(PRINTOUT |stream| "-- TYPE Definitions" T)
(SETQ |fields| (|GetLCFieldNames| 'MI))
(|for| \i |in| |fields| |when| (SETQ |lines| (|MakePLType| \i))
|do| (PRINTOUT |stream| \i ": TYPE = MACHINE DEPENDENT {" T)
(PRINTOUT |stream| " ")
(|for| \j |in| |lines| |do| (PRINTOUT |stream| " " \j)
(|if| (EQ \j '\,)
|then| (TERPRI |stream|)
(PRINTOUT |stream| " ")))
(TERPRI |stream|)
(PRINTOUT |stream| "};" T)
(TERPRI |stream|))
(TERPRI |stream|)
(|CedarSpecials| |stream|)
(PRINTOUT |stream| "UCodeWord: TYPE = RECORD [ " T)
(SETQ |lines| (|MakeFieldInfo| 'MI))
(|for| \i |in| |lines| |do| (SETQ |chars| (UNPACK (CAR \i)))
(SETQ |chars| (PACK (CONS (L-CASE (CAR |chars|))
(CDR |chars|))))
(|if| (NEQ \i (CAR |lines|))
|then| (PRINTOUT |stream| "," T))
(PRINTOUT |stream| " " |chars| ": (0.." (CADDR \i)
") "))
(TERPRI |stream|)
(PRINTOUT |stream| "];" T)
(TERPRI |stream|)
(PRINTOUT |stream| "END." T)
(IF (NEQ |filename| T)
THEN (CLOSEF |stream|)))))
(|CedarSpecials|
(LAMBDA (|stream|) (* |edited:| "18-May-87 12:18")
(PRINTOUT |stream| "-- RegMux Spec Record" T)
(TERPRI |stream|)
(PRINTOUT |stream| "MuxRec: TYPE = MACHINE DEPENDENT RECORD [" T)
(PRINTOUT |stream| " selReg (00: 00..00): BOOL ← FALSE, -- select reg" T)
(PRINTOUT |stream| " selOp (00: 01..01): BOOL ← FALSE, -- select op" T)
(PRINTOUT |stream| " selMux (00: 02..02): BOOL ← FALSE, -- select MuxBus" T)
(PRINTOUT |stream| " selIncr (00: 03..03): BOOL ← FALSE -- select carry" T)
(PRINTOUT |stream| " ];" T)
(TERPRI |stream|)
(TERPRI |stream|)
(PRINTOUT |stream| "-- Cond Code Rec " T)
(PRINTOUT |stream| "DPCondCodeRec: TYPE = RECORD [")
(PRINTOUT |stream| "d1, nD1, d2, nD2, d1XorD2: TaggedWord];" T)
(TERPRI |stream|)))
)
(DEFINEQ
(|GetLCFieldNames|
(LAMBDA (|recname|) (* |edited:| "18-May-87 11:28")
(|for| \i |in| (CADDR (RECLOOK |recname|)) |when| (EQ (CADR \i)
'BITS) |collect| (L-CASE (CAR \i)))))
(|GetFieldNames|
(LAMBDA (|recname|) (* |edited:| "18-May-87 11:11")
(|for| \i |in| (CADDR (RECLOOK |recname|)) |when| (EQ (CADR \i)
'BITS) |collect| (CAR \i))))
(|MakeFieldInfo|
(LAMBDA (|recname|) (* \; "Edited 1-Jun-87 14:10 by rtk")
(DECLARE (GLOBALVARS |ucodesize|))
(LET (|size| |result| (|pos| 0)
(|recdecl| (RECLOOK |recname|)))
(|for| \i |in| (CADDR |recdecl|) |when| (OR (EQ (CADR \i)
'BITS)
(EQ (CAR \i)
'|NextInstA|)
(EQ (CAR \i)
'|NextInstB|))
|do| (|if| (EQ (CADR \i)
'BITS)
|then| (SETQ |result| (CONS (LIST (CAR \i)
|pos|
(CADDR \i))
|result|))
(SETQ |pos| (PLUS |pos| (CADDR \i)))
|else| (SETQ |result| (CONS (LIST (CAR \i)
|pos| 8)
|result|))
(SETQ |pos| (PLUS |pos| 8)))
(PUTPROP (CAR \i)
'|RecSize|
(CADDAR |result|)))
(SETQ |ucodesize| |pos|)
(REVERSE |result|))))
(|MakePLType|
(LAMBDA (|atom|) (* |edited:| "18-May-87 11:50")
(LET ((|proplist| (GETPROP |atom| '|uField|))
(|result| NIL))
(|for| \i |in| |proplist| |do| (|if| |result|
|then| (SETQ |result| (APPEND |result|
(LIST '\,))))
(SETQ |result| (APPEND |result| (LIST (CAR \i)
(LIST (CADR \i))))))
|result|)))
)
(DEFINEQ
(|MakeString|
(LAMBDA (|val| |bits| |nolist|) (* \; "Edited 18-May-87 19:03 by rtk")
(|if| (OR (NOT (NUMBERP |val|))
(NULL |val|))
|then| (SETQ |val| 0))
(|if| |nolist|
|then| (|ListToStr| (|for| \i |from| (SUB1 |bits|) |to| 0 |by| -1
|collect| (LOADBYTE |val| \i 1)))
|else| (|for| \i |from| (SUB1 |bits|) |to| 0 |by| -1 |collect| (LOADBYTE |val| \i 1)))))
(|ListToStr|
(LAMBDA (|list|) (* |edited:| "18-May-87 14:50")
(CONCAT "\"" (CONCATLIST |list|)
"\"")))
)
(* * |Test| |Vector| |Generation| |Primitives|)
(DEFINEQ
(|SaveVectors|
(LAMBDA (|section| |nostream| |allxs|) (* \; "Edited 8-Oct-87 15:38 by Krivacic")
(DECLARE (GLOBALVARS *LASTVECTORSECTION* *SAVE-VECTORS-HEXDIGITS* *SAVE-VECTORS-NIBBLEVALUES*))
(|if| (NULL |section|)
|then| (SETQ |section| *LASTVECTORSECTION*))
(SETQ *SAVE-VECTORS-HEXDIGITS* (ARRAY 16 'POINTER 0 0))
(SETQ *SAVE-VECTORS-NIBBLEVALUES* (ARRAY 4 'POINTER 0 0))
(|for| \i |from| 0 |to| 15 |as| \j
|in| '(0 1 2 3 4 5 6 7 8 9 A B C D E F) |do| (SETA *SAVE-VECTORS-HEXDIGITS* \i \j))
(PRINTOUT T "Saving Vectors for " |section| T)
(|SetBusSizes|)
(|MakeFieldInfo| 'MI)
(LET* ((|stream| (OR |nostream| (OPENSTREAM (MKATOM (CONCAT "{Phylum}<CTamarin>Oracles>"
|section| ".oracle"))
'OUTPUT)))
(|vectorlist| (CAR (GETPROP |section| '|Vectors|)))
(|vectornames| (CAR |vectorlist|))
(|inputsizes| (|MakeSizes| (CAR |vectornames|)))
(|outputsizes| (|MakeSizes| (CADR |vectornames|))))
(|if| (NOT |nostream|)
|then| (LINELENGTH 300 |stream|))
(PRIN1 "-- " |stream|)
(|for| \i |in| |vectornames| |do| (PRIN1 \i |stream|)
(PRIN1 " " |stream|))
(TERPRI |stream|)
(DECLARE (GLOBALVARS |ucodesize|))
(LET* ((|ucodeinfo| (|MakeFieldInfo| 'MI))
(|mifields| (GETPROP |section| '|MiFields|))
(|milfields| (GETPROP |section| '|MilFields|))
(|fullucode| (|for| \i |from| 0 |to| |ucodesize| |collect| \i))
(|miucodefields| (OR (|for| |field| |in| |mifields|
|join| (DESTRUCTURING-BIND (|name| |start| |size|)
(FASSOC |field| |ucodeinfo|)
(FOR \i |from| 0 TO (SUB1 |size|)
COLLECT (PLUS |start| \i))))
|fullucode|
(|for| |field| |in| '(|NextInstA| |NextInstB|)
|join| (DESTRUCTURING-BIND (|name| |start| |size|)
(FASSOC |field| |ucodeinfo|)
(FOR \i |from| 0 TO (SUB1 |size|)
COLLECT (PLUS |start| \i))))))
(|milucodefields| (OR (|for| |field| |in| |milfields|
|join| (DESTRUCTURING-BIND (|name| |start| |size|)
(FASSOC |field| |ucodeinfo|)
(FOR \i |from| 0 TO (SUB1 |size|)
COLLECT (PLUS |start| \i))))
|fullucode|
(|for| |field| |in| '(|NextInstA| |NextInstB|)
|join| (DESTRUCTURING-BIND (|name| |start| |size|)
(FASSOC |field| |ucodeinfo|)
(FOR \i |from| 0 TO (SUB1 |size|)
COLLECT (PLUS |start| \i)))))))
(|for| \i |in| (CDR |vectorlist|)
|do| (DESTRUCTURING-BIND (|inputs| |outputs|)
\i
(|for| \j |in| |inputs| |as| |size| |in| |inputsizes| |as| |name|
|in| (CAR |vectornames|)
|do| (COND
((NUMBERP \j)
(|PrintWire| |stream| \j |size| NIL NIL 0))
((EQ |name| '|Mil|)
(|PrintWire| |stream| \j |size| |ucodeinfo|
|milucodefields| 'X))
((EQ |name| 'M\i)
(|PrintWire| |stream| \j |size| |ucodeinfo|
|miucodefields| 'X))
(T (|PrintWire| |stream| \j |size| |ucodeinfo| |fullucode|
0))))
(PRIN1 " | " |stream|)
(|for| \j |in| |outputs| |as| |size| |in| |outputsizes| |as| |name|
|in| (CADR |vectornames|)
|do| (COND
((NUMBERP \j)
(|PrintWire| |stream| (AND (NULL |allxs|)
\j)
|size| NIL NIL 'X))
((EQ |name| '|Mil|)
(|PrintWire| |stream| (AND (NULL |allxs|)
\j)
|size| |ucodeinfo| |milucodefields| 'X))
((EQ |name| 'M\i)
(|PrintWire| |stream| (AND (NULL |allxs|)
\j)
|size| |ucodeinfo| |miucodefields| 'X))
((NULL \j)
(|PrintWire| |stream| NIL |size| NIL NIL 'X))
(T (|PrintWire| |stream| (AND (NULL |allxs|)
\j)
|size| |ucodeinfo| |fullucode| 'X))))
(|if| (EQ |section| '|UCode|)
|then| (|PrintWire| |stream| (AND (NULL |allxs|)
(CAR |outputs|)
(NEQ (CAR |outputs|)
'X)
(|fetch| (MI |NextInstA|)
|of| (CAR |outputs|)))
8 NIL NIL 'X)
(|PrintWire| |stream| (AND (NULL |allxs|)
(CAR |outputs|)
(NEQ (CAR |outputs|)
'X)
(|fetch| (MI |NextInstB|)
|of| (CAR |outputs|)))
8 NIL NIL 'X))
(TERPRI |stream|)
(BLOCK))))
(|if| (NEQ |stream| T)
|then| (PRINTOUT |stream| "." T)
(CLOSEF |stream|)))))
(|SaveLastVectors|
(LAMBDA (|xout| |stream|) (* \; "Edited 8-Oct-87 17:41 by Krivacic")
(DECLARE (GLOBALVARS *LASTSECTION*))
(|if| (GREATERP (LENGTH (CAR (GETPROP *LASTSECTION* '|Vectors|)))
2)
|then| (|for| \i |from| 1 |to| (OR |xout| (SELECTQ *LASTSECTION*
(|AddrSel| 15)
(|RegMux| 30)
(|MemCtl| 15)
10))
|do| (|XVector| (CAR (NTH (CAR (GETPROP *LASTSECTION* '|Vectors|))
\i))
NIL)))
(|SaveVectors| *LASTSECTION* |stream|)))
(|PrintWire|
(LAMBDA (|stream| |value| |size| |ucodeinfo| |ucodefields| |fillchar|)
(* \; "Edited 8-Oct-87 14:23 by Krivacic")
(DECLARE (GLOBALVARS |ucodesize|))
(|if| (NUMBERP |value|)
|then| (|PrintNum| |stream| |value| |size| |fillchar|)
|elseif| (TYPENAMEP |value| 'MI)
|then| (LET* (|ch| (|ucodebits| (|MakeUCodeBits| |value| |ucodeinfo| T))
(|ucodelist| (|for| |index| |from| 0 |as| |ptr| |in| |ucodebits|
|collect| (|if| (FMEMB |index| |ucodefields|)
|then| |ptr|
|else| 'X))))
(|PrintList| |stream| |ucodelist|))
|else| (|PrintNum| |stream| NIL |size| |fillchar|))
(PRIN1 " " |stream|)))
(|MakeSizes|
(LAMBDA (|names|) (* \; "Edited 4-Jun-87 16:17 by rtk")
(* |;;| "Return the number of Binary Digits This Wire Requires")
(|for| \i |in| |names|
|collect| (LET* ((|prop| (GETPROP \i '|ConcatSpec|))
(|concatspec| (CAR |prop|))
(|subdivide| (|if| (CADR |prop|)
|then| |prop|
|else| NIL))
(|recspec| (GETPROP \i '|RecSize|)))
(|if| (OR |concatspec| |recspec|)
|then| (|if| (AND (AND |concatspec| |recspec|)
(NEQ |concatspec| |recspec|))
|then| (PRINTOUT T "Non-Matching Sizes for " \i " RecSize "
|recspec| " ConcatSize " |concatspec|
" Value used:" (OR |subdivide| |concatspec|
|recspec|)
T))
(OR |subdivide| |concatspec| |recspec|)
|elseif| (OR (EQ \i 'M\i)
(EQ \i '|Mil|))
|then| 120
|else| 1)))))
(|PrintList|
(LAMBDA (|stream| |list|) (* \; "Edited 8-Oct-87 15:36 by Krivacic")
(DECLARE (GLOBALVARS *LASTVECTORSECTION* *SAVE-VECTORS-HEXDIGITS* *SAVE-VECTORS-NIBBLEVALUES*))
(LET (|sawx| |allxs| |value| (|nibblecount| 0)
(|outlist| |list|))
(SETQ |nibblecount| (SELECTQ (CL:MOD (LENGTH |outlist|)
4)
(1 3)
(2 2)
(3 1)
0))
(SETQ |sawx| NIL)
(SETQ |allxs| T)
(SETQ |value| 0)
(|if| |outlist|
|then| (|for| \i |in| |outlist|
|do| (|if| (EQ 0 |nibblecount|)
|then| (SETQ |nibblelist| NIL)
(SETQ |sawx| NIL)
(SETQ |allxs| T)
(SETQ |value| 0))
(SETQ |sawx| (OR |sawx| (EQ \i 'X)))
(SETQ |allxs| (AND |allxs| (EQ \i 'X)))
(SETA *SAVE-VECTORS-NIBBLEVALUES* |nibblecount| \i)
(|if| (NOT |sawx|)
|then| (SETQ |value| (LOGOR (LLSH |value| 1)
\i)))
(|if| (EQ 3 |nibblecount|)
|then| (SETQ |nibblecount| 0)
(|if| |allxs|
|then| (PRIN1 "X" |stream|)
|elseif| |sawx|
|then| (PRIN1 "(" |stream|)
(|for| \k |from| 0 |to| 3
|do| (PRIN1 (ELT *SAVE-VECTORS-NIBBLEVALUES* \k)
|stream|))
(PRIN1 ")" |stream|)
|else| (PRIN1 (ELT *SAVE-VECTORS-HEXDIGITS* |value|)
|stream|))
|else| (SETQ |nibblecount| (ADD1 |nibblecount|))))
|else| (PRIN1 "X" |stream|)))))
(|PrintNum|
(LAMBDA (|stream| |value| |size| |fillchar|) (* \; "Edited 8-Oct-87 15:50 by Krivacic")
(|if| (LISTP |size|)
|then| (LET* ((|fullwidth| (CAR |size|))
(|position| |fullwidth|))
(PRIN1 "(" |stream|)
(|for| |wwidth| |in| (CDR |size|)
|do| (LET ((|width| (|if| (LISTP |wwidth|)
|then| (CAR |wwidth|)
|else| |wwidth|)))
(PRIN1 " " |stream|)
(SETQ |position| (DIFFERENCE |position| |width|))
(|PrintNum| |stream| (AND |value| (LOADBYTE |value| |position|
|width|))
|wwidth| |fillchar|)))
(PRIN1 " )" |stream|))
|elseif| (NUMBERP |value|)
|then| (PRINTNUM (LIST 'FIX (LRSH (PLUS |size| 3)
2)
16 T)
|value| |stream|)
|else| (|PrintList| |stream| (|for| \i |from| 0 |to| (SUB1 |size|) |collect| 'X)))))
(|XOutputs|
(LAMBDA (|outputs|) (* \; "Edited 23-Jul-87 16:14 by Krivacic")
(DECLARE (GLOBALVARS *LASTSECTION*))
(|XVector| (CADR (GETPROP *LASTSECTION* '|Vectors|))
|outputs|)))
(|XVector|
(LAMBDA (|vector| |outputs|)
(DECLARE (GLOBALVARS *LASTSECTION*)) (* \; "Edited 4-Sep-87 14:12 by Krivacic")
(* |;;| "Replace the Outputs for the given vector.")
(* |;;| "If output is a list of names, just XX those entries,")
(* |;;| " Otherwise XX all of the Outputs")
(LET ((|outputnames| (CADAAR (GETPROP *LASTSECTION* '|Vectors|)))
(|lastoutput| (CADR |vector|)))
(|if| (NEQ |outputnames| (CADR |vector|))
|then| (RPLACD |vector|
(LIST (|if| (LISTP |outputs|)
|then| (|for| \i |in| |outputnames| |as| \j |in| |lastoutput|
|collect| (|if| (FMEMB \i |outputs|)
|then| NIL
|else| \j))
|else| (|for| \i |in| |outputnames| |collect| NIL))))))))
(|uProp|
(LAMBDA (|ucodefield| |fieldval|) (* \; "Edited 10-Jun-87 14:23 by Krivacic")
(CADR (FASSOC |fieldval| (GETPROP |ucodefield| '|uField|)))))
)
(* |;;;| "Whole Chip")
(DEFINEQ
(|SetupChipVectors|
(LAMBDA NIL (* \; "Edited 16-Oct-87 15:16 by Krivacic")
(PUTPROP '|WholeChip| '|Vectors|
(TCONC NIL '((|Clock| |Hold| |Reset| |Clock2| |Irq1| |Irq2| |XBus|)
(|HoldA| |EnbBufs| |CasEnable| |RasEnable| |Mil-WriteTags| |Mil-WriteData|
|WriteCycle| |PhyAddr| |XBus| |IrqOut|))))))
(|ChipVectors|
(LAMBDA NIL (* \; "Edited 16-Oct-87 15:15 by Krivacic")
(|DefSection|
((|Accessables| (|Clocks| |Hold| |Reset| |Irq1| |Irq2| |XBus| |HoldA| |EnbBufs| |CasEnable|
|RasEnable| |WriteCycle| |PhyAddr| |IrqOut| M\i |Mil|))
(|Mil| (|WriteTags| |WriteData|))
(M\i (|WriteTags| |WriteData|))
(|Code|
((DECLARE (GLOBALVARS *LASTVECTORSECTION* *LASTSECTION* *CHIP-SAVE-MODE* *SAVED-INPUT-VECTORS*
*SAVED-LAST-CYCLE* *SAVED-INPUT-VECTORS-NO-RESET* *LAST-RESET* |Cycles|))
(|if| (NOT (BOUNDP '*SAVED-LAST-CYCLE*))
|then| (SETQ *SAVED-LAST-CYCLE* (ARRAY 4 'POINTER NIL 0)))
(|if| (NOT (BOUNDP '*LAST-RESET*))
|then| (SETQ *LAST-RESET* 0))
(LET (|outputs| |drivex| |clockstate|)
(SELECTQ *CHIP-SAVE-MODE*
(|Inputs| (|if| (TF (LAND |Clock| |Clock2| *LAST-RESET* (LNOT |Reset|)))
|then| (|for| |extracycles| |from| 0 |to| 0
|do| (|for| |clockindex| |from| 0 |to| 3
|do| (PUTPROP '|WholeChip| '|Vectors|
(TCONC (GETPROP '|WholeChip|
'|Vectors|)
(ELT *SAVED-LAST-CYCLE*
|clockindex|))))))
(SETQ |drivex| (|if| (TF (LAND |Clock| |Clock2|))
|then| (LNOR |Mi-WriteTags| |Mi-WriteData|)
|else| (LNOT |WriteCycle|)))
(SETQ *SAVED-INPUT-VECTORS*
(APPEND (|for| |ins| |in| (LIST |Clock| |Hold| |Reset| |Clock2| |Irq1|
|Irq2|) |collect| |ins|)
(LIST (|if| (TF |drivex|)
|then| |XBus|
|else| NIL))))
(|if| (TF |Reset|)
|then| (SETQ *SAVED-INPUT-VECTORS-NO-RESET*
(|for| |ins|
|in| (LIST |Clock| |Hold| 0 |Clock2| |Irq1| |Irq2| |XBus|)
|collect| |ins|))))
(|Outputs| (SETQ |outputs|
(APPEND (|for| |outs|
|in| (LIST |HoldA| |EnbBufs| |CasEnable| |RasEnable|
|Mil-WriteTags| |Mil-WriteData| |WriteCycle|
|PhyAddr|)
|collect| (|if| (TF (LOR |Reset| *LAST-RESET*))
|then| NIL
|else| |outs|))
(LIST (|if| (TF (LOR |Reset| *LAST-RESET* |Clock| (LNOT
|WriteCycle|
)))
|then| NIL
|else| |XBus|))
(LIST (|if| (GREATERP |Cycles| 8)
|then| |IrqOut|
|else| NIL))))
(SETQ |clockstate| (|ConcatBits| '(((|Not| |Clock|)
1 1 0)
((|Not| |Clock2|)
0 1 0))))
(|if| (TF |Reset|)
|then| (SETA *SAVED-LAST-CYCLE* |clockstate| (LIST
*SAVED-INPUT-VECTORS-NO-RESET*
|outputs|)))
(PUTPROP '|WholeChip| '|Vectors| (TCONC (GETPROP '|WholeChip|
'|Vectors|)
(LIST *SAVED-INPUT-VECTORS*
|outputs|))))
NIL))
(SETQ *LAST-RESET* |Reset|)))))))
)
(* |;;;| "UCode")
(DEFINEQ
(|MakeUCodeVectors|
(LAMBDA (|length| |addrsonly|) (* \; "Edited 16-Sep-87 11:34 by Krivacic")
(PRINTOUT T "Making UCode Vectors of ")
(|if| |addrsonly|
|then| (PRINTOUT T "NextInstA & NextInstB only" T)
(PUTPROP '|UCode| '|MiFields| '(|NextInstA| |NextInstB|))
(PUTPROP '|UCode| '|MilFields| '(|NextInstA| |NextInstB|))
|else| (PRINTOUT T "All Fields" T)
(REMPROP '|UCode| '|MiFields|)
(REMPROP '|UCode| '|MilFields|))
(|NodelessSetup| T)
(|SetVal| 1 LATCHING)
(|SetVal| |NilMir| MIL)
(|SetVal| |NilMir| MI)
(|UCodeTestCycle| 1 0 0 1 13 T)
(|UCodeTestCycle| 1 0 0 1 13 T)
(|for| \i |from| 0 |to| (OR |length| 4) |do| (|UCodeTestCycle| 1 \i 0 1 13)
(|UCodeTestCycle| 1 \i 0 1 14)
(|UCodeTestCycle| 1 0 \i 1 11)
(|UCodeTestCycle| 1 1 1 1 7)
(|UCodeTestCycle| 1 \i 0 0 14))))
(|UCodeTestCycle|
(LAMBDA (|nstall| |newopcode| |precondaddr| |selanb| |nucodesel| |nocheck|)
(* \; "Edited 6-Jul-87 13:33 by Krivacic")
(|TestUCode| |nstall| |newopcode| |precondaddr| |selanb| |nucodesel|
(|MakeClocksVal| 0 0 0 0 T))
(|if| |nocheck|
|then| (|XOutputs|))
(|TestUCode| |nstall| |newopcode| |precondaddr| |selanb| |nucodesel|
(|MakeClocksVal| 1 1 0 0 T))
(|if| |nocheck|
|then| (|XOutputs|))
(|TestUCode| |nstall| |newopcode| |precondaddr| |selanb| |nucodesel|
(|MakeClocksVal| 0 1 0 0 T))
(|if| |nocheck|
|then| (|XOutputs|))
(|TestUCode| |nstall| |newopcode| |precondaddr| |selanb| |nucodesel|
(|MakeClocksVal| 1 0 0 0 T))
(|if| |nocheck|
|then| (|XOutputs|))))
)
(* |;;;| "Data Path")
(DEFINEQ
(|MakeSpecRegVectors|
(LAMBDA NIL (* \; "Edited 11-Sep-87 15:29 by Krivacic")
(DECLARE (GLOBALVARS *LASTSECTION*))
(SETQ *LASTSECTION* '|SpecialRegs|)
(|NodelessSetup| T)
(|SetVal| 1 LATCHING)
(|TestSpecialRegs| 0 0 (|MakeClocksVal| 0 0 0 0)
0 0 0)
(|TestSpecialRegs| 0 0 (|MakeClocksVal| 0 0 0 0)
(|uProp| '|rd1addr| '|Nil|)
0 0)
(|TestSpecialRegs| 0 0 (|MakeClocksVal| 0 0 0 0)
(|uProp| '|rd1addr| '|Zero|)
0 0)
(|TestSpecialRegs| 0 0 (|MakeClocksVal| 0 0 0 0)
(|uProp| '|rd2addr| '|Zero|)
0 0)
(|TestSpecialRegs| 0 0 (|MakeClocksVal| 0 0 0 0)
(|uProp| '|rd2addr| '|Nil|)
0 0)
(|TestSpecialRegs| 0 0 (|MakeClocksVal| 0 0 0 0 T)
(|uProp| '|rd2addr| '|Unbound|)
0 0)
(|TestSpecialRegs| 4 0 (|MakeClocksVal| 0 0 1 0 T)
0 0 (|uProp| '|w2addr| '|Temp1|))
(|TestSpecialRegs| 4 0 (|MakeClocksVal| 1 1 1 0 T)
0 0 (|uProp| '|w2addr| '|Temp1|))
(|TestSpecialRegs| 0 0 (|MakeClocksVal| 0 0 0 0 T)
(|uProp| '|rd1addr| '|Temp1|)
0 0)
(|TestSpecialRegs| 0 0 (|MakeClocksVal| 0 0 0 0 T)
0
(|uProp| '|rd2addr| '|Temp1|)
0)
(|TestSpecialRegs| 0 1 (|MakeClocksVal| 0 0 0 0 T)
0
(|uProp| '|rd2addr| '|MuxBus|)
0)
(|TestSpecialRegs| 0 2 (|MakeClocksVal| 0 0 0 0 T)
(|uProp| '|rd1addr| '|MuxBus|)
0 0)
(|SaveVectors| *LASTSECTION*)))
)
(DEFINEQ
(|MakeEUVectors|
(LAMBDA NIL (* \; "Edited 28-Oct-87 09:59 by Krivacic")
(|NodelessSetup| T)
(|SetVal| 1 LATCHING)
(SETQ *LASTVECTORSECTION* '|ExecutionUnits|)
(|TestExecutionUnits| 1 2 0 (|EUProp| '+)
0
(|uProp| '|tag| '|Int|))
(|for| |muxbus| |from| 0 |to| 32 |do| (|TestExecutionUnits| 0 1515890085 |muxbus|
(|EUProp| '|Shift|)
0
(|uProp| '|tag| '|Int|))
(|TestExecutionUnits| 1515890085 0 |muxbus|
(|EUProp| '|Shift|)
0
(|uProp| '|tag| '|Int|)))
(|for| |muxbus| |from| -32 |to| 0 |do| (|TestExecutionUnits| 0 1515890085
(|ConcatBits| '((|muxbus| 0 8 0)))
(|EUProp| '|Shift|)
0
(|uProp| '|tag| '|Int|))
(|TestExecutionUnits| 1515890085 0
(|ConcatBits| '((|muxbus| 0 8 0)))
(|EUProp| '|Shift|)
0
(|uProp| '|tag| '|Int|)))
(|for| |ccode| |in| '(1 2 3) |do| (|TestExecutionUnits| 1 2147483647 0 (|EUProp| '+)
|ccode|
(|uProp| '|tag| '|Int|))
(|TestExecutionUnits| 1 2147483646 0 (|EUProp| '+)
|ccode|
(|uProp| '|tag| '|Int|))
(|TestExecutionUnits| 2147483647 0 0 (|EUProp| '+)
|ccode|
(|uProp| '|tag| '|Int|))
(|TestExecutionUnits| -1 2147483647 0 (|EUProp| '+)
|ccode|
(|uProp| '|tag| '|Int|))
(|TestExecutionUnits| -1 2147483648 0 (|EUProp| '+)
|ccode|
(|uProp| '|tag| '|Int|))
(|TestExecutionUnits| 2147483648 1 0 (|EUProp| '+)
|ccode|
(|uProp| '|tag| '|Int|)))
(|for| |ccode| |in| '(1 2 3) |do| (|TestExecutionUnits| 1 2147483647 0 (|EUProp| '-)
|ccode|
(|uProp| '|tag| '|Int|))
(|TestExecutionUnits| 2147483647 1 0 (|EUProp| '-)
|ccode|
(|uProp| '|tag| '|Int|))
(|TestExecutionUnits| 2147483648 0 0 (|EUProp| '-)
|ccode|
(|uProp| '|tag| '|Int|))
(|TestExecutionUnits| -1 2147483647 0 (|EUProp| '-)
|ccode|
(|uProp| '|tag| '|Int|))
(|TestExecutionUnits| 2147483648 -1 0 (|EUProp| '-)
|ccode|
(|uProp| '|tag| '|Int|))
(|TestExecutionUnits| 2147483648 1 0 (|EUProp| '-)
|ccode|
(|uProp| '|tag| '|Int|)))
(|TestExecutionUnits| 1 2 0 (|EUProp| '+)
0
(|uProp| '|tag| '|Int|))
(|TestExecutionUnits| 1 2 0 (|EUProp| '+)
0
(|uProp| '|tag| '|Int|))
(|TestExecutionUnits| 2 2 1 (|EUProp| '+)
0
(|uProp| '|tag| '|Int|))
(|TestExecutionUnits| 2 1 2 (|EUProp| '-)
0
(|uProp| '|tag| '|Int|))
(|TestExecutionUnits| 2 1 3 (|EUProp| '|Diff1s|)
0
(|uProp| '|tag| '|Int|))
(|TestExecutionUnits| 1 2 3 (|EUProp| '-)
0
(|uProp| '|tag| '|Int|))
(|TestExecutionUnits| 2 1 4 (|EUProp| '|Shift|)
0
(|uProp| '|tag| '|Int|))
(|TestExecutionUnits| 1 2 5 (|EUProp| '|Shift|)
0
(|uProp| '|tag| '|Int|))
(|TestExecutionUnits| (|TamRep| '|Unbound|)
1 6 (|EUProp| '|Priority|)
0
(|uProp| '|tag| '|Int|))
(|TestExecutionUnits| 4096 1 7 (|EUProp| '|Priority|)
0
(|uProp| '|tag| '|Int|))
(|TestExecutionUnits| (|TamRep| '|Atm|)
(|TamRep| '|Imm|)
8
(|EUProp| '|TypeBits|)
0
(|uProp| '|tag| 'D2))
(|TestExecutionUnits| (|TamRep| '|Int| 15)
(|TamTagRep| '|Imm|)
9
(|EUProp| '|MergeSubtype|)
0
(|uProp| '|tag| '|LowD2Tag|))
(|TestExecutionUnits| 2 3 4 (|EUProp| '|And|)
0
(|uProp| '|tag| '|Int|))
(|TestExecutionUnits| 2 1 5 (|EUProp| '|Xor|)
0
(|uProp| '|tag| '|Int|))
(|TestExecutionUnits| 2 1 6 (|EUProp| 'O\r)
0
(|uProp| '|tag| '|Int|))
(|TestExecutionUnits| (|TamRep| '|Unbound|)
(|TamRep| '|Atm|)
7
(|EUProp| 'D1)
0
(|uProp| '|tag| 'D2))
(|TestExecutionUnits| (|TamRep| '|Unbound|)
(|TamRep| '|Atm|)
8
(|EUProp| 'D2)
0
(|uProp| '|tag| 'D1))
(|SaveVectors|)))
(|EUProp|
(LAMBDA (|field|) (* \; "Edited 10-Jun-87 14:24 by Krivacic")
(|uProp| '|euop| |field|)))
(|MakeDpCcVectors|
(LAMBDA NIL (* \; "Edited 24-Aug-87 14:48 by Krivacic")
(|NodelessSetup| T)
(|SetVal| 1 LATCHING)
(|TestDpCc| (|TamRep| '|Float| 2)
0 0 (|DPProp| '|FloatP|))
(|TestDpCc| (|TamRep| '|Int| 6)
0 1 (|DPProp| '|FixP|))
(|TestDpCc| (|TamRep| '|Ptr| 6)
0 2 (|DPProp| '|PointerP|))
(|TestDpCc| (|TamRep| '|Code| 6)
0 3 (|DPProp| '|CCodeP|))
(|TestDpCc| (|TamRep| '|List| 6)
0 4 (|DPProp| '|ConsP|))
(|TestDpCc| (|TamRep| '|Int| 6)
0 5 (|DPProp| '|PosFixP|))
(|TestDpCc| (|TamRep| '|Int| -1)
0 6 (|DPProp| '|PosFixP|))
(|TestDpCc| (|TamRep| '|Unbound| 6)
0 7 (|DPProp| '|UnboundP|))
(|TestDpCc| (|TamRep| '|LastStack| 5)
0 8 (|DPProp| '|LastStackP|))
(|TestDpCc| 0 (|TamRep| '|Ptr| 5)
9
(|DPProp| '|PointerPD2|))
(|TestDpCc| (|TamRep| '|Int| -1)
(|TamRep| '|Int| 3)
10
(|DPProp| '|FixPD1D2|))
(|TestDpCc| (|TamRep| '|Int| -1)
(|TamRep| '|Ptr| 5)
11
(|DPProp| '|FixPD1PointerPD2|))
(|TestDpCc| (|TamRep| '|Int| -1)
(|TamRep| '|Float| 5)
12
(|DPProp| '|BothFixorFloatPD1D2|))
(|TestDpCc| (|TamRep| '|Imm| 3)
(|TamRep| '|Imm| 5)
13
(|DPProp| '|ImmediateP|))
(|TestDpCc| (|TamRep| '|Symbol| 3)
(|TamRep| '|Symbol| 5)
14
(|DPProp| '|SymbolP|))))
(|DPProp|
(LAMBDA (|field|) (* \; "Edited 10-Jun-87 14:24 by Krivacic")
(|uProp| '|dpccode| |field|)))
)
(DEFINEQ
(|SaveRegMuxVectors|
(LAMBDA NIL (* \; "Edited 2-Sep-87 18:45 by Krivacic")
(* |;;;| "Save RegMux Vectors stored from execution. (after clearing out 1st n vectors")
(|if| (GREATERP (LENGTH (CAR (GETPROP *LASTSECTION* '|Vectors|)))
2)
|then| (|for| \i |from| 1 |to| 30
|do| (|XVector| (CAR (NTH (CAR (GETPROP *LASTSECTION* '|Vectors|))
\i))
NIL)))
(|SaveVectors| '|RegMux|)))
)
(* |;;;| "Register File")
(DEFINEQ
(|MakeRegisterFileVectors|
(LAMBDA NIL (* \; "Edited 28-Sep-87 14:27 by Krivacic")
(SETQ *LASTVECTORSECTION* '|RegisterFile|)
(DECLARE (GLOBALVARS |*lastrbus*|))
(SETQ |*lastrbus*| 0)
(|for| \i |from| 0 |to| (SUB1 (ARRAYSIZE |RegFile|)) |do| (SETA |RegFile| \i (PLUS 100 \i)))
(|NodelessSetup| T)
(SETQ |DoSimLog| NIL)
(|SetVal| 1 LATCHING)
(SETQ |Reset| 0)
(LET ((\d1 0)
(|nd1| 1)
(\d2 0)
(|nd2| 1))
(|RegCycle| 0 0 0 1 1 |nd1| |nd2| 0 1 1 T)
(|RegCycle| 0 1 1 1 1 \d1 |nd2| 0 1 0)
(|RegCycle| 1 2 2 1 1 \d1 \d2 0 1 0)
(* |;;| "write all of 1st bank")
(|for| \i |from| 0 |to| 7
|do| (|RegCycle| 0 \i \i 1 1 1 \d1 |nd2| 1 0 0))
(* |;;| " write 2nd bank")
(* |;;| " test 1st bank, no dswap")
(|for| \i |from| 0 |to| 7 |do| (|RegCycle| \i 0 0 0 0 \d1 (|if| (NEQ \i 0)
|then| \d2
|else| |nd2|)
0 0 0))
(* |;;| "test 1st bank, with dswap")
(|for| \i |from| 0 |to| 7 |do| (|RegCycle| \i 0 0 0 0 (|if| (NEQ \i 0)
|then| \d1
|else| |nd1|)
\d2 1 0 0))
(* |;;| "save the vectors")
(|SaveVectors|))))
(|RegCycle|
(LAMBDA (|readregaddr| |writeregaddr| |rbus| |writeok| |writeback| |rd1addr| |rd2addr| |dswap|
|waddr| |writeoctal| |firsttime|) (* \; "Edited 28-Sep-87 14:05 by Krivacic")
(SETQ |cxt| 0)
(* |;;| " clocks 0 0, setup read regaddr so it can latch, turn off writeok")
(DECLARE (GLOBALVARS |*lastrbus*| |*lastwaddr*|))
(|if| (NULL |firsttime|)
|then| (|TestRegisterFile| |*lastrbus*| 0 |readregaddr| |cxt| (|MakeClocksVal| 0 0 |writeok|
0 T)
|rd1addr| |rd2addr| |dswap| |*lastwaddr*| 0)
(|XOutputs|))
(* |;;| "read addr latched on clocks 1 1")
(|SetVal| 1 LATCHING)
(|TestRegisterFile| |*lastrbus*| 0 |readregaddr| |cxt| (|MakeClocksVal| 1 1 1 0 T)
|rd1addr| |rd2addr| |dswap| |waddr| |writeoctal|)
(|if| |firsttime|
|then| (|XOutputs|))
(SETQ |*lastrbus*| |rbus|)
(SETQ |*lastwaddr*| |waddr|)
(* |;;| "clocks 01")
(|SetVal| 0 LATCHING)
(|TestRegisterFile| |rbus| 0 |writeregaddr| |cxt| (|MakeClocksVal| 0 1 0 0 T)
|rd1addr| |rd2addr| |dswap| |waddr| |writeoctal|)
(|if| |firsttime|
|then| (|XOutputs|))
(* |;;| "clocks 10, write addr latched")
(|SetVal| 1 LATCHING)
(|TestRegisterFile| |rbus| |writeok| |writeregaddr| |cxt| (|MakeClocksVal| 1 0 |writeok| 0 T)
|rd1addr| |rd2addr| |dswap| |waddr| |writeoctal|)
(|if| |firsttime|
|then| (|XOutputs|))
(* |;;| "clocks 00, allow writeback")
(|SetVal| 0 LATCHING)
(|TestRegisterFile| |rbus| |writeok| 0 0 (|MakeClocksVal| 0 0 |writeok| 0 T)
|rd1addr| |rd2addr| |dswap| |waddr| |writeoctal|)
(|if| |firsttime|
|then| (|XOutputs|))))
)
(* |;;;| "MemPath")
(DEFINEQ
(|MakeIBufLogicVectors|
(LAMBDA (|limit|) (* \; "Edited 9-Sep-87 15:49 by Krivacic")
(|NodelessSetup| T)
(SETQ |DoSimLog| NIL)
(|SetVal| 1 LATCHING)
(SETQ |Reset| 0)
(|WriteIBufWord| 0 67305985 T)
(|WriteIBufWord| 1 134678021 T)
(|WriteIBufWord| 2 202050057)
(|WriteIBufWord| 3 986637)
(|WriteIBufWord| 4 336794129)
(|WriteIBufWord| 5 404166165)
(|WriteIBufWord| 6 471538201)
(|WriteIBufWord| 7 270474781)
(|bind| (|opln| ← 0) |for| \i |from| 0 |to| (OR |limit| 31)
|do| (SETQ |opln| (|if| (EQ |opln| 3)
|then| 0
|else| (ADD1 |opln|)))
(|ReadIBuf| \i (LOGAND (PLUS (LRSH \i 2)
2)
3)
|opln|))
(|SaveVectors|)))
(|WriteIBufWord|
(LAMBDA (|wraddr| |ibufvalue| |x-outputs|) (* \; "Edited 4-Sep-87 14:17 by Krivacic")
(|TestIBufLogic| 0 |wraddr| 0 0 0 (|MakeClocksVal| 1 1 0 0 0)
0)
(|if| |x-outputs|
|then| (|XOutputs| '(|NewIBufN| |NewOpcode|)))
(|TestIBufLogic| 0 |wraddr| 0 0 0 (|MakeClocksVal| 1 0 0 0 0)
0)
(|if| |x-outputs|
|then| (|XOutputs| '(|NewIBufN| |NewOpcode|)))
(|TestIBufLogic| |ibufvalue| |wraddr| 0 1 0 (|MakeClocksVal| 0 0 0 0 0)
0)
(|if| |x-outputs|
|then| (|XOutputs| '(|NewIBufN| |NewOpcode|)))
(|SetVal| 0 LATCHING)
(|TestIBufLogic| |ibufvalue| |wraddr| 0 0 0 (|MakeClocksVal| 0 0 0 0 0)
0)
(|if| |x-outputs|
|then| (|XOutputs| '(|NewIBufN| |NewOpcode|)))
(|SetVal| 1 LATCHING)))
(|ReadIBuf|
(LAMBDA (|rdaddr| |wraddr| |oplength|) (* \; "Edited 9-Sep-87 15:50 by Krivacic")
(|SetVal| 0 LATCHING)
(|TestIBufLogic| 0 |wraddr| |rdaddr| 0 1 (|MakeClocksVal| 0 0 0 1 0)
(LOGOR 4 |oplength|))
(|XOutputs| '(|D1Bus|))
(|SetVal| 1 LATCHING)
(|TestIBufLogic| 0 |wraddr| |rdaddr| 0 1 (|MakeClocksVal| 1 1 0 1 0)
(LOGOR 4 |oplength|))
(|TestIBufLogic| 0 |wraddr| |rdaddr| 0 0 (|MakeClocksVal| 1 0 0 1 0)
(LOGOR 4 |oplength|))))
)
(DEFINEQ
(|MakePcLogicVectors|
(LAMBDA NIL (* \; "Edited 27-Aug-87 12:19 by Krivacic")
(|NodelessSetup| T)
(SETQ |DoSimLog| NIL)
(|SetVal| 1 LATCHING)
(SETQ |Reset| 0)
(|WriteThePc| 2048 0 NIL)
(|WriteThePc| 0 2 T)
(|for| \i |from| 0 |to| 5 |do| (|ReadThePc| 0 \i))
(|for| \i |from| 0 |to| 5 |do| (|ReadThePc| 1 \i))))
(|WriteThePc|
(LAMBDA (\d1 |muxbus| |usemux|) (* \; "Edited 11-Sep-87 13:07 by Krivacic")
(LET ((|pcsource| (|if| |usemux|
|then| 2
|else| 3)))
(|TestPcLogic| \d1 |muxbus| 1 0 0 (|MakeClocksVal| 0 0 1 0 T)
4 |pcsource|)
(|XOutputs|)
(|TestPcLogic| \d1 |muxbus| 1 0 0 (|MakeClocksVal| 1 1 1 0 T)
4 |pcsource|)
(|XOutputs|)
(|TestPcLogic| \d1 |muxbus| 1 0 0 (|MakeClocksVal| 0 1 1 0 T)
4 |pcsource|)
(|XOutputs|)
(|TestPcLogic| \d1 |muxbus| 1 0 0 (|MakeClocksVal| 1 0 1 0 T)
4 |pcsource|)
(|XOutputs|)
(|TestPcLogic| \d1 |muxbus| 1 0 0 (|MakeClocksVal| 0 0 1 0 T)
4 |pcsource|)
(|XOutputs|)
(|TestPcLogic| \d1 |muxbus| 1 0 0 (|MakeClocksVal| 1 1 1 0 T)
4 |pcsource|)
(|XOutputs|))))
(|ReadThePc|
(LAMBDA (|done| |oplength|) (* \; "Edited 11-Sep-87 13:08 by Krivacic")
(LET ((|rd2addr| 7))
(* |;;| "1st Latch the oplength (↑OpLength)")
(|SetVal| 0 LATCHING)
(|TestPcLogic| 0 0 1 0 |oplength| (|MakeClocksVal| 0 0 1 |done| T)
0 0)
(|SetVal| 1 LATCHING)
(* |;;| "Now clock through the Read Cycle")
(|TestPcLogic| 0 0 1 0 |oplength| (|MakeClocksVal| 1 1 1 |done| T)
|rd2addr| 0)
(|TestPcLogic| 0 0 1 0 |oplength| (|MakeClocksVal| 1 0 0 |done| T)
|rd2addr| 0))))
)
(DEFINEQ
(|MakeAddrSelVectors|
(LAMBDA NIL (* \; "Edited 11-Sep-87 10:02 by Krivacic")
(SETQ |DoSimLog| NIL)
(|SetVal| 1 LATCHING)
(SETQ |Reset| 0)
(|NodelessSetup| T)
(DESTRUCTURING-BIND (|MemOffset-K2| |MemOffset-MuxBus|)
(|for| \i |in| (GETPROP '|memoffset| '|uField|) |collect| (CADR \i))
(DESTRUCTURING-BIND (|MemOp-Pc| |MemOp-Map| |MemOp-Ras| |MemOp-Cas|)
(|for| \i |in| (GETPROP '|memop| '|uField|) |collect| (CADR \i))
(DESTRUCTURING-BIND (|MemLatch-PhysAddr| |MemLatch-InxPhysAddr| |MemLatch-MapAddr|)
(|for| \i |in| (GETPROP '|memlatchsrc| '|uField|) |collect| (CADR \i))
(DESTRUCTURING-BIND (|PhysAddrSrc-FetchPc| |PhysAddrSrc-PhysAddr|)
(|for| \i |in| (GETPROP '|physaddrsrc| '|uField|)
|collect| (CADR \i))
(* |;;| "Test the Fetch Pc")
))))))
)
(* |;;| " Control")
(DEFINEQ
(|MakeUCodeCtlVectors|
(LAMBDA NIL (* \; "Edited 8-Oct-87 18:25 by Krivacic")
(|NodelessSetup| T)
(SETQ |DoSimLog| NIL)
(|SetVal| 1 LATCHING)
(SETQ |Reset| 0)
(SETQ *LASTVECTORSECTION* '|UCodeCtl|)
(|for| |preconds| |in| '(0 32 64 128 192 96)
|do|
(|for| |invertcc| |in| '(0 1)
|do|
(|for| |done| |in| '(0 1)
|do|
(|for| |wt| |in| (|if| (FMEMB |preconds| '(0 1))
|then| '(1 0 1 0)
|else| '(0 1)) |as| |wf|
|in| (|if| (FMEMB |preconds| '(0 1))
|then| '(1 0 0 1)
|else| '(0 1))
|do|
(|for| |nAbort| |in| '(1 0)
|do| (|for| |forcedone| |in| (|if| (FMEMB |preconds| '(0 1))
|then| '(0 1)
|else| '(0))
|do| (|TestUCodeCtl| 1 1 1 1 1 1 1 60 |preconds| |nAbort| |invertcc| 0
|wt| |wf| |done| |forcedone|)
(|TestUCodeCtl| 0 0 0 0 0 0 0 133 |preconds| |nAbort| |invertcc| 0
|wt| |wf| |done| |forcedone|)
(|if| (EQ 0 |preconds|)
|then| (|if| (TF (LAND |wt| |wf| |nAbort| |done| (LNOT |invertcc|
)
(LNOT |forcedone|)))
|then| (|for| |muxccode|
|in| '(0 1 2 3 4 5 6 7)
|do| (|TestUCodeCtl| 0 0 0 0 1 1 1 61
|preconds| |nAbort| |invertcc|
|muxccode| |wt| |wf| |done|
|forcedone|)
(|TestUCodeCtl| 1 1 1 1 1 1 1 61
|preconds| |nAbort| |invertcc|
|muxccode| |wt| |wf| |done|
|forcedone|)
(|TestUCodeCtl| 0 1 1 1 1 1 1 61
|preconds| |nAbort| |invertcc|
|muxccode| |wt| |wf| |done|
|forcedone|)
(|TestUCodeCtl| 1 0 1 1 1 1 1 61
|preconds| |nAbort| |invertcc|
|muxccode| |wt| |wf| |done|
|forcedone|)
(|TestUCodeCtl| 1 1 0 1 1 1 1 61
|preconds| |nAbort| |invertcc|
|muxccode| |wt| |wf| |done|
|forcedone|)
(|TestUCodeCtl| 1 1 1 0 1 1 1 61
|preconds| |nAbort| |invertcc|
|muxccode| |wt| |wf| |done|
|forcedone|)))
(|TestUCodeCtl| 0 0 0 0 1 1 1 61 |preconds| |nAbort|
|invertcc| 0 |wt| |wf| |done| |forcedone|)
(|TestUCodeCtl| 1 1 1 1 0 1 1 62 |preconds| |nAbort|
|invertcc| 0 |wt| |wf| |done| |forcedone|)
(|TestUCodeCtl| 1 1 1 1 1 0 1 128 |preconds| |nAbort|
|invertcc| 0 |wt| |wf| |done| |forcedone|)
(|TestUCodeCtl| 1 1 1 1 1 1 0 133 |preconds| |nAbort|
|invertcc| 0 |wt| |wf| |done| |forcedone|))))))))
(|SaveVectors| '|UCodeCtl|)))
(|MakeContextVectors|
(LAMBDA NIL (* \; "Edited 7-Oct-87 17:39 by Krivacic")
(DECLARE (GLOBALVARS *LASTSECTION*))
(SETQ *LASTSECTION* '|Context|)
(|NodelessSetup| T)
(SETQ |DoSimLog| NIL)
(|SetVal| 1 LATCHING)
(SETQ |Reset| 0)
(SETQ |*lastwcxt*| 0)
(SETQ |*lastnewtopcxt*| 0)
(SETQ |*lastnewbotcxt*| 0)
(SETQ |*lastwriteok*| 0)
(* |;;| "Clear all of the contexts")
(|SetContext| 1 1 (CADR (FASSOC 'K (GETPROP '|altcxt| '|uField|)))
0 1 1 1 1)
(|SetContext| 1 1 (CADR (FASSOC 'K (GETPROP '|altcxt| '|uField|)))
0 1 1 1 1)
(* |;;| "Test Read & Write = Top")
(|SetContext| 0 0 (CADR (FASSOC 'K (GETPROP '|altcxt| '|uField|)))
0 0 0 1)
(|for| \i |in| '(0 1 2 3) |do| (|SetContext| 0 0 (CADR (FASSOC 'K (GETPROP '|altcxt| '|uField|)))
\i 1 0 1))
(* |;;| " Test Read & Write = Bot")
(|SetContext| 1 1 (CADR (FASSOC '|Bot| (GETPROP '|altcxt| '|uField|)))
0 0 0 1)
(|for| \i |in| '(0 1 2 3) |do| (|SetContext| 1 1 (CADR (FASSOC '|Bot| (GETPROP '|altcxt|
'|uField|)))
\i 0 1 1))
(* |;;| "Test Read = Alt Write = Top and Read = Top Write = Alt")
(|for| \i |in| '(0 1 2 3 4 5 6 7) |do| (|SetContext| 1 0 \i 0 0 0 1)
(|SetContext| 0 1 \i 1 0 0 1)
(|SetContext| 0 0 \i 2 (OZ (NEQ \i 7))
0 1)
(|SetContext| 0 0 \i 3 0 (OZ (NEQ \i 7))
1)
(|SetContext| 1 1 \i 1 0 0 1)
(|SetContext| 1 0 \i 0 0 0 0)
(|SetContext| 0 1 \i 1 0 0 0)
(|SetContext| 0 0 \i 3 1 0 0)
(|SetContext| 0 0 \i 2 0 1 0))
(|SaveVectors| *LASTSECTION*)))
(|SetContext|
(LAMBDA (|rcxt| |wcxt| |altcxt| \k |newtopcxt| |newbotcxt| |writeok| |nocheck|)
(* \; "Edited 7-Oct-87 18:15 by Krivacic")
(DECLARE (GLOBALVARS |*lastwcxt*| |*lastnewtopcxt*| |*lastnewbotcxt*| |*lastwriteok*|))
(|TestContext| |*lastwriteok*| 0 |altcxt| |rcxt| \k |*lastwcxt*| |*lastnewtopcxt*|
|*lastnewbotcxt*|)
(|if| |nocheck|
|then| (|XOutputs|))
(|TestContext| |*lastwriteok*| 1 |altcxt| |rcxt| \k |wcxt| |newtopcxt| |newbotcxt|)
(|if| |nocheck|
|then| (|XOutputs|))
(SETQ |*lastwcxt*| |wcxt|)
(SETQ |*lastnewtopcxt*| |newtopcxt|)
(SETQ |*lastnewbotcxt*| |newbotcxt|)
(SETQ |*lastwriteok*| |writeok|)))
)
(PUTPROPS CEDARGENS COPYRIGHT ("Xerox Corporation" 1987))
(DECLARE\: DONTCOPY
(FILEMAP (NIL (2346 3885 (|MakeCedarDefs| 2356 . 3883)) (3886 12960 (|MakeUCodeInfo| 3896 . 6774) (
|PrintUCodeBits| 6776 . 7648) (|MakeUCodeBits| 7650 . 8884) (|MIFetch| 8886 . 12209) (
|MakeUCodeConsts| 12211 . 12958)) (12961 14090 (|MakeMemoryFile| 12971 . 14088)) (14091 16758 (
|MakeDpCCodeInfo| 14101 . 15478) (|MakeDpCCode| 15480 . 16275) (|DpCcEntry| 16277 . 16756)) (16759
19756 (|MakeSpecRegConstInfo| 16769 . 18030) (|MakeSpecRegConstD1| 18032 . 18879) (
|MakeSpecRegConstD2| 18881 . 19754)) (19757 23010 (|MakeDefnsInfo| 19767 . 22151) (|CedarSpecials|
22153 . 23008)) (23011 25763 (|GetLCFieldNames| 23021 . 23324) (|GetFieldNames| 23326 . 23618) (
|MakeFieldInfo| 23620 . 25113) (|MakePLType| 25115 . 25761)) (25764 26489 (|MakeString| 25774 . 26312)
(|ListToStr| 26314 . 26487)) (26544 43305 (|SaveVectors| 26554 . 34535) (|SaveLastVectors| 34537 .
35389) (|PrintWire| 35391 . 36374) (|MakeSizes| 36376 . 37893) (|PrintList| 37895 . 40368) (|PrintNum|
40370 . 41718) (|XOutputs| 41720 . 41975) (|XVector| 41977 . 43113) (|uProp| 43115 . 43303)) (43337
48781 (|SetupChipVectors| 43347 . 43772) (|ChipVectors| 43774 . 48779)) (48808 50895 (
|MakeUCodeVectors| 48818 . 49984) (|UCodeTestCycle| 49986 . 50893)) (50926 52583 (|MakeSpecRegVectors|
50936 . 52581)) (52584 61045 (|MakeEUVectors| 52594 . 59094) (|EUProp| 59096 . 59255) (
|MakeDpCcVectors| 59257 . 60879) (|DPProp| 60881 . 61043)) (61046 61655 (|SaveRegMuxVectors| 61056 .
61653)) (61690 65492 (|MakeRegisterFileVectors| 61700 . 63504) (|RegCycle| 63506 . 65490)) (65521
67905 (|MakeIBufLogicVectors| 65531 . 66490) (|WriteIBufWord| 66492 . 67372) (|ReadIBuf| 67374 . 67903
)) (67906 70046 (|MakePcLogicVectors| 67916 . 68363) (|WriteThePc| 68365 . 69377) (|ReadThePc| 69379
. 70044)) (70047 71164 (|MakeAddrSelVectors| 70057 . 71162)) (71193 79443 (|MakeUCodeCtlVectors|
71203 . 76253) (|MakeContextVectors| 76255 . 78654) (|SetContext| 78656 . 79441)))))
STOP