[eris]<purcell>memo>Tamarin.mc 8-Aug-85 1:27:05
Opcode Length Format PreCond StkAct Waddr← EUop R Raddr1 Raddr2 Cond NextI -K- Misc
----- ------ ------ ------- ------ ------ ---- - ------ ------ ---- ----- --- ----
(1) Constants =======================================================================================
SCn 1 : S'←S+1; <S'> ← <CON n> : :
SIC 2 A : S'←S+1; <S'> ← IB : :
SICX 3 AB : S'←S+1; <S'> ← IB : :
GCONST 5 ABCD : S'←S+1; <S'> ← IB : :
ACONST 3 Atom : S'←S+1; <S'> ← IB : :
COPY 1 : S'←S+1; <S'> ← <S> : :
POP 1 : S'←S-1; <S'> ← * <S-1> : :
(2) Variables ======================================================================================
VARn 1 n : S'←S+1; <S'> ← <n> : :
VARX 2 N : S'←S+1; <S'> ← <N> : :
VARM 2 A :% S'←S+1; <S'> ← @[ <'Fx> IB] : :
GVAR 3 'Val : S'←S+1; <S'> ← @[ * IB] : :
VARIX 2 N : S'←S+1; <S'> ← @[ <N>] DirectP elseUfn :
FVARn 1 n : S'←S+1; <S'> ← @[ <n>] BoundP elseUfn :
FVARX← 2 N : & W @[ * <N>]← <S> StackP elseUfn :
VARn← 1 n : <n> ← <S> : :
VARn←↑ 1 n : & S'←S-1; <n> ← <S> : :
VARX← 2 N : <N> ← <S> : :
(3) Stack ==========================================================================================
UNBIND 2 N : S'←N <S'> ← <S> : :
DUNBIND 2 N : S'←N <S'> ← <N> : :
(4) Arithmetic =====================================================================================
EQ 1 : S'←S-1; <S'> ← EQ <S> <S-1> : :
EQL 1 : S'←S-1; <S'> ← EQ <S> <S-1> EQL elseUfn :
GREATER 1 : S'←S-1; <S'> ← GT <S> <S-1> IntP2 elseUfn :
PLUS 1 : S'←S-1; <S'> ← PLUS <S> <S-1> IntP3 elseUfn :
DIFF 1 : S'←S-1; <S'> ← DIFF <S> <S-1> IntP3 elseUfn :
AND 1 : S'←S-1; <S'> ← AND <S> <S-1> IntP2 elseUfn :
OR 1 : S'←S-1; <S'> ← OR <S> <S-1> IntP2 elseUfn :
XOR 1 : S'←S-1; <S'> ← XOR <S> <S-1> IntP2 elseUfn :
(5) Memory =========================================================================================
GETPTR 2 A : <t1> ← PLUS <S> IB PtrP NextElseUfn K :
::: : <S> ← @[ <t1>] : :
PUTPTR 2 A : <t1> ← PLUS <S-1> IB PtrP NextElseUfn K :
::: : S'←S-1; <S> W @[ <t1>]← <S> : :
ADDBASE 1 : S'←S-1; <S'> ← PLUS <S> <S-1> IntP1 elseUfn :
(6) Lists/Types ====================================================================================
CAR 1 : <S> ← @[ <S>] ListP elseUfn :
CDR 1 : <S> ← @[ <S>] ListP elseUfn Bit31
LISTPn 1 : <S> ← NIL UListP elseCondStore
DTESTn 1 : <S> ← <S> <n>P elseUfn :
TYPEP 2 :% ← @[DTT(<S>)] : Next :
::: :% <S> ← NIL : ???
DTEST 2 A :% <t1> ← @[DTT(<S>)] : Next K :
::: :% Vbus ← DIFF <S> IB ALU=0 elseUfn :
(7) Control ========================================================================================
MVPREP 1 : <MVA> ← T : K :
MVADJ 2 N : S'←N; <S'> ← <N> N>=S elseUfn ClearMVF
MVRET 2 N MVA N>S Loaded <S'> ←* <S'> FastRet NextElseUfn Arg←N
MVRET 2 N ~MVA N>S Loaded S'←S+1; <S'> ← NIL FastRet elseUfn C← Prev
MVRET 2 N MVA ~N>S Loaded S'←S+1; <S'> ← <N> FastRet elseUfn C← Prev
MVRET 2 N ~MVA ~N>S Loaded S'←S+1; <S'> ← <A ← N> arg>=S DoneElseRpt C← Prev {%}
RET 1 Loaded S'←S+1; <S'> ← <S> FastRet elseUfn C← Prev
RETEI 1 Loaded <S'> ← <S'> FastRet elseUfn EnbInt C← Prev
PFAULT 0 Dumped S'←S+1; <S'> ← MAR? : GOTO[TRAP] K arg←1
UFN1n 1 Ufn,Op Dumped <K=2> ← @[ IB] : GOTO[call] K :
UFN2n 2 Ufn,Op Dumped <K=2> ← @[ IB] : GOTO[call] K :
UFN3n 3 Ufn,Op Dumped <K=2> ← @[ IB] : GOTO[call] K :
UFN5n 5 Ufn,Op Dumped <K=2> ← @[ IB] : GOTO[call] K :
APPLYFN 1 Dumped 'arg ← <S-1> : :
::: : <Code> ← @[ <'FnDef>,,<S>] AtomP=> GOTO[call] elseUfn
FNn 3 Def,AB Dumped <K=2> ← @[ IB] : Next Arg←n
call: :% <K=70> ← @4[ <'Code>] : Next {PC ← ,,arg}
::: :% <'All ← <'Unbind> : Next C← Next
::: : S'←S-1; <arg> ← <old S> arg=0 DoneElseRpt arg-1
DISINT 1 : NOP : DisInt
(8) Frames =========================================================================================
MYCLINK 1 Flush S'←S-1; <S'> ← <K=CLink> : :
MYLINK← 1 Flush <CLnk> ← <S> : :
REFRESH 0 : : : Next arg←0
::: : : : Next arg-1
::: : <arg> ← <arg> arg=0 elseRpt arg-1
DUMP 0 Dump : : arg←0
::: : & W@4[<'Free>,arg]← <arg> arg>TOS NextElseRpt arg+4
::: : & <CLink> ← <Free> : Next :
::: : & <Free> ← @[ <Free>,,next] : :
LOAD 0 Load <Free> ← <CLink> : Next arg←0
::: : <arg> ←4@[ <FX?> arg>TOS DoneElseRpt arg+4
(9) Jumps ==========================================================================================
NOP1 1 : NOP : :
NOP2 2 : NOP : :
NOP3 3 : NOP : :
NOP4 4 : NOP : :
NOP5 5 : NOP : :
JUMPX 2 N : <K=ib> ← @4[ PC4] : :
JUMPXX 3 ? : ? : :
TJUMP 2 N NIL S'←S-1; <S'> ← <S-1> : :
TJUMP T S'←S-1; <S'> ← <S-1> : Next :
::: : <K=ib> ← @4[ PC4] : :
FJUMP 2 N T S'←S-1; <S'> ← <S-1> : :
FJUMP NIL S'←S-1; <S'> ← <S-1> : Next :
::: : <K=ib> ← @4[ PC4] : :
NTJUMP 2 N NIL S'←S-1; <S'> ← <S-1> : :
NTJUMP T <K=ib> ← @4[ PC4] : :
NFJUMP 2 N T S'←S-1; <S'> ← <S-1> : :
NFJUMP NIL <K=ib> ← @4[ PC4] : :
REFILL 0 Refill <K=ib> ← @4[ PCf] : :
======================================================================================================
10+35 3 4 3 3 2 4 1 2 4 4 3 8 4
field Length Format PreCond StkAct Waddr← EUop R Raddr1 Raddr2 Cond NextI K Misc
===== ------ ------ ------- ------ ------ ---- - ------ ------ ---- ----- ------ ----
0 0 {} {} {S} <S'> ← <S> <R1-1> {T} {done} {}
1 1 N Dumped S-1 <N> ← <N> IB ZeroP elseUfn Bit31
2 2 A Loaded S+1 <K> ← @[ <K> PCq TYPE=K NextElseUfn C← Prev
3 3 AB Flushed S←N <arg> ←4@[ <arg> S BoundP elseCondStore arg←1
4 4 ABCD RetTrap? W @[ OP StackP Next Arg←n
5 5 Atom NIL/T W4@[ NIL IntP1 JmpK C← Next
6 Def,AB MVA/NoPush PLUS IntP2 DoneElseRpt DisInt
7. . n N>S . . MINUS . . IntP3 NextElseRpt EnbInt .
8 Val AND PtrP RetEnbInt
9 Ufn,Op OR ListP Arg←D1
10 AtomP
11 arg=0
12 arg>TOS
13 FastRet
14 DirectP
15 . . . . . . . . EQL
RetTrap
FloatP
NNIL
ArrayP
PreConditions 6
1,2Frame
3,4Frame
RetTrap
MVA
NULL(TOS)
N>S
Conditions
{T}
Alu=0
TYPE=K
MAR BoundP
MAR StackP
d1 IntP1
d1&d2 IntP2
IntP3
d1,d2 PtrP S, S-1
MAR ListP
d1 AtomP
arg=0
arg>TOS
FastRet
MAR DirectP
d1,d2 EQL
0 = T
1 = ALU=0
2 = TYPE=K
3 = BOUNDP
4 = STACKP
5 = INTERGEP1
6 = INTERGEP2
7 = INTEGERP3
10 = POINTERP
11 = LISTP
12 = ATOMP
13 = Arg#0
14 = Arg#TOS
Instruction Preconditions
----------- -------------
EnterTrap
IfuRefill
Interrupt
NoFreeFrames
Refresh
28 1 byte ops
17 2 byte ops
6 3 byte ops
1 5 byte ops
--
52
8 11% SCn
16 19% VARn
16 2% FVARn
16 2% VARn←
16 2% VARn←↑
4 LISTPn, IntegerP, FloatP, NumberP
4 DTESTn
8 3% FNn
16 12% (N)(T/F)JUMP(2)
12/16? UFN1
3/16? UFN2
3/16? UFN3
1/16? UFN5
--
160
Tamarin Microcode Word
Raddr1 2 Read address D1
0 = TOS
1 = K
2 = N
3 = Arg
Raddr2 4 Read address D2
0 = <Raddr>-1
1 = IBufData
2 = PC quad word address
3 = TOS
4 = OPCODE
10-17 = Constant[-]
RSwap 1 Swap D1 and D2
Waddr 2 Write Register address source
0 = new TOS
1 = K
2 = N
3 = Arg
StkCxt 2 Stack Context
0 = Read uses Prev
1 = Write uses Prev
2 = Read uses Last
3 = Write uses Bottom
4 = Bottom is full
5 = Bottom is empty
6 = Cur ← Prev
7 = Cur ← Next
StkAct 2 TOS modification
0 = no change
1 = TOS + 1
2 = TOS - 1
3 = ARG
4 = N
ArgAct 2 ARG modification
0 = no change
1 = ARG - 1
2 = ARG + 4
3 = 0
4 = N
EUop 4 Execution Unit operation
0 = Memory Read Single
1 = Memory Write Single
2 = Memory Read Quad
3 = Memory Write Quad
4 = PLUS
5 = MINUS
6 = AND
7 = OR
10 = XOR
11 = D1
12 = D2
13 = GREATERP
14 = EQ
15 = ?
NextInst 3 Source of Next Instruction address
0 = NEXT/-
1 = JmpK/-
2 = DONE/UFN
3 = NEXT/UFN
4 = RPT/NEXT
5 = RPT/DONE
Condcode 4 Conditional transfers
0 = T
1 = ALU=0
2 = TYPE=K
3 = BOUNDP
4 = STACKP
5 = INTERGEP1
6 = INTERGEP2
7 = INTEGERP3
10 = POINTERP
11 = LISTP
12 = ATOMP
13 = Arg#0
14 = Arg#TOS
CWrite 1 Conditional Write - Write Reg if cond true
K 8 General 8 bit constant
Misc 4 Misc operations
0 = LatchPC
1 = Set Bit31
Register Address Assignment
0-57 Stack Frame i, i=StkCxt
60-67 Temp register, independent of stack frame
70-73 Reg 0-3 of StkFrame i. This also stores implicit value of PC.
Notes
Control flow - In addition to the normal control flow specified in the micro instruction (Next, Repeat, Jump K, Done or UFN), several other events can modify the control flow. A Trap will cause an immeadiate abort of the current microinstruction and a micro-jump to the relevant trap routine. Traps include: Page refill, Write fault, Page fault. When a new opcode is about to be executed, certain precondition must be satisfied first. In they are not true, a pseudo opcode will execute. Some preconditions are specific to a given potential opcode. Other preconditions are general and apply to all opcodes. General preconditions include: Jump refill Ibuf, Inst refill IBuf, Interrupt, Trap on entry.
OP PLA Format
Length 3 Length of opcode in bytes
Format 4 Format of opocde
op N b0 b1 b2 b3
0 = o 0 0 0 0 0
1 = o a 0 0 0 0
2 = o 0 'Int 0 0 a
3 = o 0 'Int 0 a b
4 = o 0 a b c d
5 = o 0 'Atom 0 a b
6 = o a 'Fnx b c d
6 = o o&7 'Fnx a b c
7 = o o&17 0 0 0 0
10 = o 0 'Val 0 a b
Precond 3 Opcode Preconditions
0 = none
1 = Empty frame in machine
2 = Previous frame in machine
3 = All previous frames empty
4 = Slow return bit off
OpStart 8 Opcode start address in main PLA
Can NIL flag be set by merely fetching <S-1>? &
What bus do conditions test? Mov bus; see FVARn←
Name Size %Dynamic %Static WAddr← @ RAddr Op IB Misc Stack TagTrap PreCond Context
---- ---- -------- ------- ------ - ----- -- -- ---- ----- ------- ------- -------
(1) Constants
SCn 1 11 6 <S+1> ← <CON n> S←S+1
SIC 1 4 2 <S+1> ← IB S←S+1
SICX 2 5 0.5 <S+1> ← IDB S←S+1
GCONST 5 1? 1 <S+1> ← IQB S←S+1
ACONST 3,4 2? 4 <S+1> ← <NIL> + IDB S←S+1
COPY 1 3 3 <S+1> ← <S> S←S+1
POP 5 6 <S-1> ← <S-1> S←S-1
(2) Variables
VARn 1 19 16 <S+1> ← <n> S←S+1
VARX 2 3 3 <S+1> ← <X> S←S+1
VARM 2 0.05? 0.05? <S+1> ← @[<'Fx>, IB] S←S+1
GVAR 3,4 3 2 <S+1> ← @[<'Val>,IDB] S←S+1
FVARn 1 2 2? <S+1> ← @[<n>] S←S+1 BoundP
FVARn← 1 0.5? 0.5 @[<n>] ← <S> ***** S←S-1 StackP
VARn← 1 2 2 <n> ← <S>
VARn←↑ 1 2 1 <n> ← <S> S←S-1
VARX← 2 1? 1? <IB> ← <S> S←S-1
VARIX 2 ? ? <S+1> ← @[<IB>] S←S+1 DirectP
(3) Stack
UNBIND 2 1 1 <IB> ← <S> S←IB
DUNBIND 2 1 1 <IB> ← <IB> S←IB
(4) Arithmetic
GREATERP 1 1 <S-1> ← [<S> - <S-1>]NMINUSP S←S-1 IntegerP2
PLUS 1 1 <S-1> ← <S> + <S-1> S←S-1 IntegerP3
DIFF 1 1 <S-1> ← <S> - <S-1> S←S-1 IntegerP3
AND 1 0.3 <S-1> ← <S> AND <S-1> S←S-1 IntegerP2
LLSH 1 1 <S> ← <S> FU 0 IntegerP3
LRSH 1 1 <S> ← <S> FU <S> IntegerP2
OR ? ? <S-1> ← <S> OR <S-1> S←S-1 IntegerP2
XOR ? ? <S-1> ← <S> XOR <S-1> S←S-1 IntegerP2
(5) Memory
GETPTR 2 1 2 <S> ← @[<S> + IB] PointerP
PUTPTR 2 3 2 @[<S-1>+IB] ← <S> Rev? S←S-1 PointerP
PUTPTR↑ 2 ? ? @[<S-1>+IB] ← <S> Rev? S←S-2 PointerP
ADDBASE 1 1 0.4 <S-1> ← <S> + <S-1> S-S-1 IntegerP1
(6) Lists/Types
CAR 1 2 3 <S> ← @[<S>] ListP
CDR 1 2 3 <S> ← @[<S>,,1] ListP
TYPEPn 1 1? 1 <S> ←IF <S> LispP THEN ←NIL (UserLispP)
DTESTn 1 ? ? <S> ← <S> <n>P
TYPEP 2 1 0.4 <S> ←IF @['TypeTable,<S>] #IB THEN ←NIL (UserLispP)
DTEST 2 0 2 IF @['TypeTable,<S>] #IB THEN Trap DTestP
(7) Control
RET 3 2 <S+1> ← <S> S←S+1 SlowRet PreLoad ←prev
RETNV 3 2 <S> ← <S> SlowRet PreLoad ←prev
RETEI 3 2 <S> ← <S> EnbInt SlowRet PreLoad ←prev
PAGEFAULT <S+1> ← <'MDR> DisInt arg ← 1 GOTO[TRAP]
TRAPn (Interrupts) <Code>← @[<'FnDef>,,n] GOTO[Call]
APPLYFN 1 ? 0.1 'arg ← <S-1>
<Code>← @[<'FnDef>,,<S>] AtomP GOTO[Call]
FNn 3,4 3 7 <Code>← @[<'FnDef>,,IDB] arg ← n PreDump GOTO[Call]
Call: <'R0> ← @4[<'Code>] PC ← ,,arg
<'All>← <'Unbind> cur ← next
<arg> ← <old S> S←S-1 until arg=0 arg←arg-1
ENBINT 1 - - EnbInt
DISINT 1 - - DisInt
TAILFNX 4,5
(8) Jumps
NOPn 1-5 1? 1? NOP
JUMP 1 1 1 PC ← PC + n
JUMPX 2 1 2 PC ← PC + sIB
JUMPXX 3,5 1 1 PC ← PC + sIDB
TFJUMP 1 6 4 PC ← PC + sIB IF <S>EQ<NIL> S←S-1
TFJUMPX 2 2 2 PC ← PC + sIB IF <S>EQ<NIL> S←S-1
NTFJMPX 2 4 2 PC ← PC + sIB IF <S>EQ<NIL> (S←S-1)
JEQ? 2 3 3 PC ← PC + sIB IF <S-1>EQ<S> S←S-2 EQL
JGREATERP? 2 1 1 PC ← PC + sIB IF <S-1>GT<S> S←S-2
JLISTP? 2 1 1 PC ← PC + sIB IF LISTP <S> S←S-2
JREFILL - 8? - <'IB> ← @4[<PC>] GOTO[IREFILL]
IREFILL - 12 - <'IB> ← @4[<PC+4>]
(9) Frames
MYCLINK 1 - - <S+1> ← <CLink> S←S+1 PreFlush
MYCLINK← 1 - - <CLnk>← <S> PreFlush
REFRESH(2ms) 0.01 arg ← N
<arg> ← <arg> arg←arg-1 until arg=0
DUMP .1 @4[<'Free>,arg] ← <arg←0> arg←arg+4 until arg=TOS
<CLnk>← <Free>
<Free>← @[<Free>,,next]
LOAD .1 <Free>← <CLnk> arg←0
<arg> ← @4[<FX>] arg←arg+4 until arg=TOS
(10) Misc
CSTORE ?
BLTSTEP ?
BITBLTSTEP ?
FVLOOKSTEP ?
REFCNT ?
GCSCANSTEP? ?
EXDIS <S-1> ← <S> S←S-1
ADDB <S> ← <S> + IB
ADDDB <S> ← <S> + IDB
SUBB <S> ← <S> - IB
RSB <S+1> ← @[<S> + IB] S←S+1
WB @[<S>+IB] ← <S-1> S←S-2
WSB @[<S-1>+IB] ← <S> S←S-2
(11) Macros
'NIL 2 2 SC0
'T 1 1 SC1
'0 1 1 SC2
'1 1 1 SC3
'UNBIND 1 1 SC4
SNIC ? 0.1 '0 SNIC DIFF
SWAP 0.1 0.1? ?
IVARn 11 8 VARn
PVARn 8 8 VARn
PVARX 3 3 VARn or VARX or VARM
LISTP ? 1 TYPEP0
INTEGERP ? ? TYPEP1
FLOATP ? ? TYPEP2
TYPEMASK ? ? ?
BIND (2NIL 1PV) 1 1 VAR←↑, 'NIL, VAR←, VAR←↑
UNBIND1 (2NIL 1PV) 0.3 'UNBIND, VAR←, VAR←, VAR←↑
GETBASE 4 2 1 GETBASEPTR, GETFIELD
GETBITS 3 fd, n 1? 0.2
4 GETBASEPTR n, GETFIELD fd
7 GETBASEPTR n, RSHIFT fd, SICXX, AND
GETBYTE 3 0.1
PUTBASE 1 0.4 <ptr>,GETBASEPTR,<val>,PUTFIELD,PUTBASEPTR
PUTBITS 3 fd, n 1? 0.2
6 <ptr>,GETBASEPTR,<val>,PUTFIELD,PUTBASEPTR
<ptr>,GETBASEPTR,<val>, LSHIFT fd, G
PUTBYTE 3 0.0 RSH, ADDBASE, GETBASEPTR,<val>,PUTFIELD,PUTBASEPTR
(12) UFNs
CONTEXTSWITCH(n)
Temp ← (MYCLINK)
MYCLINK← ContextTable(n)
ContextTable(n) ← Temp
RETEI
INTERRUPT
n ← (InteruptNo)
Temp ← (MYCLINK)
MYCLINK← ContextTable(n)
ContextTable(n) ← Temp
RETURN
UFN1 XOP1(32)
GETBYTE 3%
PUTBYTE 3%
GETWORD
PUTWORD
VAG2 1%
NTYPX ?
BIN
ELT
UNBOX
UNBOX2
INTEGERTRAP
BOX
UFN2 XOP2 (11)
RPLPTR
GCREF
UFN2 XOP2 MISC (256)
APPLYFN
CHECKAPPLY
RPLACA
RPLACD
CONS
GETP
FMEMB
GETHASH
PUTHASH
CREATECELL
BOUT
BITBLT
NTHCHC
SETA
RPLCHARCODE
EVAL
\RETURN
ARG0
MYARGCOUNT
MYALINK
TIMES2
QUOTIENT
ITIMES2
FPLUS2
FDIFF
FTIMES2
FQUOTIENT
FGREATERP
FLOATP
NUMBERP
XOP3 (23)
GVAR←
GETBITS
PUTBITS
XOP5 (29)
PUTBITS
30-Oct-84 11:42:26 File started
14-Jul-85 14:53:29 first pass of microcode
DISCUSSION
Independence of VM Mapping from instruction PLA
I assume that a Map Entry Cache miss will be rapidly turned into a Map Entry memory fetch and that the new Map Entry will be chached and the memory fetch will be resumed without microcode intervention.
When the Instruction Fetch Unit prefetches instructions, the prefetcher conceptually has a slightly different PD than the instruction decoder's PC.
Issues
ufn's
Atom representation
types and tags
multi value return
VMM
opcodes
interpreter
C.L. catch throw
Interloops
UNBOXED bits on stack for GETBITS and PUTBITS
RefCnt?