Tamarin Microcode Word
Raddr12Read address D1
0 = TOS
1 = K
2 = N
3 = Arg
Raddr24Read address D2
0 = <Raddr>-1
1 = IBufData
2 = PC quad word address
3 = TOS
4 = OPCODE
10-17 = Constant[-]
RSwap1Swap D1 and D2
Waddr2Write Register address source
0 = new TOS
1 = K
2 = N
3 = Arg
StkCxt2Stack Context
0 = Read uses Prev
1 = Write uses Prev
2 = Read uses Last
3 = Write uses Bottom
4 = Bottom is full
5 = Bottom is empty
6 = Cur ← Prev
7 = Cur ← Next
StkAct2TOS modification
0 = no change
1 = TOS + 1
2 = TOS - 1
3 = ARG
4 = N
ArgAct2ARG modification
0 = no change
1 = ARG - 1
2 = ARG + 4
3 = 0
4 = N
EUop4Execution Unit operation
0 = Memory Read Single
1 = Memory Write Single
2 = Memory Read Quad
3 = Memory Write Quad
4 = PLUS
5 = MINUS
6 = AND
7 = OR
10 = XOR
11 = D1
12 = D2
NextInst3Source of Next Instruction address
0 = NEXT/-
1 = JmpK/-
2 = DONE/UFN
3 = NEXT/UFN
4 = RPT/NEXT
5 = RPT/DONE
Condcode4Conditional transfers
0 = T
1 = ALU=0
2 = TYPE=K
3 = BOUNDP
4 = STACKP
5 = INTERGEP1
6 = INTERGEP2
7 = INTEGERP3
10 = POINTERP
11 = LISTP
12 = ATOMP
13 = Arg#0
14 = Arg#TOS
CWrite1Conditional Write - Write Reg if cond true
K8General 8 bit constant
Misc4Misc operations
0 = LatchPC
1 = Set Bit31
Register Address Assignment
0-57Stack Frame i, i=StkCxt
60-67
Temp register, independent of stack frame
70-73
Reg 0-3 of StkFrame i. This also stores implicit value of PC.
Notes
Control flow - In addition to the normal control flow specified in the micro instruction (Next, Repeat, Jump K, Done or UFN), several other events can modify the control flow. A Trap will cause an immeadiate abort of the current microinstruction and a micro-jump to the relevant trap routine. Traps include: Page refill, Write fault, Page fault. When a new opcode is about to be executed, certain precondition must be satisfied first. In they are not true, a pseudo opcode will execute. Some preconditions are specific to a given potential opcode. Other preconditions are general and apply to all opcodes. General preconditions include: Jump refill Ibuf, Inst refill IBuf, Interrupt, Trap on entry.
OP PLA Format
Length3Length of opcode in bytes
Format4Format of opocde
opNb0b1b2b3
0 =o00000
1 =oa0000
2 =o0’Int00a
3 =o0’Int0ab
4 =o0abcd
5 =o0’Atom0ab
6 =oa’Fnxbcd
6 =oo&7’Fnxabc
7 =oo&170000
10 =o0’Val0ab
Precond3Opcode Preconditions
0 = none
1 = Empty frame in machine
2 = Previous frame in machine
3 = All previous frames empty
4 = Slow return bit off
OpStart8Opcode start address in main PLA