[phylum]<CTamarin>Doc>Old>Tamarin-hardware.bravo!1

The OpPla does the first level decoding of the next opcode to be executed. Many InterLisp opcode are very similar to one another with there primary difference in the way they specify their argument. For example, IVAR and IVARn are different in format but can use the same Ucode to execute. It reduces the size of the UcodeROM by reducing the number of routines needed. Likewise, certain fields that occur only once are included in this PLA rather than each line of the UcodeROM. TosOffset is an example.

The choice of opcode numbering is important. By using the PLA structure, the size of the OpPla can be substantially reduced by encoding all opcodes which have the same entry into one PLA min-term.

The Format field describes how the IBuf data will be presented on the data path. The IBuf formatter sends data to three paths - opcode into the OpPla, 1 byte arg into Arg, 0-4 byte data to Data. (All formats need to be detailed.)

The Length field decribes the length of this opcode. An opcode can be from 1 to 5 bytes. If the opcode is a SKIP type then the length will be the skip length. The non-skip length will be 1.

The Conditional Jump field, in conjunction with the TosNil flag, determines whether the actual opcode length will be 1 or Length. (More than one bit will be required if skipping on both NIL and non-NIL is desired.)

The TosOffset field describes how the TOS will be adjusted at the end of the instruction. This is also used to calculate the Stack Write address. This will be in the range of +1 to -2. (Some thought needs to go into how conditional pops are handled.)

The Preconditions field describes any preconditions that need to be satified before this opcode can execute. The hardware will run the code for the preconditions before running the opcode itself. Note that there will be other preconditions that will always apply and will not be a function of the Preconditions field. The field will describe the following preconditions: Previous Frame Present, Empty All Frames, etc. (This needs more work to determine all the preconditions.)

The UcodeStart field describes where this opcode will cause the UcodeROM to start. (It may be desireable to pass some bits of the opcode dirctly through to this field. This would reduce the number of entries for the large number of single byte opcode.)

The number of ucode instructions needed to execute an opcode will be small. The ROM will have a limited amount of space, probably 200-400 instructions.

The UcodeROM will be a ROM with 9 bits of address input and about 40 bits of output. The Ucode address for each cycle can come several different sources: UcodeStart, OpPrecondStart, RepeatAddr, IncrAddr, NextAddr, TrapAddr, and SpecCycleAddr.

The first two can occur only when a new opcode is to be executed. The UcodeStart field is supplied by the OpPla at the start of a new opcode. The OpPreconStart address is used when a precondition must be executed before the opcode can be started. The non-maskable preconditions are: Interrupt, DoRefCnt, RefillIBuf. The OpPla maskable preconditions are: LoadFrame, Dump Frame.

The next three sources are used for the continuing executtion of a stream of uinstructions. The usual action will be to execute the next instruction in sequence - IncrAddr. A jump may be specified by using the N field to indicate the next instruction. (The N field is shared with other uses.) If the Jmp Condition is satisfied, the N field specifies the next address. Otherwise execution continues at the squentially next instruction. The same instruction can be repeated until Jmp Condition is satisfied. If a trap condition exists, the UFN routine is run.

The final source is SpecCycleAddr. This allows certain actions to use one cycle of the machine. This has the highest priority. It simply steals a cycle and does not disturb the main flow of control. These can only be one instruction long. Virtual Memory refill uses this.

The Jump field specifies that a jump will occur if the jump condition is satified. The N field will specify the next address when the jump occurs. The next address will be the sequentially next instruction otherwise.

The Repeat field specifies that the current instruction will be continually executed until the jump condition is satified. Execution will continue at the sequentially next instruction after the condition is satisfied. It is undefined for both Jump and Repeat to be on in a single instruction.

The JmpCondition field specifies what condittion is used to determine if a condition jump is to be taken. The condition must be stable by the end of the read of the registers onto the D1 and D2 buses. The use of conditions based on the results of the Execution units must wait until the next cycle. The conditions include: ALU<0, ALU overflow, ARG=0, ARG=LIMIT, etc.

The TrapEnables field specifies the conditions that cause a UFN call to be initiated. These include: D1 type wrong, D2 type wrong, etc.

The Finished field indicates that execution of this opcode is complete and next cycle should cause the next opcode to be started. If the current instruction is taking a conditional jump, this bit is ignored. If the instruction is repeating, the bit is only acted upon when the repeat is completed.