IOP interface

- IOP must run out of system memory.  This implies mapping registers in the memory controller so that some portion of system memory is available at all times.

- PCE also uses the mapping registers.  These are yet another set of mapping registers.  (i.e. total of 16 mapping regs).

- The mapping regs must be disableable for debugging purposes, since the Mesa processor also has the mapping regs.

- Hard Disk & Ethernet DMA transferrs use the Extended bus & absolute addresses (i.e. no mapping).  They now would use the IOP bus & therefore must have a reserved mapping reg for each DMA device.  But the map registers already have been assigned except for ONE spare. 

- If the extneded bus is used, we must also respond to non-mapped requests of 24 bit addresses.

- The external DMA controller does not have a no-increment mode for the address register, except for one special case of a memory to memory move on channel 0, where the source address is not incremented in the memory to memory move.

- The internal 186 DMA can disable the address increment/decrement so that straight transferrs can take place with the memory controller performing the address increments.  But it must be on a particular channel/map address since other memory operations may take place prior / during / after the DMA transferr.