Project Name: SerialRAM

Designer: Jim Cherry

Location: Xerox PARC

Project Size (units of l): 2933 x 1431

Filed on: [ivy]<speech>SerialRAM>RAM.bravo

Figures filed on: [ivy]<speech>SerialRAM>RAM1,2,3.sil

Description:

SerialRAM is a serial data RAM for use with serial signal processing components. It is organized as two 128 word by 24 bits memories which share a common address. It intended use is the state memory in second order digital filters (FILTERS project, R. F. Lyon).

The memory uses a three transistor dynamic ram cell. Serial data is loaded into a shift register, and then written in parallel to a column of the memory array. Similarly, data is read from a column of the array and loaded into a shift register for output in serial format. A serial address line specifies both a read and write address during each 24 bit word time (see RAM1.sil for timing details). There is no explicit provision for refreshing a particular word in the memory.