[Ivy]<Speech>Roylance>Atester.dm!1>atester.memo

Tester Description. The MOS tester is simply a hardware bit flipper. Sixty-four pin drivers send data to the test sockets and read the data coming back. The input and output data appear like memory locations to the Alto; consequently, the Alto can read or set 16 pins (1 word’s worth) at a time. The tester’s pin driving circuit has a high impedance, a property that obviates the need for tristateing the pin drivers: if the device pin undertest is output, it will have no trouble overcoming the drivers output impedance. On the otherhand, if the device pin is an input (which has a much higher impedance), then the pin will follow the driver. The high impedance output also has the feature that +5 or GND can be connected to the driver without damage. Thus the user can connect up the chip power without disconnecting the pin drivers.

How to Use it. After writing your programs, set up the hardware. The Alto Universal Board (AUB) (the one with all the TTL on it) must be plugged into the Alto II. When the logic bay is pulled out, the slots for the different cards are visible on the right side. The AUB must be plugged into slot 5, 6, or 7 (the slots are numbered on the machine; 1 is at the top), component side up. The AUB unfortunately has notches cut in the edge connector and, as luck would have it, we need to use the missing pin. On the backplane, connect a jumper from pin 02 to pin 58 for the slot you are using. The backplane slots are labelled J5, J6, and J7 for slots 5, 6 , and 7.

Software. The pin drivers are programmed through memory locations 177300-307. The first four locations are used to set the pin driver outputs; these locations are low true; if a bit is a zero in the word, then the appropriate pin will go high. A read should not be done on these locations as the read sets the pin driver to garbage. Because writing into one of these four words sets all 16 pins at once, your program must keep track of what the pins are supposed to be. A convenient method of doing this is to have an array of 4 word structures that hold the state information for the pins. Incremental changes can be made to the appropriate word in the structure. Then, to run the tester, loop through these 4 word structures, outputing the precomputed pin driver values as well as recording 4 words of data from the chip to examine later. Precomputing the pin driver values allows much higher speeds.

Advantages. The test jig accepts 40 pin DIPs and 64 pin QUIPs; the only wiring the user needs to do is running power and ground to the appropriate pins. The tester can send out bits moderately fast if they have been precomputed (speed becomes important in large chips that have dynamic RAM structures; if such circuits are not refreshed every cycle, but every N cycles. Large power dissipations also minimize the available storage time). pIf speed is really needed, the interface can be microcoded. Microcode freaks can tie pin 3 of IC #aa49 low to let the microcode read and write 16 pins in the same memory cycle.

Testing TTL. This tester was designed to test MOS circuits. TTL circuits do not have the high impedance that MOS circuits have, and so the tester cannot handle them without some modifications. To test an LS TTL part, change the following parts of the pin drivers: replace the 8 LS374s with S74. The Schottky 74 can supply 6.5mA opposed to the LS 2.6mA. Replace the 8 DIP packages of 2.4K resistors coming from the S74s with 680 ohm resistors. The voltage drop across these resistors will be 280 millivolts for a standard LS load; the voltage drop is excessive for other families, so they cannot be tested with the resistors in place. Removing the resistors (ie, setting them to zero for the TTL package’s inputs) means tristate circuits cannot be tested and the resistors must be configured for every new part.

Relation to other testers. There are a few other testers that preceded this tester. Bob Baldwin designed a tester last summer, but which had unfortunately been mislaid for most of this summer. His design connects to an Alto via the Diablo port and the X register. [Bob describes this design on [ivy]<Baldwin>Tester.bravo.] Near the beginning of the summer he considered reworking the tester, but his thesis was more pressing. At that time we considered some alternatives to that design, and it was then that the idea of using open collector drivers came up (Rob Mathews later improved upon that).

Rob Mathews wanted a tester for his class a Stanford, so he started designing one in CMOS. While his design has the feature of being compatible with any computer that has an RS-232C interface, that same interface also limits the testing speed to 1 pin per millisecond. While this would be adequate for static designs and dynamic designs that have few inputs, it would not serve for larger dynamic designs.

I went ahead and designed a tester such as Bob and I had talked about. It connected through the Alto’s Diablo port. When tracking down an Alto Univeral Board to build the tester on, I talked with Ted Strollo. He was then deeply involved with making his AltoTitanic film processing interface; he suggested I steal his interface, thus going directly into the Alto’s memory bus instead of through the Diablo port. I debated that question, and finally agreed; my reasons were confused and questionable, though. Ted’s design had not been debugged yet, so I let him trip a few times before gobbling down his interface. The documentation on Alto interfacing is very scanty and somewhat confusing because signal names change; Ted based his design on a typewritten document by N. Tobol, ALTO II Memory Bus Interface, September 13, 1976 and <Quarterman>AL2TBLT, a tablet interface. Another document is <AltoDocs>AltoInterface.press, April 1973.

Alto Universal Interface Board. This board contains the pin driving circuits and the interface to the Alto. Construction just involves getting the board stitchwelded and stuffed. There are 17 dip platforms that need to be made; 16 of them are just full of resistors; the 17th has a bypass capacitor and a pullup resistor.

The power supply holes have to be drilled out. Five pins need to be drilled to 0.045; the 2 mounting holes need to be enlarged to clear a 4-40 screw.
The ground connection to the power supply is wrong; cut the trace and make a jumper to the center pin.
Mounting holes for the chassis box. Chassis and the printed circuit board have no mounting holes; drill them to suit, but avoid shorting the AC line to the chassis.
Wirewrap pin holes for ground. Drill some holes for two ground wirewrap pins. The copper boarder of the board is ground.

The test jig has two sockets on it, a 40 pin and a 64 pin. Each of these pins corresponds to a bit position in two words of the Alto’s memory. One of these words is used to write a group of 16 pins, the other to read the group.

Alto LocationBit Position (0 is MSB)
WriteRead

1773001773047654321015141312111098
Card Edge01020304050607081112131415161718
Cable #101030507091113152123252729313335
Cable #2
40 Pin Socket40393837363534333231302928272625
64 Pin Socket34363840424446485052545658606264

1773011773057654321015141312111098
Card Edge62636465666768697273747576777879
Cable #102040608101214162224262830323436
Cable #2
40 Pin Socket01020304050607080910111213141516
64 Pin Socket33353739414345474951535557596163

1773021773067654321015141312111098
Card Edge37383940414243444748495051525354
2122232482838485
Cable #14143454742444648
Cable #201030507091113152123252729313335
40 Pin Socket2423222117181920
64 Pin Socket02040608101214161820222426283032

1773031773077654321015141312111098
Card Edge9899100101102103104105108109110111112113114115
Cable #1
Cable #202040608101214162224262830323436
40 Pin Socket
64 Pin Socket01030507091113151719212325272931