"FOSTester"

Class new title: ’FOSTester’
subclassof: IcTester
fields: ’clockString vSub’
declare: ’’;
asFollows̃

I am a tester for Rich Pasco"s FOS project

Pin Dictionary

assignPinGroups
[self name: ’activeLowInputs’ pin: (’xn0a’, ’xn0b’, ’zn1a’, ’zn1b’);
name: ’activeLowOutputs’ pin: (’yna’, ’ynb’, ’zna’, ’znb’, ’tp1a’, ’tp1b’, ’tp2a’, ’tp2b’);
name: ’inputs’ pin: (’lsb0a’, ’lsb0b’, ’cb0a’, ’cb1a’, ’cb2a’, ’cb0b’, ’cb1b’, ’cb2b’, ’n’, ’tsczn’, ’tsczn1’, ’activeLowInputs’);
name: ’outputs’ pin: (’lwt’, ’lsbSource’, ’lsb1a’, ’lsb1b’, ’lsb20a’, ’lsb20b’, ’lsb23a’, ’lsb23b’, ’activeLowOutputs’);
name: ’activeLow’ pin: (’activeLowInputs’, ’activeLowOutputs’);
name: ’drivenPins’ pin: (’vdd’, ’gnd’, ’inputs’, ’clk’);
name: ’lowZ’ pin: (’vdd’, ’gnd’, ’outputs’)]

assignPinGroupsV "for testing VariReg30"
[self name: ’activeLowInputs’ pin: (’xn0a’, ’xn0b’, ’zna’, ’znb’);
name: ’activeLowOutputs’ pin: (’yna’, ’ynb’, ’zn1a’, ’zn1b’, ’tp1a’, ’tp1b’, ’tp2a’, ’tp2b’);
name: ’inputs’ pin: (’lsb0a’, ’lsb0b’, ’cb0a’, ’cb1a’, ’cb2a’, ’cb0b’, ’cb1b’, ’cb2b’, ’n’, ’tsczn’, ’tsczn1’, ’activeLowInputs’);
name: ’outputs’ pin: (’lwt’, ’lsbSource’, ’lsb1a’, ’lsb1b’, ’lsb20a’, ’lsb20b’, ’lsb23a’, ’lsb23b’, ’activeLowOutputs’);
name: ’activeLow’ pin: (’activeLowInputs’, ’activeLowOutputs’);
name: ’drivenPins’ pin: (’vdd’, ’gnd’, ’inputs’, ’clk’);
name: ’lowZ’ pin: (’vdd’, ’gnd’, ’outputs’)]

assignPinsAsDesigned "intended pin assignments, not MPC380"
[user cr; show: ’assigning pins’.
self initPinDict;
name: ’subst’ pin: 1;
name: ’vdd’ pin: 40;
name: ’gnd’ pin: 20;
name: ’clk’ pin: 14;
name: ’lsb0a’ pin: 2;
name: ’xn0a’ pin: 3;
name: ’cb0a’ pin: 6; name: ’cb1a’ pin: 5; name: ’cb2a’ pin: 4;
name: ’lwt’ pin: 7;
name: ’n’ pin: (8,9,10,11,12) "LSB first";
name: ’lsbSource’ pin: 13;
name: ’cb0b’ pin: 15; name: ’cb1b’ pin: 16; name: ’cb2b’ pin: 17;
name: ’xn0b’ pin: 18;
name: ’lsb0b’ pin: 19;
name: ’tp1b’ pin: 22;
name: ’lsb1b’ pin: 23;
name: ’tp2b’ pin: 24;
name: ’lsb20b’ pin: 25;
name: ’lsb23b’ pin: 26;
name: ’ynb’ pin: 27;
name: ’znb’ pin: 28;
name: ’zn1b’ pin: 29;
name: ’tsczn1’ pin: 30;
name: ’tsczn’ pin: 31;
name: ’zn1a’ pin: 32;
name: ’zna’ pin: 33;
name: ’yna’ pin: 34;
name: ’lsb23a’ pin: 35;
name: ’lsb20a’ pin: 36;
name: ’tp2a’ pin: 37;
name: ’lsb1a’ pin: 38;
name: ’tp1a’ pin: 39]

assignPinsMPC03BF "not as designed - also for MPC03CF"
[user cr; show: ’assigning pins’.
self initPinDict;
name: ’gnd’ pin: 19;
name: ’vdd’ pin: 39;
name: ’subst’ pin: 1;
name: ’clk’ pin: 13;
name: ’lsb0b’ pin: 18;
name: ’xn0b’ pin: 17;
name: ’lsb0a’ pin: 1;
name: ’cb0a’ pin: 5; name: ’cb1a’ pin: 4; name: ’cb2a’ pin: 3;
name: ’lwt’ pin: 6;
name: ’n’ pin: (7,8,9,10,11) "LSB first";
name: ’lsbSource’ pin: 12;
name: ’cb0b’ pin: 14; name: ’cb1b’ pin: 15; name: ’cb2b’ pin: 16;
name: ’xn0a’ pin: 2;
name: ’tp1b’ pin: 21;
name: ’lsb1b’ pin: 22;
name: ’tp2b’ pin: 23;
name: ’lsb20b’ pin: 24;
name: ’lsb23b’ pin: 25;
name: ’ynb’ pin: 26;
name: ’znb’ pin: 27;
name: ’zn1b’ pin: 28;
name: ’tsczn1’ pin: 29;
name: ’tsczn’ pin: 30;
name: ’zn1a’ pin: 31;
name: ’zna’ pin: 32;
name: ’yna’ pin: 33;
name: ’lsb23a’ pin: 34;
name: ’lsb20a’ pin: 35;
name: ’tp2a’ pin: 36;
name: ’lsb1a’ pin: 37;
name: ’tp1a’ pin: 38]

Data Setup

a: a sect: sect
[a=0elf pinHigh: ’cb0’+sect during: 48 "disable b input to EGAS#1"]
self pinLow: ’cb0’+sect during: 48. "b0=1, b input enabled"
a=1elf pinHigh: ’cb1’+sect during: 48 "add"];
=fl1elf pinLow: ’cb1’+sect during: 48 "subtract"]
user notify: ’bad a’]

b: b sect: sect
[b=0elf pinHigh: ’cb0’+sect during: 28 "disable b input to EGAS#2"]
self pinLow: ’cb0’+sect during: 28. "b0=1, b input enabled"
b=1elf pinHigh: ’cb1’+sect during: 28 "add"];
=fl1elf pinLow: ’cb1’+sect during: 28 "subtract"]
user notify: ’bad b’]

c: c sect: sect
[c=1["use zn input" self pinLow: ’cb2’+sect during: 49];
=0["ignore zn input" self pinHigh: ’cb2’+sect during: 49]
user notify: ’bad c’]

d: d sect: sect
[d=0elf pinHigh: ’cb0’+sect during: 49 "disable b input to EGAS#3"]
self pinLow: ’cb0’+sect during: 49. "b0=1, b input enabled"
d=1elf pinHigh: ’cb1’+sect during: 49 "add"];
=fl1elf pinLow: ’cb1’+sect during: 49 "subtract"]
user notify: ’bad d’]

e: e sect: sect
[e=0elf pinHigh: ’cb0’+sect during: 50 "disable b input to EGAS#4"]
self pinLow: ’cb0’+sect during: 50. "b0=1, b input enabled"
e=1elf pinHigh: ’cb1’+sect during: 50 "add"];
=fl1elf pinLow: ’cb1’+sect during: 50 "subtract"]
user notify: ’bad e’]

f: f sect: sect
[f=1["use xn input" self pinLow: ’cb2’+sect during: 28];
=0["ignore xn input" self pinHigh: ’cb2’+sect during: 28]
user notify: ’bad f’]

frameFOS | sect
[user cr; show: ’framing’.
clockString ← ’0100’.
self pins40; samplesPerFrame: 4 numberOfFrames: 73; phi: 2.
self zero.
self pinHigh: ’vdd’; pinLow: ’gnd’; pinLow: ’subst’.
self pinHigh: ’outputs’. "hold outputs high because on-chip pullup is weak"
self pinHigh: ’tsczn’. "output z(n)"
self pinLow: ’tsczn1’. "input z(n-1), bypass VariReg"
self pin: ’clk’ clock: clockString.
forç sect from: (’a’,’b’) doç
[self pin: ’lsb0’+sect clock: ’1110’ during: (28,52)].
]

frameV: nwords
[user cr; show: ’frameV’.
clockString ← ’10’.
self pins40; samplesPerFrame: 2 numberOfFrames: nwords*24.
self zero.
self pinHigh: ’vdd’; pinLow: ’gnd’; pinLow: ’subst’.
self pinHigh: ’outputs’. "hold outputs high because on-chip pullup is weak"
self pinHigh: ’tsczn1’. "output z(n-1)"
self pinLow: ’tsczn’. "input z(n), test VariReg"
self pin: ’clk’ clock: clockString.
]

j: j sect: sect
[self pin: ’cb1’+sect serial: (j asUnsignedLSBfirst: 4) during: ((2,5,10,19) delay: 28)]

k: k sect: sect
[self pin: ’cb0’+sect serial: (k asUnsignedLSBfirst: 4) during: ((2,5,10,19) delay: 28)]

n: n
[self pins: ’n’ fixed: (n asUnsignedLSBfirst: 5)]

testNumbers | sect "totally random test numbers"
[user cr; show: ’Test number setup.’.
forç sect from: (’a’,’b’) doç
[user cr; show: ’Data setup.’.
self xn: fl3124391 sect: sect;
zn1: 3319403 sect: sect;
b: fl1 sect: sect;
a: 1 sect: sect;
f: 1 sect: sect;
c: 1 sect: sect;
j: 7 sect: sect;
k: 13 sect: sect;
d: fl1 sect: sect;
e: fl1 sect: sect.]]

xn: xn sect: sect
[self pin: ’xn0’+sect serial: (xn asLSBfirst: 24) during: (28~51)]

zn1: zn1 sect: sect
[self pin: ’zn1’+sect serial: (zn1 asLSBfirst: 24) during: (1~24)]

Running Tests

bigTest
[user cr.
vSub ← user request: ’Substrate voltage =?’.
self run; checkDriven.
]

workspace
"for Pasco’s FOS project"
[user notify: ’not meant to be executed’]
"
Smalltalk declare:  fos as: FOSTester new.
fos ← FOSTester new pins40.

fos assignPinsMPC03BF.
fos assignPinsAsDesigned.
fos assignPinGroups.

fos frameFOS.
fos testNumbers.

user cr; show: ’Data setup.’.
fos xn: fl3124391 sect: ’b’.
fos zn1: 3319403 sect: ’b’.
fos b: fl1 sect: ’b’; a: 1 sect: ’b’.
fos f: 1 sect: ’b’; c: 1 sect: ’b’.
fos j: 7 sect: ’b’; k: 13 sect: ’b’.
fos d: fl1 sect: ’b’; e: fl1 sect: ’b’.

fos comment: ’MPC07AF Sample 6 - AMI’.
fos bigTest.

fos report: (’a’,’b’).


fos printResults.

(dp0 file: ’Results.txt’) edit.
|t. t←(dp0 file: ’pinDict.txt’).
fos pinDict listOn: t.
t close; edit.

fos dump.
(dp0 file: ’dump.txt’) edit.
"

workspaceV
"for Pasco’s FOS project"
[user notify: ’not meant to be executed’]
"
Smalltalk declare:  fos as: FOSTester new.
fos ← FOSTester new pins40.

fos assignPinsMPC03BF.
fos assignPinsAsDesigned.
fos assignPinGroupsV.

fos frameV: 20.

fos n: 10.
fos pin: ’zna’ serial: ’101011’ during: (1~6).
fos pin: ’znb’ serial: ’101011’ during: (1~6).

fos comment:
’MPC07AF Sample 6 - AMI’.
fos bigTest.

fos reportV.

fos printResults.

(dp0 file: ’Results.txt’) edit.
|t. t←(dp0 file: ’pinDict.txt’).
fos pinDict listOn: t.
t close; edit.

fos dump.
(dp0 file: ’dump.txt’) edit.
"

Analysis

aFrom: sect
[ffi[’1’=(self pin: ’cb0’+sect phase: phi frame: 48)[0]
’1’=(self pin: ’cb1’+sect phase: phi frame: 48)[1] fl1]]

bFrom: sect
[ffi[’1’=(self pin: ’cb0’+sect phase: phi frame: 28)[0]
’1’=(self pin: ’cb1’+sect phase: phi frame: 28)[1] fl1]]

cFrom: sect
[ffi061-((self pin: ’cb2’+sect phase: phi frame: 49)‘1)]

dFrom: sect
[ffi[’1’=(self pin: ’cb0’+sect phase: phi frame: 49)[0]
’1’=(self pin: ’cb1’+sect phase: phi frame: 49)[1] fl1]]

eFrom: sect
[ffi[’1’=(self pin: ’cb0’+sect phase: phi frame: 50)[0]
’1’=(self pin: ’cb1’+sect phase: phi frame: 50)[1] fl1]]

fFrom: sect
[ffi061-((self pin: ’cb2’+sect phase: phi frame: 28)‘1)]

jFrom: sect
[ffi(self pin: ’cb1’+sect phase: phi frames: ((2,5,10,19) delay: 28))
asUnsignedLSBfirstInteger]

kFrom: sect
[ffi(self pin: ’cb0’+sect phase: phi frames: ((2,5,10,19) delay: 28))
asUnsignedLSBfirstInteger]

n
[ffi(self pins: ’n’ phase: phi frame: 1) asUnsignedLSBfirstInteger]

tp1From: sect
[ffi(self pin: ’tp1’+sect phase: phi frames: (29~52)) asLSBfirstInteger]

tp2From: sect
[ffi(self pin: ’tp2’+sect phase: phi frames: (48~71)) asLSBfirstInteger]

xnFrom: sect
[ffi(self pin: ’xn0’+sect phase: phi frames: (28~51)) asLSBfirstInteger]

ynFrom: sect
[ffi(self pin: ’yn’+sect phase: phi frames: (51~73)) asLSBfirstInteger]

zn1From: sect
[ffi(self pin: ’zn1’+sect phase: phi frames: (1~24)) asLSBfirstInteger]

znFrom: sect
[ffi(self pin: ’zn’+sect phase: phi frames: (49~71)) asLSBfirstInteger]

Report formatting

printResults
[user quitThen: ’emp Results.Txt Cream/f 10/p; resume XMSmall.Boot’]

report: sections | file sect
[user cr; show: ’Analyzing results.’; cr; show: comment.
file ← dp0 file: ’Results.txt’.
file
append: comment; cr; append: ’Substrate voltage = ’+vSub; cr;
append: ’clockString = ’; print: clockString; cr;
append: ’results sampled during phase ’; print: phi; cr; cr.
[sections is: Vector 
[forç sect from: sections doç [self report: sect onto: file. file cr.]]
"else" self report: sections onto: file].
file close.
]

report: sect onto: file | xn zn1 zn yn tp1 tp2 j k a c b d e f
[xn ← self xnFrom: sect. zn1 ← self zn1From: sect.
zn ← self znFrom: sect. yn ← self ynFrom: sect.
tp1 ← self tp1From: sect. tp2 ← self tp2From: sect.
f ← self fFrom: sect. b ← self bFrom: sect. c ← self cFrom: sect.
j ← self jFrom: sect. k ← self kFrom: sect.
a ← self aFrom: sect. d ← self dFrom: sect. e ← self eFrom: sect.
file
append: ’******* Analyzing section ’+sect; cr; cr;
append: ’measured LSB out of EGAS#1 = ’;
print: (self pin: ’lsb1’+sect phase: phi frames: (29~52)); cr;
append: ’measured LSB out of scaler = ’;
print: (self pin: ’lsb20’+sect phase: phi frames: (48~71)); cr; cr;
append: ’Given data:’; cr;
append: ’a = ’; print: a; tab; append: ’b = ’; print: b; tab; append: ’c = ’; print: c; tab; append: ’d = ’; print: d; tab; append: ’e = ’; print: e; tab; append: ’f = ’; print: f; tab; append: ’j = ’; print: j; tab; append: ’k = ’; print: k; cr;
append: ’x(n) = ’; print: xn; tab; append: ’z(n-1) = ’; print: zn1; cr; cr;
append: ’expected tp1 = (f*x(n))+(b*z(n-1)) = ’; print: (f*xn)+(b*zn1); cr;
append: ’measured tp1 = ’; print: tp1; cr; cr;
append: ’expected tp2 = tp1/(2↑j) = ’; print: tp1/(2↑j); cr;
append: ’measured tp2 = ’; print: tp2; cr; cr;
append: ’expected z(n) = tp2+(a*z(n-1)) = ’; print: tp2+(a*zn1); cr;
append: ’measured z(n) =’; print: zn; cr; cr;
append: ’expected y(n) = (c*z(n))+(d*z(n-1))+(e*z(n-1)/(2↑k)) = ’; print: (c*zn)+(d*zn1)+(e*zn1/(2↑k)); cr;
append: ’measured y(n) =’; print: yn; cr; cr.
]

reportV | file sect
[user cr; show: ’Analyzing results.’; cr; show: comment.
file ← dp0 file: ’Results.txt’.
file
append: comment; cr; append: ’Substrate voltage = ’+vSub; cr;
append: ’clockString = ’; print: clockString; cr;
append: ’results sampled during phase ’; print: phi; cr; cr.
file append: ’n= ’; print: self n; cr; cr.
file append: ’lwt=’; cr; append: ((self pin: ’lwt’) spaceEvery: 24); cr.
file append: ’lsbSource=’; cr; append: ((self pin: ’lsbSource’) spaceEvery: 24); cr.
file append: ’zna=’; cr; append: ((self pin: ’zna’) spaceEvery: 24); cr.
file append: ’zn1a=’; cr; append: ((self pin: ’zn1a’) spaceEvery: 24); cr.
file append: ’znb=’; cr; append: ((self pin: ’znb’) spaceEvery: 24); cr.
file append: ’zn1b=’; cr; append: ((self pin: ’zn1b’) spaceEvery: 24); cr.
file close.
]

̃

SystemOrganization classify:  FOSTester under: ’Integrated Circuits’.̃