88008866 AASSSSEEMMBBLLEERR MMAANNUUAAL

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8086                            1                      March 1979
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                     The 8086 Cross Assembler


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1. General Description


     The 8086 Cross Assembler is based on the  same  system  that
produced  the 8080 and 6800 Assemblers. This system is written in
BCPL and has been transported to a number of  machines.  In  this
particular  Assembler  ,  the  syntax  of  the each line has been
defined without reference to the manufacturers  Assembler,  which
is  not  available  in Cross form. In fact we do not consider the
manufacturers Assembler to be particularily useful for us , as it
is  a  heavily typed system requiring all variables to be defined
before use. The Linkage Editor on the 360/195 has  been  used  to
provide  linking  of  previously  assembled  subroutines,  and to
provide library services.

←←←←←←←←←
2. Syntax


     The general syntax  is  the  same  as  that  for  the  other
assemblers,  this  can  be  seen  in  the  "CERN  M6800 Assembler
Manual". In particular , all the Pseudo operations are  the  same
as  in  that  document  and  so  are  the  rules  for calculating
expressions and for using macros. The error messages produced are
the  same  and  this  manual  should  be  consulted whenever this
document does not define usage of  a  particular  operation.  The
manufacturers   manual   "The  MCS-86  USERS  MANUAL"  should  be
consulted to see what the instructions do.


     The following symbols still have the same meaning as in  the
6800 Assembler.
      $     The current value of the PC
      #     Introducing a Hex constant
      "     Introducing and ending either
            (a) astring
            (b) a single character
      !     An immediate (literal value 8 or 16 bits)
      *     Introduces a comment line
















8086                            2                      March 1979
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                     The 8086 Cross Assembler


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3. Instruction Syntax

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3.1 General


     The general format of each instruction line is

      LABEL OPERATOR    OPERAND     COMMENT
where the various fields are seperated by spaces and where  LABEL
if present must begin in column 1. Multiple spaces are equivalent
to  single  spaces  and  spaces  are  significant  in  that  they
deliniate each field.

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3.2 Operators


     These are the same as in the "MCS-86  USERS  MANUAL"  except
for a few particular instrucions that are mentioned below.

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3.2.1 CALL and JMP Instructions

      CALL  FRED   Direct within segment
      JMP   FRED

      CALLI IFred Indirect within segment
      JI    IFred


      CALLS Fredoffest,Segment       Direct Inter-segment
      JMPS  Fredoffset,Segment

      CIS   Freddescriptor    Indirect Inter-segment
      JIS   Freddescriptor

      B     Fred  Forces a short jump within segment

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3.2.2 RET Instruction

      RET         Within segment
      RETS        Inter-segment (Either of the above instructions
                  may have an offset added to them)













8086                            3                      March 1979
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                     The 8086 Cross Assembler


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3.3 OPERANDS


     This structure has one of three main forms
      a) No Operand field
      b) A single operand
      c) Two operands seperated by a comma

     The  syntax  of  this  part  of  the  instruction  is  quite
complicated  and  so i will give an expanded BNF description with
some examples. The symbol ↑ means a  null  opernad  and
<operand>::=       <operand main>
<byte prefix>::=   &
<operand main>::=  <term>|<adr><term>|<adr>,<adr><term>
<adr>::=           <register>|<registerbase>|<immediate operand>|
                   <relitem>|
                   <absitem>
<register>::=      <8bitregister>|
                   <16bitregister>|
                   <segmentregister>
<8bitregister>::=  AL|AH|BL|BH|CL|CH|DL|DH
<16bitregister>::= AX|BX|CX|DX|SP|BP|SI|DI
<segmentregister>::=    CS|DS|ES|SS
<immediateoperand>::=   !<absitem>|!<relitem>
<registerbase>::=  (BX)|(BP)|(SI)|(DI)|
                   (BX,SI)|(BX,DI)|(BP,SI)|(BP,DI)
<absitem>::=       Absolute expression involving no relocatables
<relitem>::=       Relocatable expression (see manual)

<term>::=          ↑|<lock><term>|<byte><term>|<seg><term>
<lock>::=          [L......]
<byte>::=          [B......]
<seg>::=           [<segmentreg>]



















8086                            4                      March 1979
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                     The 8086 Cross Assembler


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3.3.1    Examples

      MOV   AL,AH             Move AH to AL
      MOV   AX,!#32          Move hex 32 to AX
      MOV   BX,!FRED         Move address of FRED to BX
      MOV   FRED+2,!2        Move 2 to FRED+2
      MOV   &FRED+2,!2       Move 2 to byte at FRED+2
      MOV   FRED+2,!2[B]     Same as above
      XCHG  SEM,AX[LOCK]     Lock bus and exchange SEM and AX
      JMP   FRED             Jump to location FRED
      RET                    Return from subroutine
      MOV   AX,(BP)[DS]      Move indirect from BP but  force  it
                             into data segment
      ADD   AX,2(BX)         Add AX+(BP+2)=>AX
      SUB   FRED(SI),AX      FRED+(SI)=>FRED(SI)
      MOV   AL,!"A"           Character A into AL
      CALLS 10,#400          Segnent Indirect. IP=10and CS=#4000
      REP                    Repeat next instruction
      MOV   FRED+2-ABST(BP,SI),!FRED+3-#40[B][L][ES]
                             Yes  it  is  possiblebut I dont know
                             what it means either

     Not  all  of  the  syntactic  forms  are  allowed  in   each
instruction and the requirements for each type of instruction are
given below.In general however for  the  two  address  form  must
            ←←←←←←←←←←←      ←←←←←←←←←←←←←←←←←←←←←←
either  be  a  register  or  an  immediate  operand.  If it is an
immediate operand it does not matter which way you write it .ie.
      MOV   !2,AX
      MOV   AX,!2 are the same.

























8086                            5                      March 1979
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                     The 8086 Cross Assembler


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3.3.2  Individual Instructions

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3.3.2.1  MOV

     All the two address forms are allowed. E.g.
      MOV   AX,FRED(SI)[L]
      MOV   MABEL,!2
      MOV   (BX,SI),BP

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3.3.2.2 PUSH,POP,INC,DEC,NEG,MUL,IMUL,DIV,IDIV,NOT,JI,CALLI,ESC

                                                    ←←
     Only the single address form can be used  and  no  immediate
operands  are allowed. PUSH and POP cannot work on byte registers
or addresses, if these are used the word form will be taken.
      POP   BP
      PUSH  (BP)
      MUL   2(BX)

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3.3.2.3 XCHG,LEA,LDS,LES

                                          ←←←←←←←←←←←←←←←←←←
     All the two address forms apart from immediate operands  are
allowed.
      XCHG  FRED+2,BX

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3.3.2.4 IN,OUT,INW,OUTW

                                       ←←←←←←
     Single address form which must be either an  absolute  value
                              ←←
les than 255 or there must be no operand.
      IN    #E3
      OUTW

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3.3.2.5 ADD,ADC,SUB,SBB,CMP,TEST,AND,OR,XOR


     ←←←                       ←←←←←←
     All the two address forms except that the register  operands
must not be segment registers.
      ADD   FRED,!FRED
      TEST  AL,AH

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3.3.2.6 SHR,SHL,SAR,ROL,ROR,RCL,RCR

     Either one or two  address  forms  are  allowed.  The  first
              ←←←
address  must not be an immediate operand, and the second address
←←
if present must be CL.
      RCR   AX
      SHR   FRED+2,CL

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3.3.2.7 CALL,JMP,JE,JZ....etc

                                         ←←←←
     This is a single address form which must  be  a  relocatable
                           ←←←←
item.  This  mut  contain  only  labels  within  the  program and
absolute numbers.


8086                            6                      March 1979
                     ←←←←←←←←←←←←←←←←←←←←←←←←
                     The 8086 Cross Assembler


      JNE   MABEL
      JG    MABEL-3

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3.3.2.8 CALLS,JMPS

          ←←←←
     This must be a two address form, where both operands must be
absolute items.
      CALLS 0,#300

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3.3.2.9 INT

     Either one address or none. If it is an address it must be <
255.
      INT
      INT   #12

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3.3.2.10 All other instructions

     Thease do not have any operands



































8086                            7                      March 1979
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                     The 8086 Cross Assembler



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3.4 Byte and Word Addressing


     In many cases which involve both byte and word operands, the
assembler  can  correctly deduce which the operand should be , by
looking at the register type. E.g.
      MOV   AX,FRED
      AND   BX,!2
will both require word operands. In the first example  a  16  bit
word  starting  at  address  FRED  will  be  moved into the 16bit
accumulator,AX. In the other example,  the  immediate  operand  2
will be forced tobe 16 bits long. And similarily
      MOV   AL,FRED
      ADD   BX,!2
will work on byte operands.In the first  example  the  8bit  byte
starting at FRED is moved into the lower 8bit accumulator.

     For some instructions, however, it is  not  obvious,  wether
the  operand  should be 16 ior 8 bits long. The following type of
instructions involving an immediate operand are a particular  set
of instructions of this type.

      MOV   FRED,!2
      ADD   FRED,!#40
Should these be treated as bytes or words? In this assembler such
instructions  are,  by  default, treated as 16 bit words , if you
wish to move 2 into the byte starting at FRED you must write
      MOV   &FRED,!2
or    MOV   FRED,!2[BYTE]
or    MOV   FRED,!2[B]
(the letters after the B in square brackets are irrelevant)






















8086                            8                      March 1979
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                     The 8086 Cross Assembler


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3.5 The LOCK mechanism


     The 8086 has a mechanism for locking a bus while a processor
makes  an important transaction that must not be interfered with.
It can do this by prefixing an instruction with  a  special  byte
which  prevents  any other processor from using the bus until the
following instruction has completed. This is different  from  the
normal  situation  where  processors  compete on a cycle by cycle
access to the bus. The syntax used by this  assembler  to  assert
this  locking  mechanism  is  to  add  a  suffix  to  the operand
expression  of  the  form  [L....]  (letters  after  the  L   are
irrelevant. ) . Thus
      XCHG  AX,SEMAPHORE[LOCK]
This suffix may occur in any order with the byte suffix,  [B...],
or the segment suffix [<segment register>]

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3.6 The segment suffix

     In order to force the assembler to take its operand from its
default  segment  (usually the data segement ,DS) it is nessecary
to add another prefix to the instrucion involved. Again a  suffix
in the assembler of the form
                      [<segment register>]
must be used. Thus
      MOV   FRED,!2[ES]      will move 2 into the address FRED as
                             an  offset  in the Extra Segment.Any
                             of the segments may be used by using
                             [ES],[DS],[SS],[CS].Thus forcing the
                             processor to take or put operands in
                             a different segment.
In particular, instructions using BP as a base register  use  the
Stack  Segment , by default. To force the Efffective address into
the Data Segment we must write
      MOV   AX,8(BP)[DS]



















8086                            9                      March 1979