; Microcode for Spruce -- Orbit, TriCon ; PackMu XSpruceMc.Mb SpruceMc.Br 77764 #SpruceDefs.mu; ; Initial Instructions for RAM tasks !17,20,NOVEM,ORBIT,,LOC3,,,,,,,,,,,LOC16,LOC17; 0-17 ; (There is a hack in the read microcode that causes the reset location for task 16 to be used. This means ; that it is not possible to run task 16 (= Diablo disk word task) in the Ram.) ; RAM entry points: RMR set, special Spruce Interpretation operations, PC link returns, Ram Trap code !17,20,START,LOC21,LOC22,ROWROT,FlushChars,ShowChars,Mret,DoR,BandEnter,BankBlt,,,,,,RamTrap; 20-37 ; (177026 is PC-return code passed to MUL in uses update code within ShowChars, so Mret is 26 ; DoR is modified during LOADR, STORER instructions to do the actual register manipulation) ;*** This code is carefully placed in the RAM for an emulator "no-op boot". Boot locus bit 15 must be 0. NOVEM: SWMODE; :START; ;***This instruction will cause the boot-locus-vector to be set to the value in AC0 at the next boot ;JumpRam(20b) or (22b) will set reset mode register -- one was Spruce convention, the other Trident START: RMR_AC0, :NOVEM; this location (20) is emulator's START in ROM! LOC22: RMR_AC0,:NOVEM; ; RAM TRAP -- used for GetFrame, Return, LOADR, STORER (R-reg read/write) ; This code derived from [*]BcplRunTimeSources.dm(RamTrap.mu) ; Trap handler and dispatcher for instructions that trap into the RAM. In the following predefinition, ; the tags correspond to opcodes 60000, 60400, 61000, 61400, ... 77400. Note that opcodes 60000, 60400, ; 61000, 64400, 65000, 67000, and 77400 cannot be used since control never gets to the RAM for these. ; 61400 62000 70000 70400 71000 71400 !37, 40, TrapDispatch,,,GetFrame, Return,,,,,,,,,,,,StoreR, StoreS, LoadR, LoadS; ;; STORER is Nova instruction 70000. STORER r*8 does [ @AC0_r; AC0_AC0+1 ]. ;; LOADR is Nova instruction 71000. LOADR r*8 does [ r_@AC0; AC0_AC0+1 ]. ;; If r is an S-Register, this approach will turn STORER into STORES and LOADR into LOADS. RamTrap: instr_L; Added by DCS to retain original for IR dispatch later T_37; L_XREG AND T; TrapDispatch: ;Can't loop here because opcode 60000 doesn't cause RamTrap SINK_LREG, BUS, TASK; :TrapDispatch; %2,3,1, DoSto, DoLd; Kill low bit of IR dispatch, below %1,1777,1772, DoSt1, RQuit; DoSt1 must be at 1772; DoR goes to 1772 or 1773 StoreS: T_60; L_0, :LoadStore; StoreR: L_T_0, :LoadStore; LoadS: T_100, :LS1; LoadR: T_20; LS1: L_2000; LoadStore: low_L, L_T; T_XREG; XREG_L; T_177400.T; T_7+T+1; L_XREG+T, TASK; XREG_L; ** MakeLow: T_low; L_101771+T+1; low_L; L_XREG; T_27, WRTRAM; L_low; ; one cycle IR_instr; MAR_AC0, :DoSto; [DoSto, DoLd] DoSto: SINK_0, BUS, :DoR; DoSt1: MD_LASTL, :RQuit; DoLd: NOP; ;available ;available L_MD; SINK_0+1, BUS, :DoR; RQuit: L_AC0+1, TASK; AC0_L, :NOVEM; ** DoR: NOP, :DoSt1; [DoSt1, Rquit] L_R or R_L -- rewritten before execution each time ; BankBlt(from, to, size) -- all assumed even ; from = AC0 ; to = AC2 ; size = AC3, assumed even !1,2, BankGo, BankDone; BankBlt: T_AC3; L_AC0+T; AC0_L; L_AC2+T; AC2_L, :lp1; BankLoop: T_AC3; lp1: MAR_AC0-T; L_-2+T; AC3_L, SH<0; NOP, :BankGo; BankGo: L_MD; MTEMP_L; L_MD; XMAR_AC2-T; NOP; MD_MTEMP, TASK; MD_LASTL, :BankLoop; ** BankDone: TASK; :NOVEM; ** #TriConBody.Mu; From [*]TFSSources.dm #GetFrame.Mu; From [*]BcplRuntimeSources.dm #XOrbitMc.Mu; The body of the Orbit microcode ;;#RowRotateMc.Mu; The Spruce row rotation microcode ;;#ShowCharMc.Mu; Spruce Showchars inner loop! ;; DCS, December 5, 1977 5:40 PM, derived from OrbitMc and Tricon Microcode ;; December 27, 1977 2:21 PM, Reassign R71-R76 to get out of Tricon's way ;; March 6, 1978 4:29 PM, becomes "command" file with TriCon's improvement; add RowRotate ;; October 3, 1978 11:49 AM, add ShowCharMc ;; October 19, 1978 8:11 AM, add LOADR, STORER RamTrap instructions ;; October 20, 1978 12:01 PM, add SpruceDefs, reorganize, add Taft-style RAM Trap code ;; October 23, 1978 6:51 AM, add FlushChars at 24 ;; April 5, 1979 9:39 AM, version that includes XM font microcode ;; April 7, 1979 4:00 PM, add BankBlt(from,to,size) at 31 -- all args must be even, requires Alto II ;; January 29, 1980 10:51 AM, derived from XSpruceMC.mu ;; k40\f0