-- File: [Indigo]<Sakura>Dragon>DragonProcessorImpl.sak
-- Dragon processor
--  7-Mar-82 21:35:36

DIRECTORY
  DragonCache,
  DragonProcessor,
  SakuraRT,
  SimIO;
  
DragonProcessorImpl: MONITOR
  IMPORTS SakuraRT, SimIO 
  EXPORTS DragonProcessor = {

  Processor: PUBLIC DEVICE = {
    IN ClockA, ClockB, Fault, Reject: BOOLEAN, InData: LONG CARDINAL
    OUT Op: DragonCache.PbusOp, RQ: BOOLEAN, OutData: DragonCache.PbusType
    GUARDIAN {}
    CONTROL {
      Fetch: PROC [vp: LONG CARDINAL, bl: [0..37B], word: [0..3]]= {
        printval: LONG CARDINAL ← word+bl*4+vp*128;
	WHEN ClockB UP: {
	  RQ ← TRUE;
	  Op ← Fetch;
	  OutData ← [Instruction[vp, bl, word]]};
	DO
	  WHEN ClockA UP: IF ~Reject THEN EXIT;
	  ENDLOOP;
	SimIO.WF1["  Fetch started %ld*n", @printval];
	WHEN ClockB UP: RQ ← FALSE;
	SimIO.WF1["  Fetch finished %ld*n", @printval]};
      
      Store: PROC [vp: LONG CARDINAL, bl: [0..37B], word: [0..3], 
          data: LONG CARDINAL]= {
        printval: LONG CARDINAL ← word+bl*4+vp*128;
        WHEN ClockB UP: {
	  RQ ← TRUE;
	  Op ← Store;
	  OutData ← [Instruction[vp, bl, word]]};
	DO
	  WHEN ClockA UP: IF ~Reject THEN EXIT;
	  ENDLOOP;
	SimIO.WF1["    Store started %ld*n", @printval];
	WHEN ClockB UP: OutData ← [Data[data]]; -- Match
	WHEN ClockB UP: RQ ← FALSE;
	SimIO.WF1["    Store finished %ld*n", @printval]};
	
      RQ ← FALSE;
      WHEN ClockB UP: NULL;
      WHEN ClockB UP: NULL;
      Fetch[0,0,1];
      Fetch[0,0,2];
      Fetch[0,0,3];
      Fetch[0,1,0];
      Store[0,1,3,7];
      Store[0,2,1,9];
      Store[0,0,2,2];
      }
    };
    
  }.