<> <> Imports BitOps, RoseCreate, RoseRun; Open RoseRun; CEDAR WordCount: CARDINAL = 4; WordSize: CARDINAL = 4; WordLines: TYPE = LONG POINTER TO ARRAY [0 .. WordCount) OF WordLine; WordLine: TYPE = MACHINE DEPENDENT RECORD [ fill0(0:0..14): [0 .. 32768), read(0:15..15): BOOL, fill1(1:0..14): [0 .. 32768), write(1:15..15): BOOL]; Word: TYPE = PACKED ARRAY [0 .. WordSize) OF BOOL; ; Memory: CELL [Read0, Write0, Read1, Write1, Read2, Write2, Read3, Write3 < BOOL, bitLines = SWITCH[4]-X] State words: ARRAY [0 .. WordCount) OF Word, lastRead: ARRAY [0 .. WordCount) OF BOOL Initializer FOR word: CARDINAL IN [0 .. WordCount) DO lastRead[word] _ FALSE ENDLOOP; PropQ TRUSTED { wordLines: WordLines _ LOOPHOLE[cell.realCellStuff.newIOAsWP]; FOR word: CARDINAL IN [0 .. WordCount) DO IF wordLines[word].read THEN FOR bit: CARDINAL IN [0 .. WordSize) DO IF words[word][bit] THEN bitLines[bit].s[q] _ drive; ENDLOOP; ENDLOOP} PropUD TRUSTED { wordLines: WordLines _ LOOPHOLE[cell.realCellStuff.newIOAsWP]; FOR word: CARDINAL IN [0 .. WordCount) DO IF wordLines[word].read THEN FOR bit: CARDINAL IN [0 .. WordSize) DO IF words[word][bit] THEN bitLines[bit].s[d] _ drive; ENDLOOP; ENDLOOP} ValsChanged TRUSTED { wordLines: WordLines _ LOOPHOLE[cell.realCellStuff.newIOAsWP]; FOR word: CARDINAL IN [0 .. WordCount) DO IF wordLines[word].write THEN FOR bit: CARDINAL IN [0 .. WordSize) DO words[word][bit] _ bitLines[bit].val = H; ENDLOOP; ENDLOOP} EvalSimple TRUSTED { wordLines: WordLines _ LOOPHOLE[cell.realCellStuff.newIOAsWP]; readdif: BOOLEAN _ FALSE; FOR word: CARDINAL IN [0 .. WordCount) DO IF wordLines[word].write THEN FOR bit: CARDINAL IN [0 .. WordSize) DO words[word][bit] _ sw.bitLines[bit].val = H; ENDLOOP; readdif _ readdif OR wordLines[word].read # lastRead[word]; lastRead[word] _ wordLines[word].read; ENDLOOP; IF readdif THEN PerturbPort[cell, MemoryBitLinesPortIndex]; <> <> <> } ENDCELL; Driver: CELL [bitLines = SWITCH[4]-X, asInt = INT[4], drive < BOOL] InittableState wasDriven: BOOL _ FALSE, lastDriven: [0 .. 16) _ 0 PropQ IF newIO.drive THEN FOR bit: CARDINAL IN [0 .. WordSize) DO bitLines[bit].s[q] _ drive; ENDLOOP PropUD IF newIO.drive THEN FOR bit: CARDINAL IN [0 .. WordSize) DO IF BitOps.EBFW[newIO.asInt, 4, bit] THEN bitLines[bit].s[u] _ drive ELSE bitLines[bit].s[d] _ drive ENDLOOP EvalSimple IF drive # wasDriven OR (drive AND asInt # lastDriven) THEN { <> PerturbPort[cell, DriverBitLinesPortIndex]; wasDriven _ drive; lastDriven _ asInt} ENDCELL; MemoryExample: CELL NULL Expand asInt: INT[4]; drive: BOOL _ "TRUE"; bitLines: SWITCH[4]; Read0, Write0, Read1, Write1, Read2, Write2, Read3, Write3: BOOL; driver: Driver[]; memory: Memory[] ENDCELL