--SRHC.Mesa
--created by RoseTranslate from SRHC.Rose of 19-Mar-83 12:19:02 PST for Spreitzer.pa at 20-Oct-83 10:59:13 PDT
DIRECTORY
Rosemary, IntTypes, ExamplePrimitives;
SRHC: CEDAR PROGRAM
IMPORTS Rosemary, IntTypes, ExamplePrimitives =
BEGIN OPEN
Rosemary, IntTypes;
RegisterCells: PROC =
BEGIN
CreateSRHCPorts[];
RegisterCellClass[className: "SRHC",
expandProc: SRHCExpand,
ioCreator: CreateSRHCIO,initializer: InitializeSRHC,
evalProc: SRHCEval,testProc: NIL,
ioTemplate: NEW [SRHCIORec],
ports: SRHCPorts];
END;
CreateSRHCPorts: PROC =
BEGIN
SRHCPorts[0] ← [0, 1, "input", IntType[4], TRUE, FALSE];
SRHCPorts[1] ← [1, 1, "clock", IntType[1], TRUE, FALSE];
SRHCPorts[2] ← [2, 1, "output", IntType[4], FALSE, TRUE];
END;
SRHCIORef: TYPE = REF SRHCIORec;
SRHCIORec: TYPE = MACHINE DEPENDENT RECORD [
fill0(0:0..11): [0..4095],
input(0:12..15): [0..16),
fill1(1:0..14): [0..32767],
clock(1:15..15): BOOLEAN,
fill2(2:0..11): [0..4095],
output(2:12..15): [0..15]];
SRHCInitRef: TYPE = REF SRHCInitRec;
SRHCInitRec: PUBLIC TYPE = RECORD [
init: [0..15] ← 7
];
SRHCStateRef: TYPE = REF SRHCStateRec;
SRHCStateRec: TYPE = RECORD [
latched: [0..15] ← 0
];
SRHCExpand: ExpandProc = {
initRef: SRHCInitRef ← NARROW[initData];
BEGIN OPEN initRef;
temp: Node ← CreateNode[within: thisCell, name: "temp", type: IntType[4]];
[] ← CreateCell[within: thisCell, instanceName: "Pass", className: "PassBlock", interfaceNodes: "input:input, gate:clock, output:temp"];
--explicitly requested CEDAR:
--any old Cedar code may appear here
[] ← CreateCell[within: thisCell, instanceName: "Inv", className: "InvertBlock", interfaceNodes: "input:temp, output:output"];
END;
};
CreateSRHCIO: IOCreator = {
cell.realCellStuff.newIO ← NEW [SRHCIORec];
cell.realCellStuff.oldIO ← NEW [SRHCIORec];
};
InitializeSRHC: Initializer = {
IF leafily THEN
BEGIN
ioRec: SRHCIORef ← NARROW[cell.realCellStuff.newIO];
narrowedInitData: SRHCInitRef ← NARROW[initData];
state: SRHCStateRef ← NEW [SRHCStateRec];
cell.realCellStuff.state ← state;
BEGIN OPEN ioRec, narrowedInitData, state;
latched ← init
END;
END;
};
SRHCEval: EvalProc =
BEGIN
newIO: SRHCIORef ← NARROW[cell.realCellStuff.newIO];
oldIO: SRHCIORef ← NARROW[cell.realCellStuff.oldIO];
state: SRHCStateRef ← NARROW[cell.realCellStuff.state];
oldIO^ ← newIO^;
BEGIN OPEN newIO, state;
IF clock THEN latched ← input;
output ← IntNot[4, latched];
END;
END;
SRHCPorts: Ports ← NEW [PortsRep[3]];
RegisterCells[];
END.