<> <> <<_ CompareRead.log _ StructuredStreams.Create[CompareRead.log]>> <<_ &d _ CompareRead.ReadDesign["[Indigo]2.6>ShiftCap>ShiftCap-Dir.DF"]>> <<_ CompareTransforms.CheckDesign[&d, TRUE]>> <> <> <<_ CompareWrite.WriteDesign[&d, "ShiftCapT1", "[Indigo]2.6>ShiftCap>"]>> (LowerChild "NBitSR[n: 5B (5)]" "cnt" (VVMapFromTIINames ("TopNBitSR[n: 5B (5)]" "shifter" "cntr")))