(CellTypeName "RequestDrive")
(CreationTime "December 2, 1984 5:26:51 pm PST")
(CreatingUser "Spreitzer.pa")
(CreationSite "MilkyWay Sol III USA Xerox PARC ComputerResearch Aquaba")
(DerivingProgram "Rosemary Structure Capturer" "1954ef3230f9")
(Ports
	("Request" (G D) (BIDIR))
	("Grant" (G D) (BIDIR))
	("PhA" (G D) (BIDIR))
	("nPhA" (G D) (BIDIR))
	("PhB" (G D) (BIDIR))
	("Keep" (G D) (BIDIR))
	("NoRequest" (G D) (BIDIR))
	("RqOut" (G D) (BIDIR))
	("nlRq" (G D) (BIDIR))
	("Vdd" (G D) (BIDIR))
	("Gnd" (G D) (BIDIR))
	("BiasMinus" (G D) (BIDIR))
	("BiasPlus" (G D) (BIDIR)))

(PrivateFollows)
(N "BiasMinus" (G D))
(N "BiasPlus" (G D))
(N "Gnd" (G D))
(N "Grant" (G D))
(N "Keep" (G D))
(N "NoRequest" (G D))
(N "PhA" (G D))
(N "PhB" (G D))
(N "Request" (G D))
(N "RqOut" (G D))
(N "Vdd" (G D))
(N "lRequest" (G D))
(N "nPhA" (G D))
(N "nRequest" (G D))
(N "nlRq" (G D))
(N "t1" (G D))
(N "t2" (G D))
(N "t3" (G D))
(N "t4" (G D))
(PN "Request" "Request")
(PN "Grant" "Grant")
(PN "PhA" "PhA")
(PN "nPhA" "nPhA")
(PN "PhB" "PhB")
(PN "Keep" "Keep")
(PN "NoRequest" "NoRequest")
(PN "RqOut" "RqOut")
(PN "nlRq" "nlRq")
(PN "Vdd" "Vdd")
(PN "Gnd" "Gnd")
(PN "BiasMinus" "BiasMinus")
(PN "BiasPlus" "BiasPlus")
(CI "i1" "Inverter" (G D)
	(CIC
		("in" "Request")
		("out" "nRequest")
		("Vdd" "Vdd")
		("Gnd" "Gnd")))
(CI "i2" "Inverter" (G D)
	(CIC
		("in" "nlRq")
		("out" "lRequest")
		("Vdd" "Vdd")
		("Gnd" "Gnd")))
(CI "k1" "Transistor[strength: drive, positive: TRUE, mode: Enhancement, unidirectional: FALSE, biased: FALSE, offStrength: none]" (G D)
	(CIC
		("gate" "lRequest")
		("ch1" "t1")
		("ch2" "Keep")))
(CI "k2" "Transistor[strength: drive, positive: TRUE, mode: Enhancement, unidirectional: FALSE, biased: FALSE, offStrength: none]" (G D)
	(CIC
		("gate" "Grant")
		("ch1" "t2")
		("ch2" "t1")))
(CI "k3" "Transistor[strength: drive, positive: TRUE, mode: Enhancement, unidirectional: FALSE, biased: FALSE, offStrength: none]" (G D)
	(CIC
		("gate" "PhB")
		("ch1" "Gnd")
		("ch2" "t2")))
(CI "l1" "NonInvertingLatch" (G D)
	(CIC
		("Clock" "PhA")
		("D" "nRequest")
		("Q" "nlRq")
		("Vdd" "Vdd")
		("Gnd" "Gnd")
		("BiasMinus" "BiasMinus")))
(CI "n1" "Transistor[strength: drive, positive: TRUE, mode: Enhancement, unidirectional: FALSE, biased: FALSE, offStrength: none]" (G D)
	(CIC
		("gate" "lRequest")
		("ch1" "t3")
		("ch2" "NoRequest")))
(CI "n2" "Transistor[strength: drive, positive: TRUE, mode: Enhancement, unidirectional: FALSE, biased: FALSE, offStrength: none]" (G D)
	(CIC
		("gate" "PhB")
		("ch1" "Gnd")
		("ch2" "t3")))
(CI "p1" "StaticPrecharge" (G D)
	(CIC
		("clock" "nPhA")
		("out" "RqOut")
		("Vdd" "Vdd")
		("Gnd" "Gnd")
		("BiasPlus" "BiasPlus")))
(CI "s1" "Transistor[strength: drive, positive: TRUE, mode: Enhancement, unidirectional: FALSE, biased: FALSE, offStrength: none]" (G D)
	(CIC
		("gate" "lRequest")
		("ch1" "t4")
		("ch2" "RqOut")))
(CI "s2" "Transistor[strength: drive, positive: TRUE, mode: Enhancement, unidirectional: FALSE, biased: FALSE, offStrength: none]" (G D)
	(CIC
		("gate" "PhB")
		("ch1" "Gnd")
		("ch2" "t4")))