DIRECTORY Asserting, BasicTime, BitTwiddling, Core, CoreFlatten, CoreOps, CoreProperties, CoreRecord, GetMe, IO, PrincOps, PrincOpsUtils, Rope, RoseBehavior, RoseBind, RoseControl, RoseDisplay, RoseEngine, RosePrivates, RoseSimTypes, RoseWireTwiddling, RoseWireTypes, TimeStamp;RoseConverter: CEDAR PROGRAMIMPORTS CoreFlatten, CoreProperties, RoseSimTypesEXPORTS RoseDisplay, RoseEngine=BEGIN OPEN RoseWireTypes, RoseSimTypes, RoseEngine, RoseDisplay;LookupCI: PUBLIC PROC [sim: Simulation, is: InstanceSource] RETURNS [rci: RoseCellInstance--NIL if not found--] = {found: CellInstance _ NIL;FOR il: CellInstanceList _ sim.rootRecordType.instances, il.rest WHILE il # NIL DOi: CellInstance = il.first;iis: InstanceSource = NARROW[CoreProperties.GetProp[i.properties, CoreFlatten.instanceSource]];IF InstanceSourceMatch[is, iis] THEN {found _ i; EXIT};REPEATFINISHED => RETURN [NIL];ENDLOOP;rci _ NARROW[CoreProperties.GetProp[found.properties, roseCellKey]];IF rci = NIL THEN ERROR;};InstanceSourceMatch: PROC [is1, is2: InstanceSource] RETURNS [match: BOOL] = {ip1: CoreFlatten.InstantiationPath _ is1.instantiationPath;ip2: CoreFlatten.InstantiationPath _ is2.instantiationPath;IF is1.instance # is2.instance THEN RETURN [FALSE];WHILE ip1#NIL OR ip2#NIL DOIF ip1 = NIL OR ip2 = NIL THEN RETURN [FALSE];IF ip1.first # ip2.first THEN RETURN [FALSE];ip1 _ ip1.rest;ip2 _ ip2.rest;ENDLOOP;match _ TRUE;};NotifyOnChange: PUBLIC PROC [sim: RoseControl.Simulation,who: CoreFlatten.WireSource,Notify: PROC [who: CoreFlatten.WireSource,asRope: Rope.ROPE,data: REF ANY],data: REF ANY,op: AddRemove] = {ERROR --not yet implemented--;};Start: PROC = {};Start[];END.     RoseConverter.mesaCopyright c 1985 by Xerox Corporation.  All rights reversed.Barth, August 1, 1985 2:31:39 pm PDTSpreitzer, September 25, 1985 3:41:36 pm PDTRelative to the root of the simulation.A NIL who.InstantiationPath means all instances of who.wire. Ê¡  –"cedar" style˜ –"Cedar" stylešœ™Jšœ
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