DIRECTORY IO, Rope;Core: CEDAR DEFINITIONS = BEGINROPE: TYPE = Rope.ROPE;Properties: TYPE = REF PropertyRec;PropertyRec: TYPE;StructureError: SIGNAL [type: StructureErrorType, message: ROPE, data: REF ANY _ NIL] RETURNS [newData: REF ANY _ NIL];StructureErrorType: TYPE = {DuplicateName, InvariantFailed, MissingParameter, NoSuchName};Design: TYPE = REF DesignRec;DesignRec: TYPE = RECORD [name: ROPE _ NIL,data: DesignData _ NIL,properties: Properties _ NIL];DesignData: TYPE = REF DesignDataRec;DesignDataRec: TYPE;Wire: TYPE = REF WireRec;WireRec: TYPE = RECORD [name: ROPE _ NIL,significance: WireSignificance _ internal,structure: WireStructure _ atom,elements: WireSequence _ NIL,properties: Properties _ NIL];WireSignificance: TYPE = {public,	--part of a cell type's public wire, but not internalinternal,	--part of a cell type's internal wire, but not publicpublicInternal, --a public part of a cell type's internal wireactual	--part of the actual wire of some cell instance, but not part of parent's internal wire};WireStructure: TYPE = {sequence, record, atom};WireSequence: TYPE = REF WireSequenceRec;WireSequenceRec: TYPE = RECORD [c: SEQUENCE size: NAT OF Wire];CellClass: TYPE = REF CellClassRec;CellClassRec: TYPE = RECORD [name: ROPE,expand: ExpandProc,write: WriteProc,read: ReadProc,properties: Properties _ NIL];ExpandProc: TYPE = PROC [design: Design, me: CellType] RETURNS [new: CellType];WriteProc: TYPE = PROC [design: Design, out: IO.STREAM, me: CellType];ReadProc: TYPE = PROC [design: Design, in: IO.STREAM] RETURNS [me: CellType];CellType: TYPE = REF CellTypeRec;CellTypeRec: TYPE = RECORD [name: ROPE,class: CellClass, publicWire: Wire,data: REF ANY _ NIL,	properties: Properties _ NIL];END.  ╚  Core.mesa	Copyright c 1985 by Xerox Corporation.  All rights reserved.Last Edited by: Barth, August 1, 1985 10:58:43 am PDTLast Edited by: Serlet, July 11, 1985 3:35:55 pm PDTSpreitzer, August 3, 1985 5:46:47 pm PDTTheoryThis interface defines the basic data structures for the Core design automation system.  It is actually a general decomposition facility that breaks designs down into cells which are then bound together.  Any of the procedures which implement operations upon these types may raise StructureError[InvariantFailed].  This indicates that the implementation has a bug in it.  Clients should notify the maintainers should this occur. Common Types and ErrorsDesignsWiresCell ClassesA cell class must have expand, read and write procedures (except RecordCell and Transistor classes elide the expand proc).An expand proc may or may not return a unique copy of the expansion.Cell TypesCellTypes may not share any part of a publicWire. Э╩.  Ш JЦ"Cedar" styleЪЬ
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