
    <<SimpleTest.Mesa>>
    <<created by RoseTranslate 3.0.0 of April 28, 1985 2:57:17 pm PDT from SimpleTest.Rose of April 28, 1985 3:47:59 pm PDT>>
    <<created for Spreitzer.pa>>
    <<created at April 28, 1985 3:48:08 pm PDT>>


    DIRECTORY
        RoseTypes, RoseCreate, IO, NumTypes, SwitchTypes, PrintTV, AMBridge;

    SimpleTest: CEDAR PROGRAM
        IMPORTS RoseCreate, IO, NumTypes, PrintTV, AMBridge
        EXPORTS 

    = BEGIN OPEN
        RoseTypes;

    <<Signal Type decls>>


    RegisterCells: PROC =
        BEGIN
        [] _ RoseCreate.RegisterCellType[name: "Inverter",
            expandProc: NIL,
            ioCreator: CreateInverterIO, driveCreator: CreateInverterDrive, 
            evals: [EvalSimple: InverterEvalSimple],
            tests: LIST[],
            ports: CreateInverterPorts[]
            ];
        [] _ RoseCreate.RegisterCellType[name: "Driver",
            expandProc: NIL,
            ioCreator: CreateDriverIO, driveCreator: CreateDriverDrive, 
            evals: [EvalSimple: DriverEvalSimple],
            tests: LIST[],
            ports: CreateDriverPorts[]
            ];
        [] _ RoseCreate.RegisterCellType[name: "Incrementer",
            expandProc: NIL,
            ioCreator: CreateIncrementerIO, driveCreator: CreateIncrementerDrive, 
            evals: [EvalSimple: IncrementerEvalSimple],
            tests: LIST[],
            ports: CreateIncrementerPorts[]
            ];
        END;
    otherss: SymbolTable _ RoseCreate.GetOtherss["SimpleTest.pass"];

    CreateInverterPorts: PROC RETURNS [ports: Ports] = {ports _ RoseCreate.PortsFromFile["SimpleTest.Inverter.rosePorts"]};

    InverterSwitchIORef: TYPE = REF InverterSwitchIORec;
    InverterSwitchIORec: TYPE = RECORD [
        in: SwitchTypes.SwitchVal,
        out: SwitchTypes.SwitchVal,
        roseTranslateEndDummy: [0 .. 0] _ 0];

    InverterSimpleIORef: TYPE = REF InverterSimpleIORec;
    InverterSimpleIORec: TYPE = RECORD [
        in: BOOLEAN,
        out: BOOLEAN,
        roseTranslateEndDummy: [0 .. 16383] _ 0];

    InverterDriveRef: TYPE = REF InverterDriveRec;
    InverterDriveRec: TYPE = RECORD [driveRecordInitialPadding: DriveTagType, drive: PACKED ARRAY InverterPort OF DriveLevel];
    InverterPort: TYPE = MACHINE DEPENDENT {
        in, out, (3)};

    CreateInverterIO: PROC [ct: CellType, switch: BOOL] RETURNS [ioAsAny: REF ANY] --IOCreator-- = {
        ioAsAny _ IF switch THEN NEW[InverterSwitchIORec] ELSE NEW[InverterSimpleIORec];
        };

    CreateInverterDrive: PROC [ct: CellType] RETURNS [driveAsAny: REF ANY] --DriveCreator-- = {
        driveAsAny _ NEW[InverterDriveRec];
        };

    InverterEvalSimple: SimpleEval =
        BEGIN
        drive: InverterDriveRef _ NARROW[cell.realCellStuff.newDriveAsAny];
        sw: InverterSwitchIORef _ NARROW[cell.realCellStuff.switchIO];
        newIO: InverterSimpleIORef _ NARROW[cell.realCellStuff.newIO];
            BEGIN OPEN drive, newIO;
            out _ NOT in
            END;
        END;

    CreateDriverPorts: PROC RETURNS [ports: Ports] = {ports _ RoseCreate.PortsFromFile["SimpleTest.Driver.rosePorts"]};

    DriverSwitchIORef: TYPE = REF DriverSwitchIORec;
    DriverSwitchIORec: TYPE = RECORD [
        in: PACKED ARRAY [0 .. 16) OF SwitchTypes.SwitchVal,
        out: PACKED ARRAY [0 .. 16) OF SwitchTypes.SwitchVal,
        str: PACKED ARRAY [0 .. 4) OF SwitchTypes.SwitchVal,
        roseTranslateEndDummy: [0 .. 0] _ 0];

    DriverSimpleIORef: TYPE = REF DriverSimpleIORec;
    DriverSimpleIORec: TYPE = RECORD [
        in: CARDINAL,
        out: CARDINAL,
        str: [0..15],
        roseTranslateEndDummy: [0 .. 4095] _ 0];

    DriverDriveRef: TYPE = REF DriverDriveRec;
    DriverDriveRec: TYPE = RECORD [driveRecordInitialPadding: DriveTagType, drive: PACKED ARRAY DriverPort OF DriveLevel];
    DriverPort: TYPE = MACHINE DEPENDENT {
        in, out, str, (3)};

    CreateDriverIO: PROC [ct: CellType, switch: BOOL] RETURNS [ioAsAny: REF ANY] --IOCreator-- = {
        ioAsAny _ IF switch THEN NEW[DriverSwitchIORec] ELSE NEW[DriverSimpleIORec];
        };

    CreateDriverDrive: PROC [ct: CellType] RETURNS [driveAsAny: REF ANY] --DriveCreator-- = {
        driveAsAny _ NEW[DriverDriveRec];
        };

    DriverEvalSimple: SimpleEval =
        BEGIN
        drive: DriverDriveRef _ NARROW[cell.realCellStuff.newDriveAsAny];
        sw: DriverSwitchIORef _ NARROW[cell.realCellStuff.switchIO];
        newIO: DriverSimpleIORef _ NARROW[cell.realCellStuff.newIO];
            BEGIN OPEN drive, newIO;
            drive[out] _ VAL[str];
            out _ in;
            END;
        END;

    CreateIncrementerPorts: PROC RETURNS [ports: Ports] = {ports _ RoseCreate.PortsFromFile["SimpleTest.Incrementer.rosePorts"]};

    IncrementerSwitchIORef: TYPE = REF IncrementerSwitchIORec;
    IncrementerSwitchIORec: TYPE = RECORD [
        in: PACKED ARRAY [0 .. 16) OF SwitchTypes.SwitchVal,
        out: PACKED ARRAY [0 .. 16) OF SwitchTypes.SwitchVal,
        roseTranslateEndDummy: [0 .. 0] _ 0];

    IncrementerSimpleIORef: TYPE = REF IncrementerSimpleIORec;
    IncrementerSimpleIORec: TYPE = RECORD [
        in: CARDINAL,
        out: CARDINAL,
        roseTranslateEndDummy: [0 .. 0] _ 0];

    IncrementerDriveRef: TYPE = REF IncrementerDriveRec;
    IncrementerDriveRec: TYPE = RECORD [driveRecordInitialPadding: DriveTagType, drive: PACKED ARRAY IncrementerPort OF DriveLevel];
    IncrementerPort: TYPE = MACHINE DEPENDENT {
        in, out, (3)};

    CreateIncrementerIO: PROC [ct: CellType, switch: BOOL] RETURNS [ioAsAny: REF ANY] --IOCreator-- = {
        ioAsAny _ IF switch THEN NEW[IncrementerSwitchIORec] ELSE NEW[IncrementerSimpleIORec];
        };

    CreateIncrementerDrive: PROC [ct: CellType] RETURNS [driveAsAny: REF ANY] --DriveCreator-- = {
        driveAsAny _ NEW[IncrementerDriveRec];
        };

    IncrementerEvalSimple: SimpleEval =
        BEGIN
        drive: IncrementerDriveRef _ NARROW[cell.realCellStuff.newDriveAsAny];
        sw: IncrementerSwitchIORef _ NARROW[cell.realCellStuff.switchIO];
        newIO: IncrementerSimpleIORef _ NARROW[cell.realCellStuff.newIO];
            BEGIN OPEN drive, newIO;
            out _ in + 1
            END;
        END;

    ContestArgs: PUBLIC TYPE = RECORD [
        contestants: NAT];

    OldContest: TYPE = RECORD [args: ContestArgs, ct: CellType];
    oldContest: LIST OF OldContest _ NIL;
    Contest: PUBLIC PROC [args: ContestArgs] RETURNS [ct: CellType] =
        BEGIN
        FOR old: LIST OF OldContest _ oldContest, old.rest WHILE old # NIL DO
            IF old.first.args = args THEN RETURN [old.first.ct]
            ENDLOOP;
        ct _ RoseCreate.RegisterCellType[name: ContestName[args],
            expandProc: ContestExpand,

            evals: [],
            tests: LIST[],
            ports: CreateContestPorts[args]
            ,
            typeData: NEW [ContestArgs _ args]];
        oldContest _ CONS[[args, ct], oldContest];
        END;

    ContestName: PROC [args: ContestArgs] RETURNS [name: ROPE] = {
        to: IO.STREAM _ IO.ROS[]; to.PutRope["Contest"];
        TRUSTED {PrintTV.Print[tv: AMBridge.TVForReferent[NEW [ContestArgs _ args]], put: to]};
        name _ IO.RopeFromROS[to]};

    CreateContestPorts: PROC [args: ContestArgs] RETURNS [ports: Ports] =
        BEGIN OPEN args;
        ports _ NEW [PortsRep[contestants*2+1]];
        FOR i: NAT IN [0 .. contestants) DO
        ports[2*i] _ [
        simple: noField,
        switch: noField,
        name: IO.PutFR["c[%g].in", IO.int[i]],
        type: NumTypes.NumType[16],
        input: TRUE];
        ports[2*i+1] _ [
        simple: noField,
        switch: noField,
        name: IO.PutFR["c[%g].str", IO.int[i]],
        type: NumTypes.NumType[4],
        input: TRUE];
        ENDLOOP;
        ports[2*contestants] _ [
        simple: noField,
        switch: noField,
        name: "incedOutcome",
        type: NumTypes.NumType[16],
        output: TRUE];
        END;

    ContestExpand: PROC [thisCell: Cell, to: ExpansionReceiver] --ExpandProc-- = {
        args: REF ContestArgs _ NARROW[thisCell.type.typeData];
            {OPEN args;
            others: SymbolTable _ RoseCreate.GetOthers[otherss, "Contest"];

            <<explicitly requested CEDAR:>>
            [] _ to.class.NodeInstance[
            erInstance: to.instance,
            name: "outcome",
            type: NumTypes.NumType[16]];
            FOR i: NAT IN [0 .. contestants) DO
            [] _ to.class.CellInstance[
            erInstance: to.instance,
            instanceName: IO.PutFR["d[%g]", IO.int[i]],
            typeName: "Driver",
            interfaceNodes: IO.PutFR["in: c[%g].in, out: outcome, str: c[%g].str", IO.int[i], IO.int[i]]
            ];
            ENDLOOP;
            [] _ to.class.CellInstance[
            erInstance: to.instance,
            instanceName: "inc",
            typeName: "Incrementer",
            interfaceNodes: "in: outcome, out: incedOutcome"
            ];

            };
        };

    c3: PUBLIC CellType _ Contest[[3]];

    RegisterCells[];

    END.