Expand
in0, in1, in2, in3, out0, out1, out2, out3, shift0, shift1, shift2, shift3: BIT;
Equivalence [in0, in1, in2, in3], in;
Equivalence [out0, out1, out2, out3], out;
Equivalence [shift0, shift1, shift2, shift3], shift;
CEDAR
FOR i:
INT
IN [0 .. 4)
DO
[] ← to.class.CellInstance[
erInstance: to.instance,
instanceName: IO.PutFR["pcIn%g", IO.int[i]],
typeName: Transistors.nE.name,
interfaceNodes: IO.PutFR["gate: pc, ch1: in%g, ch2: vdd", IO.int[i]]
];
[] ← to.class.CellInstance[
erInstance: to.instance,
instanceName: IO.PutFR["pcOut%g", IO.int[i]],
typeName: Transistors.nE.name,
interfaceNodes: IO.PutFR["gate: pc, ch1: out%g, ch2: vdd", IO.int[i]]
];
FOR j:
INT
IN [0 .. 4)
DO
[] ← to.class.CellInstance[
erInstance: to.instance,
instanceName: IO.PutFR["bs%g-%g", IO.int[i], IO.int[j]],
typeName: Transistors.nE.name,
interfaceNodes: IO.PutFR["gate: shift%g, ch1: in%g, ch2: out%g", IO.int[(j + 4 - i) MOD 4], IO.int[i], IO.int[j]]
];
ENDLOOP;
ENDLOOP;