EquivTest.Rose
Last Edited by: Spreitzer, April 28, 1985 4:15:37 pm PDT
CELLTYPE "Driver16"
PORTS [in<Int[16], out>Int[16], str<Int[4]]
EvalSimple
drive[out] ← VAL[str];
out ← in;
ENDCELLTYPE;
CELLTYPE "Driver4"
PORTS [in<Int[4], out>Int[4], str<Int[4]]
EvalSimple
drive[out] ← VAL[str];
out ← in;
ENDCELLTYPE;
CELLTYPE "Contest"
PORTS []
Expand
a4, b4, ia4, ib4: Int[4];
a16, b16, ia16, ib16: Int[16];
sa4, sb4, sa16, sb16: Int[4] ←v "7";
Equivalence a4 cat a16, b16 cat b4;
da4: Driver4[ia4, a4, sa4];
db4: Driver4[ib4, b4, sb4];
da16: Driver16[ia16, a16, sa16];
db16: Driver16[ib16, b16, sb16]
ENDCELLTYPE