DIRECTORY Asserting, IO, OrderedSymbolTableRef, Rope, RoseEvents, VFonts;

RoseTypes: CEDAR DEFINITIONS =

BEGIN

Error: ERROR [msg: ROPE, data: REF ANY _ NIL];

Warning: SIGNAL [msg: ROPE, data: REF ANY _ NIL];

Stop: SIGNAL [msg: ROPE, data: REF ANY _ NIL];

LORA: TYPE = LIST OF REF ANY;
ROPE: TYPE = Rope.ROPE;
RopeList: TYPE = LIST OF ROPE;
STREAM: TYPE = IO.STREAM;
Assertion: TYPE = Asserting.Assertion;
Assertions: TYPE = Asserting.Assertions;
SymbolTable: TYPE = OrderedSymbolTableRef.Table;
WatcherList: TYPE = LIST OF Watcher;
Watcher: TYPE = RoseEvents.Watcher;

WordPtr: TYPE = LONG POINTER TO CARDINAL;

TwoToThe: ARRAY [0..16] OF LONG CARDINAL = [
1, 2, 4, 8,
16, 32, 64, 128,
256, 512, 1024, 2048,
4096, 8192, 16384, 32768,
65536];

NodeType: TYPE = REF NodeTypeRep;
NodeTypeRep: TYPE = RECORD [
procs: NodeProcs,
typeData: REF ANY,
simple: BOOLEAN _ TRUE,
other: Assertions _ NIL,
structure: SELECT structureType: StructureType FROM
atom => [],
array => [first, last: INTEGER, element: NodeType],
ENDCASE
];

StructureType: TYPE = {atom, array};

ArrayNodeType: TYPE = REF NodeTypeRep[array];
AtomNodeType: TYPE = REF NodeTypeRep[atom];

NodeProcs: TYPE = REF NodeProcsRep;
NodeProcsRep: TYPE = RECORD [
Bits: PROC [NodeType] RETURNS [INTEGER],
--how many bits does it take to represent--
MesaUse: PROC [NodeType] RETURNS [Mesa],
--the Mesa type of the representation--
MesaDefinition: PROC [NodeType] RETURNS [Mesa] _ NIL,
--Mesa code (e.g. declaration) to establish mesa type;--
--returning NIL means nothing necessary--
UserDescription: PROC [NodeType] RETURNS [ROPE],
MesaDescription: PROC [NodeType] RETURNS [Mesa],
--a Mesa expression that evaluates to this NodeType--
ListFormats: PROC [NodeType] RETURNS [RopeList],
GetFormat: PROC [NodeType, ROPE] RETURNS [Format],
MakeSubarrayType: PROC [nt: NodeType, first, last: INTEGER] RETURNS [NodeType] _ NIL,
MakeSplitJoin: PROC [within: Cell, a, b: StretchList, writeA, writeB: BOOLEAN, for: ExpansionReceiver] RETURNS [Cell] _ NIL,
MakeTransducer: PROC [myKind, otherKind: Node, within: Cell, writeMine, writeOther: BOOLEAN, for: ExpansionReceiver] RETURNS [Cell] _ NIL,
InitNode: PROC [node: Node, initData: REF ANY, steady: BOOL] _ NIL,
InitPort: PROC [Node, WordPtr] _ NIL,
InitQ, InitUD, NewVal: PROC [Node] _ NIL,
ComputeQ: PROC [Node, WordPtr] _ NIL,
CompareUD: PROC [nt: NodeType, wp1, wp2: WordPtr] RETURNS [diff: BOOL] _ NIL,
CopyUD, CopyVal: PROC [nt: NodeType, from, to: WordPtr] _ NIL,
ClearUD: PROC [nt: NodeType, at: WordPtr] _ NIL,
NewQ, NewUD: PROC [Node, WordPtr] RETURNS [BOOLEAN] _ NIL,
QFromNode, UDFromNode, ValFromNode, SetNode: PROC [Node, WordPtr] _ NIL
];

Mesa: TYPE = RECORD [mesa: ROPE, directory, imports: RopeList _ NIL];

NodeList: TYPE = LIST OF Node;

Format: TYPE = REF FormatRep;
FormatRep: TYPE = RECORD [
FormatValue: PROC [Node, Format, WordPtr] RETURNS [ROPE],
ParseValue: PROC [Node, Format, WordPtr, STREAM] RETURNS [BOOLEAN],
FormatTest: PROC [NodeType, Format, NodeTestProc, NodeTestData] RETURNS [ROPE],
ParseTest: PROC [NodeType, Format, STREAM] RETURNS [BOOLEAN, NodeTestProc, NodeTestData],
MaxWidth: PROC [NodeType, Format, VFonts.Font] RETURNS [INT],
formatData: REF ANY _ NIL,
key: ROPE
];

ValWP: PROC [node: Node] RETURNS [wp: WordPtr] = INLINE
{wp _ IF node.type.simple THEN node.visible.SocketToWP[] ELSE NIL};

NodeTestProc: TYPE = PROC [where: WordPtr, testData: NodeTestData, nodeType: NodeType] RETURNS [passes: BOOLEAN];
NodeTestData: TYPE = REF ANY;

StretchList: TYPE = LIST OF Stretch;
Stretch: TYPE = RECORD [
node: Node,
variant: SELECT type: StretchType FROM
single => [],
sub => [first, last: INTEGER],
ENDCASE];

StretchType: TYPE = {single, sub};

SingleStretch: TYPE = Stretch[single];
SubStretch: TYPE = Stretch[sub];

Single: PROC [n: Node] RETURNS [Stretch] = INLINE {RETURN[[n, single[]]]};

Sub: PROC [n: Node, first: INTEGER _ FIRST[INTEGER], last: INTEGER _ LAST[INTEGER]] RETURNS [Stretch] = INLINE {
WITH n.type SELECT FROM
ant: ArrayNodeType => BEGIN
IF first = FIRST[INTEGER] THEN first _ ant.first ELSE IF first < ant.first THEN ERROR;
IF last = LAST[INTEGER] THEN last _ ant.last ELSE IF last > ant.last THEN ERROR;
IF first > last THEN ERROR;
RETURN [[n, sub[first, last]]];
END;
ant: AtomNodeType => ERROR;
ENDCASE => ERROR};

Node: TYPE = REF NodeRep;
NodeRep: TYPE = RECORD [
name: ROPE,
type: NodeType,
data: REF ANY _ NIL,	--yes, nodes can have their own data!
initialValue: ROPE _ NIL,
initialValueFormat: Format _ NIL,
cellIn: Cell,
visible: Socket _ [NIL, LAST[CARDINAL]],
unwriteability: INTEGER _ 0,
connections: SocketList _ NIL,
found, XPhobic, isInput: BOOLEAN _ FALSE,
nextPerturbed, nextAffected, nextX, prevX: Node _ NIL--compiler can't handle: notInNodeList--,
watchers: ARRAY Priority OF WatcherList _ ALL[NIL],
next: Node _ NIL,
other: Assertions _ NIL];

notInNodeList: Node;

SocketList: TYPE = LIST OF Socket;
Socket: TYPE = RECORD [cell: Cell, index: CARDINAL];

SocketToWP: PROC [s: Socket, useBryant: BOOL _ FALSE] RETURNS [wp: WordPtr];

Priority: TYPE = {ordinary, high};

Cell: TYPE = REF CellRep;
CellRep: TYPE = RECORD [
name: ROPE,
type: CellType,
nextInstance: Cell,
sim: Simulation,
parent, leftChild, rightSibling: Cell,
firstInternalNode: Node,
internalNodes, components: SymbolTable,
interfaceNodes: NodeS,
other: Assertions,
substantiality: CellSubstantiality,
expansion: ExpandDecision,
realCellStuff: RealCellStuff	-- non-NIL only for Real Cells
];

notInCellList: Cell;

ExpandDecision: TYPE = {Leaf, Inline, Nested};

CellSubstantiality: TYPE = {Real, Shadow};

RealCellStuff: TYPE = REF RealCellStuffRep;
RealCellStuffRep: TYPE = RECORD [
schedNext, nextNeeded, nextNoted: Cell _ NIL--notInCellList--,
newIO, oldIO, switchIO: REF ANY,
newIOAsWP, oldIOAsWP, switchIOAsWP: WordPtr,
locked: BOOLEAN _ FALSE,
affectedFlags: AffectedFlags _ ALL[FALSE],
initQed, propQed, initUDed, propUDed: BOOLEAN _ FALSE,
state: REF ANY,
evals: EvalProcs,
schedWatchers, evalWatchers: WatcherList _ NIL];

AffectedFlags: TYPE = ARRAY Speciality OF BOOLEAN;

Speciality: TYPE = {special, general};

EvalProcs: TYPE = RECORD [
ValsChanged, InitQ, PropQ, InitUD, PropUD, FinalUD, EvalSimple: CellProc _ NIL,
FindVicinity: PROC [cell: Cell, portIndex: CARDINAL, evenIfInput: BOOL _ FALSE] _ NIL];

noPort: CARDINAL = LAST[CARDINAL];

CellProc: TYPE = PROC [cell: Cell];

Structure: TYPE = REF StructureRep;
StructureRep: TYPE = RECORD [
container, mirror: Cell,
schedFirst, schedLast, firstNeeded: Cell,
locked, running: BOOLEAN _ FALSE,
insideNodes: NodeS,
nextPerturbed, nextWasPerturbed: Structure _ NIL--notInStrList--,
firstPerturbed, firstAffected: Node _ NIL];

notInStrList: Structure;

CellToStr: PROC [cell: Cell] RETURNS [str: Structure];
ContainingStr: PROC [cell: Cell] RETURNS [str: Structure] = INLINE
{str _ CellToStr[cell.parent]};

NodeS: TYPE = REF NodeSR;
NodeSR: TYPE = RECORD [nodes: SEQUENCE length: CARDINAL OF Node];

ExpandProc: TYPE = PROC [thisCell: Cell, to: ExpansionReceiver];

ExpansionReceiver: TYPE = RECORD [instance: REF ANY, class: ERClass];
ERClass: TYPE = REF ERClassRep;
ERClassRep: TYPE = RECORD [
CellInstance: PROC [erInstance: REF ANY, instanceName, typeName, interfaceNodes: ROPE, other: Assertions _ NIL] RETURNS [cell: Cell],
NodeInstance: PROC [erInstance: REF ANY, name: ROPE, type: NodeType, initialValue, initialValueFormat: ROPE _ NIL, initData: REF ANY _ NIL, other: Assertions _ NIL] RETURNS [node: Node],
SplitJoin: PROC [erInstance: REF ANY, a, b: StretchList, writeA, writeB: BOOLEAN],
ChangeReps: PROC [erInstance: REF ANY, a, b: Node, writeA, writeB: BOOLEAN]
];

IOCreator: TYPE = PROC [ct: CellType] RETURNS [ioAsAny: REF ANY];

DriveCreator: TYPE = PROC [ct: CellType] RETURNS [driveAsAny: REF ANY];
Initializer: TYPE = PROC [cell: Cell, leafily: BOOLEAN];

CellType: TYPE = REF CellTypeRep;
CellTypeRep: TYPE = RECORD [
name: ROPE,
expand: ExpandProc,
ioCreator: IOCreator,
driveCreator: DriveCreator,
initializer: Initializer,
evals: EvalProcs,
testers: SymbolTable,
ports: Ports,
ioWordCount: CARDINAL,
hasASwitchPort, hasASpecialPort: BOOL _ FALSE,
firstInstance: Cell,
typeData: REF ANY _ NIL,
other: Assertions _ NIL];

CellTest: TYPE = REF CellTestRep;
CellTestRep: TYPE = RECORD [
name: ROPE,
proc: CellTestProc,
stateToo: BOOL
];

CellTestProc: TYPE = PROC [handle: CellTestHandle, testeeType: CellType, testData, io, driveAsAny, stateAsAny: REF ANY];

CellTestHandle: TYPE = REF CellTestHandleRep;
CellTestHandleRep: TYPE;

NarrowToCellTestHandle: PROC [any: REF ANY] RETURNS [cth: CellTestHandle];
GetSimulationFromCellTestHandle: PROC [CellTestHandle] RETURNS [Simulation];

DriveLevel: TYPE = {Drive, Ignore, Test};
DriveTagType: TYPE = CARDINAL;

Ports: TYPE = REF PortsRep;
PortsRep: TYPE = RECORD [
ports: SEQUENCE length: CARDINAL OF Port];

Port: TYPE = RECORD [
firstWord, wordCount: CARDINAL,
name: ROPE,
type: NodeType,
input, output, XPhobic, special: BOOLEAN _ FALSE,
other: Assertions _ NIL];

SocketIsSpecial: PROC [s: Socket] RETURNS [special: BOOL] = INLINE
{port: Port _ s.cell.type.ports[s.index];
special _ (NOT port.type.simple) AND port.special AND (s.cell.expansion = Leaf) AND (ContainingStr[s.cell].mirror = s.cell)};

GetIndex: PROC [ports: Ports, key: ROPE] RETURNS [index: CARDINAL];

notFound: CARDINAL = LAST[CARDINAL];

Simulation: TYPE = REF SimulationRep;
SimulationRep: TYPE = RECORD [
steady: BOOL,
root: Cell,
firstPerturbedStr, firstWasPerturbedStr: Structure _ NIL,
firstX, lastX: Node _ NIL,
switched, wasSettled: BOOLEAN _ FALSE,
other: Assertions _ NIL];

END.
&[Indigo]<Rosemary>2.6>Rosemary.DF=>RoseTypes.Mesa
Last Edited by: Spreitzer, January 25, 1985 10:50:11 am PST
Last Edited by: Gasbarro, July 17, 1984 4:06:47 pm PDT
If steady, initialize for steady-state work; otherwise, for initialization work.
If node's type is simple, user data pointed to by WordPtr; otherwise use data kept at node.
If node's type is simple, user data pointed to by WordPtr; otherwise use data kept at node.
The NodeType is responsible for maintaining "isInput".
"ordinary" is for ordinary mortals, like breakpoints
"high" is for things like the display, which should be updated first
This proc declares the alignment of two lists of subarrays or elements.
This proc declares that the two nodes are electrically identical, but use different representations during simulation.

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