<2.6>Rosemary.DF>> <> <> Library ExamplePrimitives; Imports IO; SRHC: LAMBDA [initial: |[0..16)|] RETURN CELLTYPE AutoName PORTS [input< INT[4], clock<, output> INT[4]] State latched: [0..15] _ 0 Initializer latched _ initial Expand temp: INT[4] _ |IO.PutFR["%gD", IO.card[initial]]|; CEDAR --any old Cedar code may appear here <<... even comment nodes, with -'s and --'s as you please>> --a very dull Cedar statement: -- NULL; ; Pass: PassBlock[input: input, gate: clock, output: temp]; Inv: InvertBlock[input: temp, output: output] EvalSimple IF clock THEN latched _ input; output _ 15 - latched; ENDCELLTYPE