Latch.Rose
Last Edited by: Spreitzer, July 3, 1984 11:13:20 am PDT
Last Edited by: Gasbarro, August 16, 1984 2:35:14 pm PDT
Library Transistors;
pu: Transistor[strength: driveWeak, positive: FALSE, unidirectional: TRUE];
CellType "InvertingLatch"
PORTS [clock<BIT+X, in<BIT+X, out>BIT+X, vdd, gnd<BIT, biasMinus<BIAS]
Expand
inl: BIT+X ← "H";
t3: BIT+X;
latch: unE[gate: clock, in: in, out: inl];
pu1: upE[gate: inl, in: vdd, out: out];
pd1: unE[gate: inl, in: gnd, out: out];
pu2: pu[gate: out, in: vdd, out: inl];
pd2: Transistor[unidirectional: TRUE][gate: out, in: t3, out: inl];
bias: Transistor[offStrength: driveWeak, unidirectional: TRUE, biased: TRUE][gate: biasMinus, in: gnd, out: t3]
EndCellType