<> <> Library Transistors; Imports BitOps; Inverter: CELL [inBIT-S] EvalSimple out _ BitOps.IBISS[in.val#H, out, u, [driveWeak, driveWeak]]; out _ BitOps.IBISS[in.val#L, out, d, [none, drive]]; ENDCELL; SpecialTest: CELL [in1, in2, connect< BIT] Expand o1, o2: BIT; I1: Inverter[in: in1, out: o1]; I2: Inverter[in: in2, out: o2]; P: NETrans[gate: connect, ch1: o1, ch2: o2] ENDCELL