; EmuEIAMRT.mu -- MRT modified to poll Alto EIA interface and ; invoke emulator-level processing when needed ; Last modified September 3, 1978 2:05 PM ; **** Memory Refresh task **** ; This is the MRT for Alto IIs with Extended Memory (16K chips). ; It is modified to abolish the Interval Timer, to eliminate CLOCKTEMP, ; and to send control to the EIA code if turned on (R37[15] = 1). !17,20,TX0,TX6,TX3,TX2,TX8,TX5,TX1,TX7,TX4,,,,,,,; !1,2,PollEIA, NoEIA; !1,2,~EIARq, EIARq; !1,2,EIAInt, EIAExit; !1,2,DOCUR,NOCUR; !1,2,SHOWC,WAITC; !1,2,NOCLK,CLOCK; !1,1,MRTLAST; !1,2,CNOTLAST,CLAST; $CURX $R20; $CURDATA $R21; $MTEMP $R25; $YPOS $R27; $R37 $R37; $NWW $R4; $REFIIMSK $7777; ; This version assumes MRTACT is cleared by BLOCK, not MAR_ R37 ; R37 [4-13] are the low bits of the TOD clock ; R37 [8-14] are the refresh address bits ; Each time MRT runs, four refresh addresses are generated, though ; R37 is incremented only once. Sprinkled throughout the execution ; of this code are the following operations having to do with refresh: ; MAR_ R37 ; R37_ R37 +4 NOTE THAT R37 [14] DOES NOT CHANGE ; MAR_ R37 XOR 2 TOGGLES BIT 14 ; MAR_ R37 XOR 200 TOGGLES BIT 8 ; MAR_ R37 XOR 202 TOGGLES BITS 8 AND 14 MRT: MAR_ R37; **FIRST REFRESH CYCLE** SINK_ MOUSE, BUS; MOUSE DATA IS ANDED WITH 17B MRTA: L_ T_ -2, :TX0; DISPATCH ON MOUSE CHANGE TX0: L_ R37 AND NOT T, T_ R37;INCREMENT CLOCK T_ 3+T+1, SH=0; IE. T_ T +4. IS INTV TIMER ON? L_ REFIIMSK AND T, :PollEIA; [PollEIA, NoEIA] ZERO HIGH 4 BITS NoEIA: R37_ L; STORE UPDATED CLOCK ~EIARq: T_ 2; NO STATE AT THIS POINT IN PUBLIC REGS MAR_ R37 XOR T,T_ R37; **SECOND REFRESH CYCLE** L_ REFZERO AND T; ONLY THE CLOKCK BITS, PLEASE SH=0, TASK; TEST FOR CLOCK OVERFLOW :NOCLK; [NOCLK,CLOCK] NOCLK: T _ 200; MAR_ R37 XOR T; **THIRD FEFRESH CYCLE** L_ CURX, BLOCK; CLEARS WAKEUP REQUEST FF T_ 2 OR T, SH=0; NEED TO CHECK CURSOR? MAR_ R37 XOR T, :DOCUR; **FOURTH REFRESH CYCLE** NOCUR: CURDATA_ L, TASK; MRTLAST:CURDATA_ L, :MRT; END OF MAIN LOOP ; Memory Refresh Task (cont'd) CLOCK: MAR_ CLOCKLOC; R37 OVERFLOWED. NOP; L_ MD+1; INCREMENT CLOCK IM MEMORY MAR_ CLOCKLOC; MTEMP_ L, TASK; MD_ MTEMP, :NOCLK; DOCUR: L_ T_ YPOS; CHECK FOR VISIBLE CURSOR ON THIS SCAN SH<0, L_ 20-T-1; ***x13 change: the constant 20 was 17 SH<0, L_ 2+T, :SHOWC; [SHOWC,WAITC] WAITC: YPOS_ L, L_ 0, TASK, :MRTLAST; SQUASHES PENDING BRANCH SHOWC: MAR_ CLOCKLOC+T+1, :CNOTLAST; CNOTLAST: T_ CURX, :CURF; CLAST: T_ 0; CURF: YPOS_ L, L_ T; CURX_ L; L_ MD, TASK; CURDATA_ L, :MRT; ;AFTER THIS DISPATCH, T WILL CONTAIN XCHANGE, L WILL CONTAIN YCHANGE-1 TX1: L_ T_ ONE +T, :M00; Y=0, X=1 TX2: L_ T_ ALLONES, :M00; Y=0, X=-1 TX3: L_ T_ 0, :M00; Y=1, X=0 TX4: L_ T_ ONE AND T, :M00; Y=1, X=1 TX5: L_ T_ ALLONES XOR T, :M00; Y=1, X=-1 TX6: T_ 0, :M00; Y=-1, X=0 TX7: T_ ONE, :M00; Y=-1, X=1 TX8: T_ ALLONES, :M00; Y=-1, X=-1 M00: MAR_ MOUSELOC; START THE FETCH OF THE COORDINATES MTEMP_ L; YCHANGE -1 L_ MD+ T; X+ XCHANGE T_ MD; Y MAR_ MOUSELOC; NOW RESTORE THE UPDATED COORDINATES T_ MTEMP+ T+1; Y+ (YCHANGE-1) + 1 MD_ M, L_ T, TASK; MD_ M, :MRTA; ; Here to poll the EIA interface. If service is required, ; issue an interrupt on channel 16B and disable further polling. PollEIA: MAR_ EIALOC; EIALOC=0 if service is required R37_ L; Store updated refresh address T_ 2; Prepare to issue interrupt L_ NWW OR T; SINK_ MD, BUS=0; Test EIALOC T_ R37-1, :~EIARq; [~EIARq, EIARq] EIARq: NWW_ L, L_ T, TASK, :NoEIA; Issue interrupt, R37[15]_ 0