; MesaGateEIA.mu -- Top-level microcode source for Alto Gateway running
;			Mesa and using EIA board.

;	Last modified HGM July 19, 1980  5:52 PM -- Convert to Mesa 6

#AltoConsts23.mu;


; Reset locations of the tasks to be started in the Ram (Emulator, MRT,
; and one extra Ethernet).  Extra Ethernet is assumed to be run by task 2.

!17, 20, Emulator, , EREST, , , , , , MRT;

;
;	Now bring in Mesa overflow microcode  (From XMesaOverflow.mu)
;

#XMesaRAM.mu;

;-----------------------------------------------------------------
; MISC - Miscellaneous instructions specified by alpha
;	alpha=11 => RCLK has been handled by ROM
;	T contains alpha on arrival at MISC in RAM
;-----------------------------------------------------------------

; Precisely one of the following lines must be commented out.

MISC:		L←0, SWMODE, :Setstkp;			dummy MISC implementation

;#MesaMisc.mu;						real implementation

; Ram entry vector, for access via Mesa JRAM instruction.
; Note that only Ram locations 400-777 and 1400-1777 are reachable from Rom1.

%7, 1777, 1400, SilentBoot, EnableEIA, PupChecksum;


; Reserve 774-1003 for Ram Utility Area.

%7, 1777, 774, RU774, RU775, RU776, RU777, RU1000, RU1001, RU1002, RU1003;

; For the moment, just throw these locations away.  This is done only
; to squelch the "unused predef" warnings that would otherwise occur.
; If we ever run short of Ram, assign these to real instructions somewhere
; in microcode executed only by the Emulator.

RU774:	NOP;
RU775:	NOP;
RU776:	NOP;
RU777:	NOP;
RU1000:	NOP;
RU1001:	NOP;
RU1002:	NOP;
RU1003:	NOP;


; **** Modified Memory Refresh Task ****

#EIAMRT.mu;


; **** EIA microcode ****

#AltoEIA1.mu;
#AltoEIA2.mu;


; **** Extra Ethernet microcode ****

$ECNTR	$R11;		Same as CLOCKTEMP, which has been abolished
$EPNTR	$R14;		Not used by Mesa or Nova emulator

#ExtraEther1.mu;

; **** Emulator Task ****

; Emulator, SilentBoot and PupChecksum
#PupChecksum.mu;


; EnableEIA: PROCEDURE[lineTab: POINTER]
; If lineTab is nonzero, specifies the address of the Line Table (LINTAB)
; and enables the EIA microcode.
; If lineTab is zero, disables the EIA microcode.
; Entry point is Ram address 1401.

!1, 2, EIAOn, EIAOff;

EnableEIA:
	L← stkp-1;			stkp← stkp-1
	stkp← L, T← 0+1;
	L← stk0, BUS=0;			Get arg from stack, test for zero
	LINTAB← L, :EIAOn;		[EIAOn, EIAOff]
EIAOn:	L← R37 OR T, TASK, :UpdR37;	Nonzero, turn on R37[15]
EIAOff:	L← R37 AND NOT T, TASK;		Zero, turn off R37[15]
UpdR37:	R37← L, :Emulator;		Update R37