file: MesaMu.Log Mesa Microcode Log
Add entries at front

September 24, 1980; overflow 10; Missing PREDEF in Floating Add repaired. [RAM: 2 free] RJ

September 22, 1980; overflow 9; Added IEEE floating point and HBlt (Griffin) from Larry Stewart. [RAM: 2 free] RJ

July 2, 1980; overflow 8; Added PupChecksum (from HGM) to normal overflow microcode. [RAM: 170 used] RJ

April 28, 1980; overflow 7; Smashing G on entry (overflow version 5) passed value thru T instead of L. Write must have been thinking he was microcoding a Dolphin. [RAM: 143 used] RJ

March 5, 1980; overflow 6; Long BITBLT was a mess and wouldn’t work anyway. Produced a simpler version which stuffs "unused" word into emulator bank register if #0. Also added code to allow ram BITBLT to be called via JRAM when running with version 39 ROMs. [RAM: 143 used] RJ+JS

February 1, 1980; overflow 5; Smash G on entry from Nova land to disable fast Xfer on initial entry. [RAM: 157 used] RJ

December 21, 1979; XMesa 41, overflow 4; Implemented Long BITBLT, MISC escape to RAM, and fast xfer when not changing G for XMesa. [ROM: 8 free, RAM: 157 used] RL&RJ

July 19, 1979; version 41; Changed ROM return addresses to be compatible with 3K RAM. [2 free words left] RL&RJ

May 22, 1979; version 40; Fixed code at BNDCKr to load L so that ALUCY tests the right carry bit. [2 free words left] RJ

May 3, 1979; version 39; Renamed files so RAM version is "normal". [2 free words left] RJ

March 1, 1979; version 39; Correct bug in JIW to allow backward jumps. [2 free words left] RJ

February 16, 1979; version 38; Redefine return addresses for ROM0 subroutines to ensure compatibility with 3K RAM feature on Alto IVs and retrofitted Alto IIs. Correct predefs for return addresses to ensure correct allocation. [2 free words left] RL

January 4, 1979; version 37; AbortPending location renamed HardMRE. SDoffset changed to 100B. ALLOC changed to eliminate large frame logic. PUSHX removed; LINKB added. [2 free words left] RL

November 27, 1978; version 36; MRE redefined to test location 20 instead of cvptr and drop to Nova code if non-zero. [2 free words left] RL

November 3, 1978; version 35; LFC9-16 and JIB removed. DUCOMP, PL0-3, NILCK, and BNDCK added. DCOMP fixed to do true signed compare. Normal case of ME, MRE, and MXD now done directly in microcode. Opcode numbers, NovaDV, and part of SD reordered. RR6 removed; MISC (returns doubleword clock) added. JRAM aligned. Microcode version available at runtime. Missing predef for Jadc/Jsub added. TASK added in LSTF. [2 free words left] RL

August 1, 1978; version 34; Fix bugs in stack underflow detection in MDpop and Dpop dispatches. Fix BLTC to remember even/odd alignment. [2 free words left] RL

July 26, 1978; version 33; Correct constant at Jscale from 100000 to 77777. [3 free words left] RJ

July 5, 1978; version 32; Fix signed comparison bytecodes to handle overflow correctly (Suzuki’s algorithm). Add BLTC bytecode. Eliminate 1 instruction each in nextXB logic and FetchAB. Eliminate 3 instructions by combining JEQ and JNE logic. Miscellaneous corrections to comments and some predefs. [3 free words left] RL

March 6, 1978; version 31b; Ensure DISP non-zero at KFCr. Add RFC. [3 free words left] RJ & RL

March 2, 1978; version 31a; Entry conditions for all trap handlers changed: trap parameters now passed in registers, and interrupts never disabled. AV, SD, GFT now bound to fixed addresses. RR and WR changed appropriately, and additional RR added for real-time clock. Xfer traps implemented. BITBLT/interrupts disabled bug fixed, ADD01 implemented. Miscellaneous optimizations to free space (RIL0, Jeven, SHIFT). [6 free words left] RL

February 14, 1978; version 30c; Fix bug in BITBLT (TASK error when interrupts pending but disabled). [8 free words left] RL

February 9, 1978; version 30b; Fix bug in EFCB (missing pre-def for EFCdoGetlink). [8 free words left] RL

January 20, 1978; version 30a; Global frame overhead reduced to 3 words. GP diddled to point at global 1 instead of 2 (because -6 not available in constants ROM). Links in either code segment or global frame supported. LLKB bytecode added. TASK violations on stack overflow fixed. [8 free words left] RL

January 16, 1978; version 29; Splitalpha uses dispatch instead of ShiftSub. ShiftSub moved to Mesad.mu. DESCB and DESCBS added. CVT and BLK removed. Symbolic names for frame offsets substituted for constants throughout. [22 free words left] RL

January 5, 1978; version 28; Miscellaneous cleanup. Replace ’verytemp’ by ’saveret’. Change definition of ’mx’ to free an R-register. Extend uses of ’taskhole’. Prepare for elimination of BLK and possibly CVT. [36 free words left] RL

January 3, 1978; version 27; Replace ABORT by REQUEUE. Change MRE to 2 parameters and ME to 1 parameter. RJ

December 21, 1977; version 26; Move NovaDV to 25. Change MRE to 3 parameters. RJ

December 1, 1977; version 25; AllocTrap from ALLOC instruction must go through KFCr instead of directly to Mtrap. RJ

November 22, 1977; version 24; Complete rewrite of microcode, many new conventions and semantics. See separate documentation. RL

July 25, 1977; version 23a; Fixup code at alloc1z because -T-1 will not load T from ALU output. Required extra instruction. Might want to try to optomize better later. RJ

July 24, 1977; version 22a; Change to single parameter alloc trap. Use double memory fetch at xferg. RJ

July 13, 1977; version 21a; Update RSTR and WSTR instructions to take offset from alpha instead of assuming 4. RJ

July 7, 1977; version 20c; Tweak Mesa.bcpl. RJ

July 7, 1977; version 20b; Change Mesa.bcpl so that it does not skip the first item in Com.Cm if it has a .image extension. This is in anticipation of having the Executive "do the right thing" for running Image files. RJ

June 20, 1977; version 20a; At DWDC1+3 change T←MD OR T to L←MD OR T. RJ

June 1, 1977; version 19b; New value of sGoingAway in mesa.bcpl and take out enableinterrupts jsr code in mesa-nova.asm. RJ

May 27, 1977; version 19a; New Format Procedure Descriptor. RJ

May 18, 1977; version 18a; No room for TASK at LFCxxx; deleted. New instructions IWDC and DWDC along with wdc register and shuffling of other registers to make room. Loadstate subroutine modified because of interrupt change. RJ

April, 1977; version 17b; Implement Clark/Sproull/Johnsson convention for testing for presence of ROM1. RJ

March 23, 1977; version 17a; Had to move TASK at LFCn to after store of 0 into mx at LFCxxx+1. Also take out loading of RAM to initialize registers. RJ

March 18, 1977; version 16d; Trouble with trap before PUSHX, frame alloc or code swap will change mx. This change fixed frame trap by pushing mx instead of my. The trap handler can now get my from the state (see 16c). When frame trap sees destination of 2MOD4 it will put the new frame back on the list and retry the xfer. Interrupts will remain off through PUSHX. In addition the compiler will not allow nexted procedures with large frames. RJ

March 9, 1977; version 16c; Can’t disturb stack on BRK; instead get DST to save my by extra call to savsub at DSTr1. RJ

March 8, 1977; version 16b; Move Mstopc to 777 for standard ROM1 check (convention developed with D. Clark). Change semantics of BRK: pass current L as parameter of trap and don’t backup pc. RJ

February 18, 1977; version 16a; Changes before blowing PROMs. (1) Free up R14 for use by Trident code by moving my to S51. (2) Delete extra IR← in call of alloc since only one caller. (3) Implement LRU word in code segment at lgc. (4) Fix use of M across TASK at xfer2 and BLT. (5) Move Mgo to 420 so SWMODE from ROM0 will go to ROM1. (6) Add JRAM opcode (#366) to do SWMODE to address on stack. Move nxtib to 400 for return. RJ

February 18, 1977; version 15c; Make MUL, DIV and LDIV be unsigned. RJ

February 18, 1977; version 15b; Fix bug in bitmasks for unsigned compares. RJ

February 3, 1977; version 15a; Change opcode numbers to make room for
unsigned jumps. Add unsigned jumps, remove RBIT0, RBIT1. RJ