112AppendixMaxc Operations

<==<MaxcOpsFigure3Mat.Press<

NEW BIPOLAR CARD CHIP CHANGING MAP

MEMORYBITSSLOTMEMORYROWS

SM/DM/DM1/DM2 0 - 17 8SM, DMA & C
18 - 35 9DM1, DM2B & D
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - IM Addresses < 4000A & C
IM 0 - 1777 0 - 17 LH10IM Addresses >4000B & D
4000 - 577718 - 35 LH11
0 - 17 RH (36 - 53)12The P chips in A and C are two bits of
18 - 35 RH (54 - 71)13parity for rows A and C.
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - The P chips in B and D are two bits of
IM 2000 - 3777 0 - 17 LH14parity for rows B and D.
6000 - 777718 - 35 LH15
0 - 17 RH (36 - 53)16
18 - 35 RH (54 - 71)17

Bit numbers for 82S10 storage chips

Top numbers for cards storing bits 0 - 17.
Bottom numbers for cards storing bits 18 - 35.

Figure 3.