Operaating Tenex Microcode from MidasMaxc Operations4412. OPERATING TENEX MICROCODE FROM MIDASA.Reset is accomplished by typing21;Gto Midas. The effect of this is to put the machine in monitor mode, to clear the interrupt system,the APR, the processor flags and the disk system. However, Nova peripherals aren't affected, norare the accumulators or PC affected. If NVIO or AltIO is called after RESET the processor willstart at its starting address (pointed to by absolute location 7).B.Starting at an arbitrary PDP-10 location n is accomplished by changing the contents of PC(which is on the display) to n and then typingREMAPPC:(Midas types out the value m of REMAPPC)6,NVIO;T(Maxc1 only)"AltIO", "Do-It"(Maxc2 only)C.The PDP-10 accumulators are LM 0, LM 1, ..., LM 17 and can be examined and changed inthe usual way from Midas.D.The PDP-10 flags are in the left-most 13 bits of the F-register on the display. If you changethese from Midas, don't change the other 23 bits of F.These and other interesting bits of F are as follows:BitDefinition0Overflow1Carry 02Carry 13Floating overflow4Byte increment suppress5User mode6PARC mode (replaces PDP-10 user I/O mode)7Call from monitor (see JSYS, UMOVE, and Pager addendums to PDP-10 SystemReference Manual)8-10Machine mode (0=PDP-10, 1=Byte Lisp)11Floating underflow12No divide13Pushdown overflow14XCT015XCT116XCT217XCT318Incompatible19PI system is active20PI cycle in progress21MONALT - Temporary flag used by map loading microcode)fqX%;pi _rX) \12sX UMF S@! Q0/ OB L{r2s)(LL$L{ JJZJG? ?X0F)G? Et ?t sC ?t s @7r2sU >m :r2sP 906 5X52Lr .s-s+Es){s's%s$s)"PsH s$s&s[ssss1sfs s s s5 =]L)Maxc OperationsOperating Tenex Microcode from Midas4522THIRDPT - Temporary flag used by map loading microcode23Unused24TTYBSY - console teletype output busy25LOGF - enables main loop "LOGI", "BRKI", or "TRACEI" path26PICYCLE27CUM28MICRO29IENABLE30Unused31NOVA - Nova/Alto has left an interrupt request32K33J34H35GE.The interrupt system state is given by the following:PISTAT[29,35] have 1's when interrupts are in progress on the corresponding PI levels[1,7].PISTAT[22,28] have 1's when interrupts are disabled on the corresponding PI levels.SM 600 to SM 643 contain in bits 12-35 the interrupt locations corresponding to devices 0 through35. The device assignments are in Maxc document 11.SM 644 to SM 652 are the interrupt-enabled bit tables for priority interrupt levels 1 through 7. 1'sin each word indicate that the corresponding device (bit 0=device 35, bit 35=device 0) is enabledfor interrupts at that level.MICINTS contains 1's for each device which has requested an interrupt. (However, OVF, FOVF,and PDOVF are recomputed from F for each instruction, so their state in MICINTS isn'timportant.)F.The microcode consistency "Checker" uses four variables CSUMD, CSUM0, CSUM1, andCSUM2 which contain checksums for all constants in the microprocessor's IM, DM, DM1, DM2,and SM memories. CSUMD is an overall checksum (for detection of errors) while CSUM0-CSUM2 contain 18 6-bit bytes each of which is a checksum in a Hamming code. The checkercomputes the address which is clobbered assuming only a single word is wrong.When newly assembled microcode is loaded for the first time on Maxc1, these checksums arecomputed by running CHECKER ("25;G" in the TENLOAD command file) and entering thevalues left in LM 11-LM 14 into the PATCHES file for CSUMD-CSUM2. On Maxc2, thechecksums are computed and dumped automatically by "Midas Init". Subsequent runnings of theTENLOAD, MEXECGO, and TENGO command files check the newly loaded system against theseconstants, and crash on errors. Also the CHECK JMC does this (executed during Tenexinitialization). fpi-3qXFp_s6]Ks[s%Ys9WsV!sTVsRsPsNs.M,sKasIsGs DZr2s5 @&5 ?S ;4- 94 6oM 4Z 2 /hF -6 + (`r2s-# &!8 $; #L !6M ; Q / E d9# O G  >UN TIMESROMAN  TIMESROMAN  TIMESROMAN  TIMESROMAN  TIMESROMAN  j/ JHMaxcOps12.BravoRWeaverNovember 25, 1980 1:06 PM