<> <> <> DIRECTORY Core, CoreFlat, IO, Mint, MintCmds, PWCore, Rope, TerminalIO, WriteCapa; IFUMintTest: CEDAR PROGRAM IMPORTS CoreFlat, IO, Mint, MintCmds, PWCore, Rope, TerminalIO, WriteCapa SHARES MintCmds = BEGIN DoIt: PROC[ct: Core.CellType] = { circuit: Mint.Circuit; knowns: Mint.NodeList _ NIL; worst: Mint.ps; pathArray: Mint.PathArray; TerminalIO.PutF["Get Layout (%g).\n", IO.time[]]; []_PWCore.Layout[ct]; TerminalIO.PutF["Mint WriteCapa (%g).\n", IO.time[]]; WriteCapa.WriteWireCapa[ct]; TerminalIO.PutF["Mint Create Circuit (%g).\n", IO.time[]]; circuit _ Mint.CreateCircuit[ct]; TerminalIO.PutF["Mint Prepare Circuit (%g).\n", IO.time[]]; MintCmds.PrepareCircuit[circuit, TRUE]; TerminalIO.PutF["Mint Check Circuit (%g).\n", IO.time[]]; Mint.CheckLibrary[circuit]; TerminalIO.PutF["Mint Check Complete (%g).\n", IO.time[]]; knowns _ AddClocks[circuit: circuit, phA: TRUE]; TerminalIO.PutF["Mint Check PhA (%g).\n", IO.time[]]; [worst, pathArray] _ Mint.FindSlowestPaths[circuit]; Mint.PrintPathArray[pathArray, circuit]; knowns _ AddClocks[circuit: circuit, phA: FALSE]; TerminalIO.PutF["Mint Check PhB (%g).\n", IO.time[]]; [worst, pathArray] _ Mint.FindSlowestPaths[circuit]; Mint.PrintPathArray[pathArray, circuit]; Mint.KillCircuit[circuit]}; AddClocks: PROC[circuit: Mint.Circuit, phA: BOOL] RETURNS[list: Mint.NodeList _ NIL]={ list _ AddSignal[list, circuit, "Clk", TRUE]; list _ AddSignal[list, circuit, "PhA", phA]; list _ AddSignal[list, circuit, "PhB", NOT phA]; list _ AddSignal[list, circuit, "DrControlBot[0].PhA", phA]; list _ AddSignal[list, circuit, "DrControlBot[0].PhB", NOT phA]; list _ AddSignal[list, circuit, "DrControlBot[0].NotPhA", NOT phA]; list _ AddSignal[list, circuit, "DrControlBot[0].NotPhB", phA]; list _ AddSignal[list, circuit, "DrControlBot[2].DShA", FALSE]; list _ AddSignal[list, circuit, "DrControlBot[2].DShB", FALSE]; list _ AddSignal[list, circuit, "DrControlBot[2].DShRd", FALSE]; list _ AddSignal[list, circuit, "DrControlBot[2].DShWt", FALSE]; list _ AddSignal[list, circuit, "DShA", FALSE]; list _ AddSignal[list, circuit, "DShB", FALSE]; list _ AddSignal[list, circuit, "DShRd", FALSE]; list _ AddSignal[list, circuit, "DShWt", FALSE]; RETURN[list]}; AddSignal: PROC[orig: Mint.NodeList, circuit: Mint.Circuit, name: IO.ROPE, value: BOOL] RETURNS[Mint.NodeList] = { found: BOOL _ TRUE; node: Mint.Node; node _ Mint.NodeFromRope[Rope.Cat["public.",name], circuit ! CoreFlat.PathError=>{ TerminalIO.PutF["Mint Node: %g not found\n", IO.rope[name]]; found_FALSE; CONTINUE}]; IF NOT found THEN RETURN[orig]; Mint.SetNode[node, value]; RETURN[CONS[node, orig]]}; END.