IFUPLAPass.mesa
Copyright c 1984 by Xerox Corporation. All rights reserved.
McCreight, May 20, 1986 6:20:55 pm PDT
Curry, June 2, 1986 11:20:14 am PDT
Don Curry April 30, 1987 10:41:25 pm PDT
DIRECTORY
Dragon;
IFUPLAPass: CEDAR DEFINITIONS =
BEGIN
LtDrPadIO: TYPE = RECORD [ -- default must be zero
iPReject:    BOOLFALSE,      -- B  => BA
iPFaulting:   BOOLFALSE,      -- B  => BA
newFetch:   BOOLFALSE,      -- BAA <= BA
reset:     BOOLFALSE,      -- AB  => BA
reschedule:   BOOLFALSE ];     -- AB  => BA
RtDrPadIO: TYPE = RECORD [ -- default must be zero
dPReject:    BOOL      ← FALSE,   -- BA <= B dual
dPFault:    Dragon.PBusFaults  ← none,   -- BA <= B
dPFaultCode:   PBusFaultCode   ← memAccess, -- BA => BAA
dPFaultCodeD:  PBusFaultCode   ← memAccess, -- AB <= BAA
dPCmnd3:   Dragon.PBusCommands ← NoOp,   -- BA => BAA
userMode2:   BOOL      ← FALSE,   -- BA => BAA
eUAluOp2:   Dragon.ALUOps   ← Or,    -- AB => ABB
eUCondSel2:   Dragon.CondSelects  ← False,   -- AB => ABB
eUCondition2:  BOOL      ← FALSE,   -- BA <= B
eUWriteToPBus3: BOOL      ← FALSE,   -- AB => ABB
eURdFromPBus3: BOOL      ← FALSE,   -- AB => ABB
K0PadsIn4:   BOOL      ← FALSE,   -- Ac <= BA
K1PadsIn4:   BOOL      ← FALSE,   -- Ac <= BA
K0PadsOut3:   BOOL      ← FALSE,   -- BA <= BA
K1PadsOut3:   BOOL      ← FALSE,   -- BA <= BA
X2ASrcLit1:   BOOL      ← FALSE,   -- BA => BAA
X2ASrcLit2:   BOOL      ← FALSE,   -- Ac <= BAA dual
debugABGD:   BOOL      ← FALSE,   --  <debug>
debugPC:    BOOL      ← FALSE,   --  <debug>
debugLSC:   BOOL      ← FALSE,   --  <debug>
debugABStLim:  BOOL      ← FALSE ];  --  <debug>
PBusFaultCode: TYPE = MACHINE DEPENDENT {
memAccess (Dragon.PBusFaults[ memAccess ].ORD MOD 8),
ioAccess  (Dragon.PBusFaults[ ioAccess  ].ORD MOD 8),
map   (Dragon.PBusFaults[ map   ].ORD MOD 8),
au    (Dragon.PBusFaults[ au   ].ORD MOD 8),
timeOut  (Dragon.PBusFaults[ timeOut  ].ORD MOD 8),
other   (Dragon.PBusFaults[ other   ].ORD MOD 8) };
END.