IFUChipTest.mesa
Don Curry February 23, 1988 5:25:12 pm PST
DIRECTORY
CommandTool, Core, CoreCreate, ICTest, IFUPublic, IO, Ports, Rope, RosemaryUser, RosemaryVector, TestCable;
IFUChipTest: CEDAR PROGRAM
IMPORTS CommandTool, CoreCreate, ICTest, IFUPublic, IO, Rope, RosemaryVector, TestCable
= BEGIN
II:    TYPE = IFUPublic.II;
QPh:   TYPE = {A, ab, B, ba};
T:    BOOL = TRUE;
F:    BOOL = FALSE;
initialWDir: Rope.ROPE ← CommandTool.CurrentWorkingDirectory[];
assignments: ICTest.Assignments ← NIL;
groups:  ICTest.Groups  ← NIL;
ifuChipTest: Rope.ROPE = "IFU Chip Test";
timeFactor: NAT   = 20; -- period/timeScale
timeScale:  NAT[3..2000) ← 50; -- period/timeFactor
delA:   NAT   ← 0;
delB:   NAT   ← 0;
dela:   NAT   ← 20;
delb:   NAT   ← 50;
IFUCellType: PROC RETURNS[ifu: Core.CellType] = {
ifu ← CoreCreate.Cell[
name:   "IFU",
public:  IFUPublic.IfuInitializedPublic[],
onlyInternal: NIL,
instances:  NIL ] };
Grp: PROC[
n:  NAT,
nm: Rope.ROPE,
dir: ICTest.Directionality,
for: ICTest.FormatType ← DNRZ,
del: ICTest.Delay   ← 0,
wid: ICTest.Width   ← timeScale,
sam: ICTest.Sample  ← 0 ]
RETURNS[group: ICTest.Group ] = {RETURN
[[number: n, name: nm, directionality: dir, format: for, delay: del, sample: sam, width: wid]]};
InitIFUChipTest: PROC = {
R: PROC [a: ICTest.Assignment] = {assignments←CONS[a, assignments]};
t:  NAT[5..4000)  ← timeScale;
ifu: Core.CellType ← IFUCellType[];
ip:  NAT ← 1;
kb: NAT ← 2;
out: NAT ← 3;
in0: NAT ← 4;
in1: NAT ← 5;
in2: NAT ← 6;
ckA: NAT ← 7;
ckB: NAT ← 8;
groups ← LIST[
Grp[n: ip,  nm:"IPData",  dir: biDirectional, for: DNRZ, del: 2*t, sam: 18*t ],
Grp[n: kb,  nm:"KBus",  dir: biDirectional, for: DNRZ, del: 2*t,  sam: 18*t ],
Grp[n: out,  nm:"Outputs", dir: acquire,          sam: 18*t ],
Grp[n: in0,  nm:"Inputs0", dir: force, for: DNRZ, del: 2*t      ],
Grp[n: in1,  nm:"Inputs1", dir: force, for: DNRZ, del: 2*t      ],
Grp[n: in2,  nm:"Inputs2", dir: force, for: DNRZ, del: 2*t      ],
Grp[n: ckA,  nm:"ClockA", dir: force, for: RZ,  del: delA, wid: 18*t   ],
Grp[n: ckB,  nm:"ClockB",  dir: force, for: RZ,  del: delB, wid: 18*t   ] ];
Left      Right    Pod / Board configuration
A 6 Dr  out A  A 0 Dr  ip
B 6 Rec in2 B  B 0 Rec ip
C 7 Dr  ck   C 1 Dr  ip
D       D 1 Rec ip
E       E 2 Dr  kb
F       F 2 Rec kb
G       G 3 Dr  kb
       H 3 Rec kb
       I 4 Dr  in0 in1
       J 4 Rec -
       K 5 Dr  -
       L 5 Rec out
G B
r o S P B C H H
o a i o y h e e P
u r d d t a a a i
Signal Name p d e s e n d d n
R[["IPData[0]", ip, 0,R,AB, A,0, 25, 67, 86]];
R[["IPData[1]", ip, 0,R,AB, A,1, 26,115, 84]];
R[["IPData[2]", ip, 0,R,AB, A,2, 27,117, 82]];
R[["IPData[3]", ip, 0,R,AB, A,3, 28,118, 81]];
R[["IPData[4]", ip, 0,R,AB, A,4, 29,249, 79]];
R[["IPData[5]", ip, 0,R,AB, A,5, 30,250, 78]];
R[["IPData[6]", ip, 0,R,AB, A,6, 31,252, 76]];
R[["IPData[7]", ip, 0,R,AB, A,7, 32,253, 75]];
R[["IPData[8]", ip, 0,R,AB, B,0, 17,255, 73]];
R[["IPData[9]", ip, 0,R,AB, B,1, 18,256, 72]];
R[["IPData[10]", ip, 0,R,AB, B,2, 19,150, 70]];
R[["IPData[11]", ip, 0,R,AB, B,3, 20,151, 69]];
R[["IPData[12]", ip, 0,R,AB, B,4, 21, 69, 67]];
R[["IPData[13]", ip, 0,R,AB, B,5, 22, 70, 66]];
R[["IPData[14]", ip, 0,R,AB, B,6, 23, 72, 64]];
R[["IPData[15]", ip, 0,R,AB, B,7, 24,129, 63]];
R[["IPData[16]", ip, 1,R,CD, A,0, 41, 99, 61]];
R[["IPData[17]", ip, 1,R,CD, A,1, 42,241, 60]];
R[["IPData[18]", ip, 1,R,CD, A,2, 43,243, 58]];
R[["IPData[19]", ip, 1,R,CD, A,3, 44,245, 57]];
R[["IPData[20]", ip, 1,R,CD, A,4, 45,244, 55]];
R[["IPData[21]", ip, 1,R,CD, A,5, 46,247, 54]];
R[["IPData[22]", ip, 1,R,CD, A,6, 47,230, 52]];
R[["IPData[23]", ip, 1,R,CD, A,7, 48,231, 51]];
R[["IPData[24]", ip, 1,R,CD, B,0, 33,233, 49]];
R[["IPData[25]", ip, 1,R,CD, B,1, 34,234, 48]];
R[["IPData[26]", ip, 1,R,CD, B,2, 35,236, 46]];
R[["IPData[27]", ip, 1,R,CD, B,3, 36,238, 44]];
R[["IPData[28]", ip, 1,R,CD, B,4, 37,240, 41]];
R[["IPData[29]", ip, 1,R,CD, B,5, 38,209, 40]];
R[["IPData[30]", ip, 1,R,CD, B,6, 39,226, 37]];
R[["IPData[31]", ip, 1,R,CD, B,7, 40,122, 35]];
R[["KBus[0]", kb, 2,R,EF, A,0, 57,186,155]];
R[["KBus[1]", kb, 2,R,EF, A,1, 58,184,157]];
R[["KBus[2]", kb, 2,R,EF, A,2, 59,181,160]];
R[["KBus[3]", kb, 2,R,EF, A,3, 60, 62,161]];
R[["KBus[4]", kb, 2,R,EF, A,4, 61, 34,164]];
R[["KBus[5]", kb, 2,R,EF, A,5, 62, 33,165]];
R[["KBus[6]", kb, 2,R,EF, A,6, 63, 58,167]];
R[["KBus[7]", kb, 2,R,EF, A,7, 64,121,168]];
R[["KBus[8]", kb, 2,R,EF, B,0, 56,159,170]];
R[["KBus[9]", kb, 2,R,EF, B,1, 55,158,171]];
R[["KBus[10]", kb, 2,R,EF, B,2, 54,156,173]];
R[["KBus[11]", kb, 2,R,EF, B,3, 53,155,174]];
R[["KBus[12]", kb, 2,R,EF, B,4, 52,153,176]];
R[["KBus[13]", kb, 2,R,EF, B,5, 51,148,177]];
R[["KBus[14]", kb, 2,R,EF, B,6, 50,146,179]];
R[["KBus[15]", kb, 2,R,EF, B,7, 49,145,180]];
R[["KBus[16]", kb, 3,R,GH, A,0,185, 35,182]];
R[["KBus[17]", kb, 3,R,GH, A,1,186, 41,183]];
R[["KBus[18]", kb, 3,R,GH, A,2,187, 43,185]];
R[["KBus[19]", kb, 3,R,GH, A,3,188, 42,186]];
R[["KBus[20]", kb, 3,R,GH, A,4,189, 85,188]];
R[["KBus[21]", kb, 3,R,GH, A,5,190, 84,189]];
R[["KBus[22]", kb, 3,R,GH, A,6,191, 82,191]];
R[["KBus[23]", kb, 3,R,GH, A,7,192, 81,192]];
R[["KBus[24]", kb, 3,R,GH, B,0,177, 95,194]];
R[["KBus[25]", kb, 3,R,GH, B,1,178, 94,195]];
R[["KBus[26]", kb, 3,R,GH, B,2,179, 92,197]];
R[["KBus[27]", kb, 3,R,GH, B,3,180, 91,198]];
R[["KBus[28]", kb, 3,R,GH, B,4,181,110,200]];
R[["KBus[29]", kb, 3,R,GH, B,5,182, 18,201]];
R[["KBus[30]", kb, 3,R,GH, B,6,183, 22,204]];
R[["KBus[31]", kb, 3,R,GH, B,7,184, 20,206]];
R[["Reset", in0, 4,R,IJ, A,0,201, 75,110]];
R[["Reschedule", in0, 4,R,IJ, A,1,202, 60,113]];
R[["EUCondition", in0, 4,R,IJ, A,2,203, 29,223]];
R[["DShA", in0, 4,R,IJ, A,3,204,175,131]];
R[["DShB", in0, 4,R,IJ, A,4,205,174,132]];
R[["DShRd", in0, 4,R,IJ, A,5,206,171,135]];
R[["DShWt", in0, 4,R,IJ, A,6,207,169,137]];
R[["DShIn", in0, 4,R,IJ, A,7,208,163,118]];
R[["DPReject", in1, 4,R,IJ, B,2,219,197, 12]];
R[["DPFault[0]", in1, 4,R,IJ, B,3,220,180, 14]];
R[["DPFault[1]", in1, 4,R,IJ, B,4,221,195, 15]];
R[["DPFault[2]", in1, 4,R,IJ, B,5,222,194, 17]];
R[["DPFault[3]", in1, 4,R,IJ, B,6,223,178, 18]];
R[["DPCmd[0]", out, 5,R,KL, A,0,193,102,239]];
R[["DPCmd[1]", out, 5,R,KL, A,1,194,101,240]];
R[["DPCmd[2]", out, 5,R,KL, A,2,195,206, 2]];
R[["DPCmd[3]", out, 5,R,KL, A,3,196,205, 3]];
R[["DPCmd[4]", out, 5,R,KL, A,4,197,203, 5]];
R[["DPCmd[5]", out, 5,R,KL, A,5,198,202, 6]];
R[["DPCmd[6]", out, 5,R,KL, A,6,199,200, 8]];
R[["DPCmd[7]", out, 5,R,KL, A,7,200,199, 9]];
R[["EUCondSel[0]", out, 5,R,KL, B,0,209, 30,226]];
R[["EUCondSel[1]", out, 5,R,KL, B,1,210, 24,227]];
R[["EUCondSel[2]", out, 5,R,KL, B,2,211, 87,230]];
R[["EUCondSel[3]", out, 5,R,KL, B,3,212, 86,231]];
R[["EUAluOp[0]", out, 5,R,KL, B,4,213,106,233]];
R[["EUAluOp[1]", out, 5,R,KL, B,5,214,109,234]];
R[["EUAluOp[2]", out, 5,R,KL, B,6,215,105,236]];
R[["EUAluOp[3]", out, 5,R,KL, B,7,216,104,237]];
R[["DShOut", out, 6,L,AB, A,0,153,162,119]];
R[["IPCmdFetch", out, 6,L,AB, A,1,154, 76,109]];
R[["UserMode", out, 6,L,AB, A,2,155,213, 11]];
R[["EURdFromPBus", out, 6,L,AB, A,3,156, 28,221]];
R[["EUWriteToPBus", out, 6,L,AB, A,4,157,120,218]];
R[["IPReject", in2, 6,L,AB, B,0,145,125,104]];
R[["IPFaulting", in2, 6,L,AB, B,1,146,123 ,106]];
R[["PhA", ckA, 7,L,CD, A,0,169,143,122]]; -- PLAPhA .. 224, 21]]
R[["PhB", ckB, 7,L,CD, B,0,161,142,123]];
R[["VBB", 0, 0,R,AB, A,0, 25, 25,115]];
R[["IDPlaFireV", 0, 0,R,AB, A,0, 25,222, 23]];
R[["Vdd", 0, 0,R,AB, A,0, 25,207, 1]];
R[["PadVdd", 0, 0,R,AB, A,0, 25,204, 4]];
R[["PadVdd", 0, 0,R,AB, A,0, 25,177, 20]];
R[["Vdd", 0, 0,R,AB, A,0, 25,221, 24]];
R[["Vdd", 0, 0,R,AB, A,0, 25,219, 26]];
R[["Vdd", 0, 0,R,AB, A,0, 25,212, 34]];
R[["Vdd", 0, 0,R,AB, A,0, 25,210, 38]];
R[["PadVdd", 0, 0,R,AB, A,0, 25,208, 43]];
R[["PadVdd", 0, 0,R,AB, A,0, 25,242, 59]];
R[["Vdd", 0, 0,R,AB, A,0, 25, 73, 62]];
R[["PadVdd", 0, 0,R,AB, A,0, 25, 71, 65]];
R[["PadVdd", 0, 0,R,AB, A,0, 25,248, 80]];
R[["Vdd", 0, 0,R,AB, A,0, 25,116, 83]];
R[["Vdd", 0, 0,R,AB, A,0, 25, 66, 87]];
R[["Vdd", 0, 0,R,AB, A,0, 25,112, 90]];
R[["Vdd", 0, 0,R,AB, A,0, 25, 17, 98]];
R[["PadVdd", 0, 0,R,AB, A,0, 25, 47,100]];
R[["PadVdd", 0, 0,R,AB, A,0, 25, 26,116]];
R[["Vdd", 0, 0,R,AB, A,0, 25,144,121]];
R[["PadVdd", 0, 0,R,AB, A,0, 25,140,125]];
R[["PadVdd", 0, 0,R,AB, A,0, 25, 53,143]];
R[["Vdd", 0, 0,R,AB, A,0, 25, 54,146]];
R[["Vdd", 0, 0,R,AB, A,0, 25,192,149]];
R[["Vdd", 0, 0,R,AB, A,0, 25,187,154]];
R[["Vdd", 0, 0,R,AB, A,0, 25,183,158]];
R[["PadVdd", 0, 0,R,AB, A,0, 25, 63,163]];
R[["PadVdd", 0, 0,R,AB, A,0, 25,147,178]];
R[["Vdd", 0, 0,R,AB, A,0, 25, 40,181]];
R[["PadVdd", 0, 0,R,AB, A,0, 25, 44,184]];
R[["PadVdd", 0, 0,R,AB, A,0, 25,111,199]];
R[["Vdd", 0, 0,R,AB, A,0, 25, 19,203]];
R[["Vdd", 0, 0,R,AB, A,0, 25, 46,207]];
R[["Vdd", 0, 0,R,AB, A,0, 25,132,215]];
R[["Vdd", 0, 0,R,AB, A,0, 25,130,217]];
R[["PadVdd", 0, 0,R,AB, A,0, 25,118,220]];
R[["PadVdd", 0, 0,R,AB, A,0, 25,103,238]];
R[["PadGnd", 0, 0,R,AB, A,0, 25,201, 7]];
R[["Gnd", 0, 0,R,AB, A,0, 25,198, 10]];
R[["Gnd", 0, 0,R,AB, A,0, 25,196, 13]];
R[["PadGnd", 0, 0,R,AB, A,0, 25,179, 16]];
R[["PadGnd", 0, 0,R,AB, A,0, 25,228, 32]];
R[["PadGnd", 0, 0,R,AB, A,0, 25,235, 47]];
R[["Gnd", 0, 0,R,AB, A,0, 25,232, 50]];
R[["Gnd", 0, 0,R,AB, A,0, 25,229, 53]];
R[["PadGnd", 0, 0,R,AB, A,0, 25,246, 56]];
R[["PadGnd", 0, 0,R,AB, A,0, 25,152, 68]];
R[["Gnd", 0, 0,R,AB, A,0, 25,149, 71]];
R[["Gnd", 0, 0,R,AB, A,0, 25,254, 74]];
R[["PadGnd", 0, 0,R,AB, A,0, 25,251, 77]];
R[["PadGnd", 0, 0,R,AB, A,0, 25, 96, 89]];
R[["PadGnd", 0, 0,R,AB, A,0, 25,165,101]];
R[["Gnd", 0, 0,R,AB, A,0, 25,126,103]];
R[["Gnd", 0, 0,R,AB, A,0, 25, 78,107]];
R[["PadGnd", 0, 0,R,AB, A,0, 25, 61,112]];
R[["PadGnd", 0, 0,R,AB, A,0, 25, 13,129]];
R[["Gnd", 0, 0,R,AB, A,0, 25,172,134]];
R[["Gnd", 0, 0,R,AB, A,0, 25,168,138]];
R[["PadGnd", 0, 0,R,AB, A,0, 25,166,140]];
R[["PadGnd", 0, 0,R,AB, A,0, 25,189,152]];
R[["PadGnd", 0, 0,R,AB, A,0, 25, 64,166]];
R[["Gnd", 0, 0,R,AB, A,0, 25,160,169]];
R[["Gnd", 0, 0,R,AB, A,0, 25,157,172]];
R[["PadGnd", 0, 0,R,AB, A,0, 25,154,175]];
R[["PadGnd", 0, 0,R,AB, A,0, 25, 36,187]];
R[["Gnd", 0, 0,R,AB, A,0, 25, 83,190]];
R[["PadGnd", 0, 0,R,AB, A,0, 25, 90,193]];
R[["Gnd", 0, 0,R,AB, A,0, 25, 93,196]];
R[["PadGnd", 0, 0,R,AB, A,0, 25, 98,209]];
R[["PadGnd", 0, 0,R,AB, A,0, 25, 32,224]];
R[["Gnd", 0, 0,R,AB, A,0, 25, 88,229]];
R[["Gnd", 0, 0,R,AB, A,0, 25,107,232]];
R[["PadGnd", 0, 0,R,AB, A,0, 25,108,235]];
TestCable.Init[groups, assignments, "PhA", "PhB"];
TestCable.Init[groups, assignments];
ICTest.MakeStandardViewer[
testName:  ifuChipTest,
cellType:  ifu,
clockAName: NIL,
clockAName: "PhA",
clockBName: "PhB",
groups:  groups,
assignments: assignments,
period:  timeFactor*timeScale ]};
Cycle: PROC[p: Ports.Port, Eval: RosemaryUser.TestEvalProc] = {
ClockPh[A, p, Eval];
ClockPh[ab, p, Eval];
ClockPh[B, p, Eval];
ClockPh[ba, p, Eval]};
ClockPh: PROC[ph: QPh, p: Ports.Port, Eval: RosemaryUser.TestEvalProc] = {
p[ II[ PhA     ].ORD ].b ← ph = A;
p[ II[ PhB     ].ORD ].b ← ph = B;
Eval[]};
ChangeTime: ICTest.PeriodChangeProc = {
timeScaleOld: NAT ← timeScale;
timeScale    ← period/10;
IF timeScale # timeScaleOld THEN FOR gr: ICTest.Groups ← groups, gr.rest WHILE gr#NIL DO
offset: NATIF NOT gr.first.name.Substr[0, 5].Equal["Clock"] THEN 0 ELSE
SELECT gr.first.name.Fetch[5] FROM
'A => delA, 'B => delB, 'a => dela, 'b => delb, ENDCASE => ERROR;
gr.first.delay  ← ((gr.first.delay-offset) /timeScaleOld)* timeScale + offset;
gr.first.width  ← (gr.first.width    /timeScaleOld)* timeScale;
gr.first.sample ← (gr.first.sample   /timeScaleOld)* timeScale;
ENDLOOP;
RETURN[groups]};
VectorTest: PROC [file: Rope.ROPE, p: Ports.Port, Eval: RosemaryUser.TestEvalProc] = {
fullfile: Rope.ROPE ← initialWDir.Cat[file, ".ifuVectors"];
vectorFile: RosemaryVector.VectorFile ← RosemaryVector.OpenVectorFile[fullfile, p];
DO
ENABLE IO.EndOfStream => EXIT;
RosemaryVector.ReadVector[vectorFile]; Eval[]; ENDLOOP};
QuickTest: ICTest.TestProc = {VectorTest["DDQuickTest", p, Eval]};
KBusTest: ICTest.TestProc = {VectorTest["DDKBusTest", p, Eval]};
StatusTest: ICTest.TestProc = {VectorTest["DDStatusTest", p, Eval]};
StackTest: ICTest.TestProc = {VectorTest["DDStackTest", p, Eval]};
InitIFUChipTest[];
ICTest.RegisterTestProc[ifuChipTest, "TestCable", TestCable.TestCable];
ICTest.RegisterTestProc[ifuChipTest, "QuickTest", QuickTest];
ICTest.RegisterTestProc[ifuChipTest, "KBusTest", KBusTest];
ICTest.RegisterTestProc[ifuChipTest, "StatusTest", StatusTest];
ICTest.RegisterTestProc[ifuChipTest, "StackTest", StackTest];
ICTest.RegisterPeriodChangeProc[ifuChipTest, ChangeTime];
END.