--Initialize 0 0 000000 0 0 7 64 0 1 0 1 000000 | X X XXXXXX X X X X XXXXXX 0 0 000000 0 0 7 64 0 1 0 1 000000 | X X XXXXXX X X X X XXXXXX 0 0 000000 1 1 7 64 0 1 0 1 000000 | X X XXXXXX X X X X XXXXXX 0 0 000000 1 1 7 64 0 1 0 1 000000 | X X XXXXXX X X X X XXXXXX 0 0 000000 1 1 7 64 0 1 0 1 000000 | X X XXXXXX X X X X XXXXXX --Test OrInH, BInH, DInH, nDInB, nBInB, BInH 0 0 000000 1 1 7 64 0 1 0 1 000000 | 1 3 FFFFFF 7 X 7 0 FFFFFF 0 0 000000 1 1 7 64 0 1 0 1 000000 | 1 3 FFFFFF 7 X 7 0 FFFFFF 1 1 000001 1 1 7 64 1 1 1 1 000001 | 0 2 FFFFFE 6 X 6 0 FFFFFE --OrInH, NRqOutB,BInH,+ 1 1 000001 1 1 7 64 1 1 1 1 000001 | 0 2 FFFFFE 6 X 6 0 FFFFFE --DInH, nDInB, nBInB 1 1 000001 0 1 7 64 1 1 1 1 000001 | 0 2 FFFFFF 6 X 6 0 FFFFFE --Send 1 1 000001 0 1 7 64 1 1 1 1 000001 | 0 2 FFFFFF 6 X 6 0 FFFFFE 1 1 000001 1 1 7 64 1 0 1 1 000001 | 0 2 FFFFFE 7 X 6 0 FFFFFE --DOEn 1 1 000001 1 1 7 64 1 0 1 1 000001 | 0 2 FFFFFE 7 X 6 0 FFFFFE -- Test nSStop 1 1 000002 1 0 7 64 2 1 2 1 000002 | 0 2 FFFFFD 5 X 5 0 FFFFFD --nSStop on 1 1 000003 1 0 7 64 3 1 3 1 000003 | 0 2 FFFFFC 4 X 4 0 FFFFFC 1 1 000004 1 0 7 64 4 1 4 1 000004 | 0 2 FFFFFC 3 X 3 0 FFFFFC -- nSStop active 1 1 000005 1 0 7 64 5 1 5 1 000005 | 0 2 FFFFFC 2 X 2 0 FFFFFC --nSStop off 1 1 000005 1 1 7 64 5 1 5 1 000005 | 0 2 FFFFFC 2 X 2 0 FFFFFC 1 1 000005 1 1 7 64 5 1 5 1 000005 | 0 2 FFFFFC 2 X 2 0 FFFFFC 1 1 000005 1 1 7 64 5 1 5 1 000005 | 0 2 FFFFFA 2 X 2 0 FFFFFA -- nSStop inactive 1 1 000005 1 1 7 64 5 1 5 1 000005 | 0 2 FFFFFA 2 X 2 0 FFFFFA --Test Reset 1 1 000005 1 1 7 24 5 1 5 1 000005 | 0 2 FFFFFA 2 X 2 0 FFFFFA --Reset on 1 1 000006 1 1 7 24 5 1 5 1 000006 | 0 2 FFFFF9 2 X 2 0 FFFFF9 1 1 000005 1 1 7 24 5 1 5 1 000005 | 0 2 FFFFFA 2 X 2 0 FFFFFA 1 1 000005 1 1 7 64 5 1 5 1 000005 | 1 3 FFFFFF 2 X 2 0 000000 --Reset off / Reset active 1 1 000006 1 1 7 64 5 1 5 1 000006 | 1 3 FFFFFF 2 X 2 0 000000 1 1 000006 1 1 7 64 5 1 5 1 000006 | 1 3 FFFFFF 2 X 2 0 000000 1 1 000006 1 1 7 24 5 1 5 1 000006 | 0 2 FFFFF9 2 X 2 0 FFFFF9 --Reset on / Reset inactive 1 1 000005 1 1 7 64 5 1 5 1 000005 | 0 2 FFFFFA 2 X 2 0 FFFFFA --Reset off 1 1 000006 1 1 7 64 5 1 5 1 000006 | 0 2 FFFFF9 2 X 2 0 FFFFF9 1 1 000005 1 1 7 24 5 1 5 1 000005 | 1 3 FFFFFF 2 X 2 0 000000 --Reset on / Reset active 1 1 000005 1 1 7 64 5 1 5 1 000005 | 0 2 FFFFFA 2 X 2 0 FFFFFA -- Reset inactive 1 1 000005 1 1 7 64 5 1 5 1 000005 | 0 2 FFFFFA 2 X 2 0 FFFFFA 1 1 000005 1 1 7 64 5 1 5 1 000005 | 1 3 FFFFFF 2 X 2 0 000000 -- Reset active 1 1 000005 1 1 7 64 5 1 5 1 000005 | 0 2 FFFFFA 2 X 2 0 FFFFFA -- Reset inactive -- Test Reset Freeze 1 1 000005 1 1 7 24 5 1 5 1 000005 | 0 2 FFFFFA 2 X 2 0 FFFFFA --Reset on 1 1 000005 1 1 7 64 5 1 5 1 000005 | 0 2 FFFFFA 2 X 2 0 FFFFFA -- Reset off 1 1 000005 1 1 7 64 5 1 5 1 000005 | 0 2 FFFFFA 2 X 2 0 FFFFFA 1 1 000005 1 1 7 44 5 1 5 1 000005 | 1 3 FFFFFF 2 X 2 0 000000 --Freeze on / Reset active 1 1 000006 1 1 7 44 5 1 5 1 000006 | 0 2 FFFFF9 2 X 2 0 FFFFF9 --Reset inactive 1 1 000007 1 1 7 44 5 1 5 1 000007 | 0 2 FFFFF8 2 X 2 0 FFFFF8 --Reset on 1 1 000008 1 1 7 44 5 1 5 1 000008 | 0 2 FFFFF8 2 X 2 0 FFFFF8 --Freeze active 1 1 000008 1 1 7 24 5 1 5 1 000008 | 0 2 FFFFF8 2 X 2 0 FFFFF8 --Reset on 1 1 000008 1 1 7 44 5 1 5 1 000008 | 0 2 FFFFF8 2 X 2 0 FFFFF8 1 1 000008 1 1 7 44 5 1 5 1 000008 | 0 2 FFFFF8 2 X 2 0 FFFFF8 1 1 000008 1 1 7 24 5 1 5 1 000008 | 1 3 FFFFFF 2 X 2 0 000000 --Reset active 1 1 000008 1 1 7 24 5 1 5 1 000008 | 1 3 FFFFFF 2 X 2 0 000000 --Resetinactive//BAD# 1 1 000008 1 1 7 44 5 1 5 1 000008 | 1 3 FFFFFF 2 X 2 0 000000 1 1 000008 1 1 7 44 5 1 5 1 000008 | 1 3 FFFFFF 2 X 2 0 000000 --Reset active 1 1 000008 1 1 7 44 5 1 5 1 000008 | 1 3 FFFFFF 2 X 2 0 000000 --Reset active /Freeze off 0 2 888888 1 1 7 64 5 1 5 1 888888 | 1 3 FFFFFF 2 X 2 0 000000 --Resetinactive 0 2 888888 1 1 7 64 5 1 5 1 888888 | 1 3 FFFFFF 2 X 2 0 000000 0 2 888888 1 1 7 64 5 1 5 1 888888 | 1 3 FFFFFF 2 X 2 0 000000 0 2 888888 1 1 7 64 5 1 5 1 888888 | 1 1 7777777 2 X 2 0 7777777 --Freeze inactive --Test address 0 2 888888 1 1 7 6A 5 1 5 1 888888 | 1 1 777777 2 X 2 0 777777 --Shift, nAddress / shift 4 1s 0 2 888888 1 1 7 62 5 1 5 1 888888 | 1 1 777777 2 X 2 0 777777 0 2 888888 1 1 7 6A 5 1 5 1 888888 | 1 1 777777 2 X 2 0 777777 0 2 888888 1 1 7 62 5 1 5 1 888888 | 1 1 777777 2 X 2 0 777777 0 2 888888 1 1 7 6A 5 1 5 1 888888 | 1 1 777777 2 X 2 0 777777 0 2 888888 1 1 7 62 5 1 5 1 888888 | 1 1 777777 2 X 2 0 777777 0 2 888888 1 1 7 6A 5 1 5 1 888888 | 1 1 777777 2 X 2 0 777777 0 2 888888 1 1 7 62 5 1 5 1 888888 | 1 1 777777 2 X 2 0 777777 --shift in 1111XXXX 0 2 888888 1 1 7 68 5 1 5 1 888888 | 1 1 777777 2 X 2 0 777777 --shift 5 0s 0 2 888888 1 1 7 60 5 1 5 1 888888 | 1 1 777777 2 X 2 0 777777 0 2 888888 1 1 7 68 5 1 5 1 888888 | 1 1 777777 2 X 2 0 777777 0 2 888888 1 1 7 60 5 1 5 1 888888 | 1 1 777777 2 X 2 0 777777 0 2 888888 1 1 7 68 5 1 5 1 888888 | 1 1 777777 2 X 2 0 777777 0 2 888888 1 1 7 60 5 1 5 1 888888 | 1 1 777777 2 X 2 0 777777 0 2 888888 1 1 7 68 5 1 5 1 888888 | 1 1 777777 2 X 2 0 777777 0 2 888888 1 1 7 60 5 1 5 1 888888 | 1 1 777777 2 X 2 0 777777 0 2 888888 1 1 7 68 5 1 5 1 888888 | 1 1 777777 2 X 2 0 777777 0 2 888888 1 1 7 60 5 1 5 1 888888 | 1 1 777777 2 X 2 0 777777 --shift in 00000111 0 2 888888 1 1 7 6C 5 1 5 1 888888 | 1 1 777777 2 X 2 0 777777 --Shift, nDAddress=off 0 2 888888 1 1 7 66 5 1 5 1 888888 | 1 1 777777 2 X 2 0 777777 0 2 888888 1 1 7 6C 5 1 5 1 888888 | 1 1 777777 2 X 2 0 777777 0 2 888888 1 1 7 66 5 1 5 1 888888 | 1 1 777777 2 X 2 0 777777 --should still have 00000111 0 2 888888 1 1 7 65 5 1 5 1 888888 | 1 1 777777 2 X 2 X 777777 --HybridSel 0 2 888888 1 1 7 65 5 1 5 1 888888 | 1 1 777777 2 X 2 X 777777 0 2 888888 1 1 7 6F 5 1 5 1 888888 | 1 1 777777 2 1 2 0 777777 -- Shift, Data,Hyb,noAdd 0 2 888888 1 1 7 67 5 1 5 1 888888 | 1 1 777777 2 1 2 0 777777 --Transfer Out ID 0 2 888888 1 1 7 6F 5 1 5 1 888888 | 1 1 777777 2 0 2 0 777777 0 2 888888 1 1 7 67 5 1 5 1 888888 | 1 1 777777 2 0 2 0 777777 0 2 888888 1 1 7 6F 5 1 5 1 888888 | 1 1 777777 2 1 2 0 777777 0 2 888888 1 1 7 67 5 1 5 1 888888 | 1 1 777777 2 1 2 0 777777 0 2 888888 1 1 7 6F 5 1 5 1 888888 | 1 1 777777 2 0 2 0 777777 0 2 888888 1 1 7 67 5 1 5 1 888888 | 1 1 777777 2 0 2 0 777777 0 2 888888 1 1 7 6F 5 1 5 1 888888 | 1 1 777777 2 0 2 0 777777 0 2 888888 1 1 7 67 5 1 5 1 888888 | 1 1 777777 2 0 2 0 777777 -- ID 5bits seen 0 2 888888 1 1 6 6B 5 1 5 1 888888 | 1 1 777777 2 1 2 0 777777 -- Shift in 1 to LSB address 0 2 888888 1 1 6 63 5 1 5 1 888888 | 1 1 777777 2 1 2 0 777777 -- Shift in 1 to LSB address --Test execute and shift 0 2 888888 1 1 6 65 5 1 5 1 888888 | 1 1 777777 2 1 2 0 777777 --RegSel1On 0 2 888888 1 1 6 45 5 1 5 1 888888 | 1 1 777777 2 1 2 0 777777 --FreezeOn 0 2 777777 1 1 6 45 5 1 5 1 777777 | 1 1 888888 2 1 2 0 888888 -- 0 2 666666 1 1 6 45 5 1 5 1 666666 | 1 1 999999 2 1 2 0 999999 -- 0 2 555555 1 1 6 45 5 1 5 1 555555 | 1 1 999999 2 1 2 0 999999 --FreezeActive 0 2 444444 1 1 6 45 5 1 5 1 444444 | 1 1 999999 2 1 2 0 999999 -- 0 2 444444 1 1 6 5D 5 1 5 1 444444 | 1 1 999999 2 1 2 0 999999 --Execute,DShift 0 2 444444 1 1 6 55 5 1 5 1 444444 | 1 1 999999 2 1 2 0 999999 --DShift off 0 2 444444 1 1 6 55 5 1 5 1 444444 | 1 1 999999 2 1 2 0 999999 -- 0 2 444444 1 1 6 55 5 1 5 1 444444 | 1 1 BBBBBB 2 1 2 0 BBBBBB -- Execute active 0 2 444444 1 1 6 45 5 1 5 1 444444 | 1 1 BBBBBB 2 1 2 0 BBBBBB -- 0 2 111111 1 1 6 4D 5 1 5 1 111111 | 1 1 BBBBBB 2 1 2 0 BBBBBB --Shift on 0 2 111111 1 1 6 45 5 1 5 1 111111 | 1 1 BBBBBB 2 1 2 0 BBBBBB --Shift off 0 2 111111 1 1 6 45 5 1 5 1 111111 | 1 1 BBBBBB 2 1 2 0 BBBBBB -- 0 2 111111 1 1 6 4D 5 1 5 1 111111 | 0 0 BBBBBB 2 0 2 0 777776 -- Shift on / ShiftActive 0 2 111111 1 1 6 45 5 1 5 1 111111 | 0 0 BBBBBB 2 0 2 0 777776 -- Shift off 0 2 111111 1 1 6 45 5 1 5 1 222222 | 0 0 BBBBBB 2 0 2 0 777776 -- 0 2 111111 1 1 6 45 5 1 5 1 222222 | 0 3 777776 2 0 2 0 777776 --ShiftActive 0 2 111111 1 1 6 45 5 1 5 1 222222 | 0 3 777776 2 0 2 0 777776 -- --Test Write In Clock 0 2 111111 1 1 4 69 5 1 5 1 222222 | 1 1 EEEEEE 2 1 2 0 DDDDDD --TurnRegSel4 on /2 0s 0 2 111111 1 1 4 61 5 1 5 1 222222 | 1 1 EEEEEE 2 1 2 0 DDDDDD -- 0 2 111111 1 1 4 69 5 1 5 1 222222 | 1 1 EEEEEE 2 1 2 0 DDDDDD -- 0 2 111111 1 1 4 61 5 1 5 1 222222 | 1 1 EEEEEE 2 1 2 0 DDDDDD -- 0 2 111111 1 1 0 65 5 1 5 1 222222 | 1 1 EEEEEE 2 X 2 0 DDDDDD --RegSel4 on 0 2 111111 1 1 0 6D 5 1 5 1 222222 | 1 1 EEEEEE 2 X 2 0 DDDDDD --WriteIntClk 00111 0 2 111111 1 1 0 65 5 1 5 1 222222 | 1 1 EEEEEE 2 X 2 0 DDDDDD -- 0 2 111111 1 1 0 6D 5 1 5 1 222222 | 1 1 EEEEEE 2 X 2 0 DDDDDD -- 0 2 111111 1 1 0 65 5 1 5 1 222222 | 1 1 EEEEEE 2 X 2 0 DDDDDD -- 0 2 111111 1 1 0 6F 5 1 5 1 222222 | 1 1 EEEEEE 2 X 2 0 DDDDDD -- 0 2 111111 1 1 0 67 5 1 5 1 222222 | 1 1 EEEEEE 2 X 2 0 DDDDDD -- 0 2 111111 1 1 0 6F 5 1 5 1 222222 | 1 1 EEEEEE 2 X 2 0 DDDDDD -- 0 2 111111 1 1 0 67 5 1 5 1 222222 | 1 1 EEEEEE 2 X 2 0 DDDDDD -- 0 2 111111 1 1 0 6F 5 1 5 1 222222 | 1 1 EEEEEE 2 X 2 0 DDDDDD -- 0 2 111111 1 1 1 67 5 1 5 1 222222 | 1 1 EEEEEE 2 X 2 0 DDDDDD --TurnRegSel5 on 0 2 111111 1 1 1 6B 5 1 5 1 222222 | 1 1 EEEEEE 2 1 2 0 DDDDDD -- 0 2 111111 1 1 1 63 5 1 5 1 222222 | 1 1 EEEEEE 2 1 2 0 DDDDDD -- 0 2 111111 1 1 1 69 5 1 5 1 222222 | 1 1 EEEEEE 2 1 2 0 DDDDDD -- 0 2 111111 1 1 1 61 5 1 5 1 222222 | 1 1 EEEEEE 2 1 2 0 DDDDDD -- 0 2 111111 1 1 1 6B 5 1 5 1 222222 | 1 1 EEEEEE 2 X 2 0 DDDDDD --RegSel5 on 0 2 111111 1 1 1 6D 5 1 5 1 222222 | 1 1 EEEEEE 2 X 2 0 DDDDDD --WriteExtClk 00011 0 2 111111 1 1 1 65 5 1 5 1 222222 | 1 1 EEEEEE 2 X 2 0 DDDDDD -- 0 2 111111 1 1 1 6D 5 1 5 1 222222 | 1 1 EEEEEE 2 X 2 0 DDDDDD -- 0 2 111111 1 1 1 65 5 1 5 1 222222 | 1 1 EEEEEE 2 X 2 0 DDDDDD -- 0 2 111111 1 1 1 6D 5 1 5 1 222222 | 1 1 EEEEEE 2 X 2 0 DDDDDD -- 0 2 111111 1 1 1 65 5 1 5 1 222222 | 1 1 EEEEEE 2 X 2 0 DDDDDD -- 0 2 111111 1 1 1 6F 5 1 5 1 222222 | 1 1 EEEEEE 2 X 2 0 DDDDDD -- 0 2 111111 1 1 1 67 5 1 5 1 222222 | 1 1 EEEEEE 2 X 2 0 DDDDDD -- 0 2 111111 1 1 1 6F 5 1 5 1 222222 | 1 1 EEEEEE 2 X 2 0 DDDDDD -- 0 2 111111 1 1 1 67 5 1 5 1 222222 | 1 1 EEEEEE 2 X 2 0 DDDDDD -- --Read Ext CK Add = 2 0 2 111111 1 1 1 69 5 1 5 1 222222 | 1 1 EEEEEE 2 X 2 0 DDDDDD -- Shift in 00010 to 0 2 111111 1 1 1 61 5 1 5 1 222222 | 1 1 EEEEEE 2 X 2 0 DDDDDD -- address 0 2 111111 1 1 1 69 5 1 5 1 222222 | 1 1 EEEEEE 2 X 2 0 DDDDDD -- 0 2 111111 1 1 1 61 5 1 5 1 222222 | 1 1 EEEEEE 2 X 2 0 DDDDDD -- 0 2 111111 1 1 1 69 5 1 5 1 222222 | 1 1 EEEEEE 2 X 2 0 DDDDDD -- 0 2 111111 1 1 1 61 5 1 5 1 222222 | 1 1 EEEEEE 2 X 2 0 DDDDDD -- 0 2 111111 1 1 1 6B 5 1 5 1 222222 | 1 1 EEEEEE 2 X 2 0 DDDDDD -- 0 2 111111 1 1 1 63 5 1 5 1 222222 | 1 1 EEEEEE 2 X 2 0 DDDDDD -- 0 2 111111 1 1 1 69 5 1 5 1 222222 | 1 1 EEEEEE 2 X 2 0 DDDDDD -- 0 2 111111 1 1 1 61 5 1 5 1 222222 | 1 1 EEEEEE 2 X 2 0 DDDDDD -- Add= 10100010 0 2 111111 1 1 5 67 5 1 5 1 222222 | 1 1 EEEEEE 2 X 2 0 DDDDDD -- Turn Reg 2 on 0 2 111111 1 1 5 6D 5 1 5 1 222222 | 1 1 EEEEEE 2 0 2 0 DDDDDD --Read & RewriteExtClk 0 2 111111 1 1 5 65 5 1 5 1 222222 | 1 1 EEEEEE 2 0 2 0 DDDDDD -- with 0011 0 2 111111 1 1 5 6D 5 1 5 1 222222 | 1 1 EEEEEE 2 1 2 0 DDDDDD -- 0 2 111111 1 1 5 65 5 1 5 1 222222 | 1 1 EEEEEE 2 1 2 0 DDDDDD -- 0 2 111111 1 1 5 6F 5 1 5 1 222222 | 1 1 EEEEEE 2 1 2 0 DDDDDD -- 0 2 111111 1 1 5 67 5 1 5 1 222222 | 1 1 EEEEEE 2 1 2 0 DDDDDD -- 0 2 111111 1 1 5 6F 5 1 5 1 222222 | 1 1 EEEEEE 2 0 2 0 DDDDDD -- 0 2 111111 1 1 5 67 5 1 5 1 222222 | 1 1 EEEEEE 2 0 2 0 DDDDDD -- -- Read Int CK Address = 3 0 2 111111 1 1 1 69 5 1 5 1 222222 | 1 1 EEEEEE 2 X 2 0 DDDDDD -- Shift in address 0011 0 2 111111 1 1 1 61 5 1 5 1 222222 | 1 1 EEEEEE 2 X 2 0 DDDDDD -- to address 0 2 111111 1 1 1 69 5 1 5 1 222222 | 1 1 EEEEEE 2 X 2 0 DDDDDD -- 0 2 111111 1 1 1 61 5 1 5 1 222222 | 1 1 EEEEEE 2 X 2 0 DDDDDD -- 0 2 111111 1 1 1 6B 5 1 5 1 222222 | 1 1 EEEEEE 2 X 2 0 DDDDDD -- 0 2 111111 1 1 1 63 5 1 5 1 222222 | 1 1 EEEEEE 2 X 2 0 DDDDDD -- 0 2 111111 1 1 1 6B 5 1 5 1 222222 | 1 1 EEEEEE 2 X 2 0 DDDDDD -- 0 2 111111 1 1 1 63 5 1 5 1 222222 | 1 1 EEEEEE 2 X 2 0 DDDDDD -- Add= 00100011 0 2 111111 1 1 1 67 5 1 5 1 222222 | 1 1 EEEEEE 2 X 2 0 DDDDDD -- Turn Reg 3 on 0 2 111111 1 1 1 6D 5 1 5 1 222222 | 1 1 EEEEEE 2 1 2 0 DDDDDD --Read & rewriteExtClk 0 2 111111 1 1 1 65 5 1 5 1 222222 | 1 1 EEEEEE 2 1 2 0 DDDDDD -- with 0111 0 2 111111 1 1 1 6F 5 1 5 1 222222 | 1 1 EEEEEE 2 1 2 0 DDDDDD -- 0 2 111111 1 1 1 67 5 1 5 1 222222 | 1 1 EEEEEE 2 1 2 0 DDDDDD -- 0 2 111111 1 1 1 6F 5 1 5 1 222222 | 1 1 EEEEEE 2 1 2 0 DDDDDD -- 0 2 111111 1 1 1 67 5 1 5 1 222222 | 1 1 EEEEEE 2 1 2 0 DDDDDD -- 0 2 111111 1 1 1 6F 5 1 5 1 222222 | 1 1 EEEEEE 2 0 2 0 DDDDDD -- 0 2 111111 1 1 1 67 5 1 5 1 222222 | 1 1 EEEEEE 2 0 2 0 DDDDDD -- . òInterfaceChip.oracle Oracle test file for ClockInterface in DynaInterfaceChip design. Last Edited by: Richard Bruce May 1, 1987 2:34:25 pm PDT Louis Monier August 11, 1987 6:01:59 pm PDT Inputs: nOrOutB, nRqOutB2, nBOutB24, nDOutB3, DBusOut, DOutH3, DCS3, BOutH24 [[[ExtCKOut, LocCKOut, ChipCKOut, ChipCKIn]]] 8Lines Outputs: OrInH4, RqIn2, BInH24, Send4, nSStop, Name3, DBusIn7, DInH3, DOEn, nDInB3, RecAdj, nBInB24 [[[LocCKIn, ExtCKIn, Clock, CKRecAdj, nEClock]]] 11Lines ÊÃ˜J™™AIcode™8K™+J™—J™‰šœ ™ J™˜J˜?J˜?J˜AJ˜@Jšœ?˜?—šœ.˜.Jšœ?˜?Jšœ?˜?JšœX˜XJšœY˜YJšœI˜IJšœC˜CJ˜KJ˜@—˜J˜OJ˜CJ˜TJ˜OJ˜CJ˜CJ˜UJ˜?—˜J˜LJ˜CJ˜CJ˜]J˜DJ˜DJ˜^J˜PJ˜AJ˜]J˜TJ˜@J˜SJ˜T—˜J˜LJ˜OJ˜CJ˜]J˜TJ˜VJ˜QJ˜VJ˜JJ˜>J˜ZJ˜UJ˜LJ˜WJ˜bJ˜UJ˜HJ˜FJ˜V—˜J˜aJ˜DJ˜DJ˜?J˜DJ˜CJ˜CJ˜XJ˜RJ˜DJ˜DJ˜>J˜DJ˜DJ˜DJ˜DJ˜DJ˜YJ˜[J˜>J˜DJ˜\J˜OJ˜>J˜ZJ˜QJ˜>J˜>J˜>J˜>J˜>J˜>J˜>J˜PJ˜\J˜]—˜J˜KJ˜JJ˜BJ˜BJ˜NJ˜BJ˜PJ˜LJ˜BJ˜QJ˜BJ˜JJ˜KJ˜BJ˜YJ˜LJ˜BJ˜MJ˜B—˜J˜VJ˜BJ˜BJ˜CJ˜LJ˜SJ˜BJ˜CJ˜BJ˜CJ˜BJ˜CJ˜BJ˜CJ˜PJ˜CJ˜BJ˜CJ˜BJ˜MJ˜SJ˜BJ˜CJ˜BJ˜CJ˜BJ˜CJ˜BJ˜CJ˜B—˜J˜WJ˜JJ˜CJ˜BJ˜BJ˜BJ˜BJ˜BJ˜BJ˜QJ˜QJ˜WJ˜LJ˜CJ˜BJ˜CJ˜BJ˜CJ˜B—˜J˜ZJ˜OJ˜BJ˜BJ˜BJ˜BJ˜BJ˜PJ˜QJ˜WJ˜LJ˜CJ˜BJ˜CJ˜BJ˜CJ˜BJ˜J˜J˜J˜—J˜J˜J˜J˜J˜J˜J˜J™J™—Ihead˜—…—3€85