PORTS [
Timing and housekeeping interface
PhA, nPhA, PhB, nPhB<BOOL,
Vdd, Gnd<BOOL,
Reschedule<BOOL,
Main memory interface
MHold, MnReset<BOOL,
MnRq0, MnRq1>BOOL,
MnGnt0, MnGnt1<BOOL,
MnNewRq>BOOL, -- Tristate
MnAdCycle=BOOL,
MTransport=INT[36],
MParity=BOOL,
MnShared=BOOL,
MnAbort>BOOL, -- Tristate
MnHousekeepingInProgress=BOOL,
MnError>BOOL, -- Tristate
MnDV=BOOL,
Serial debugging interface
DShift<BOOL,
DExecute<BOOL,
DSelectAdr<INT[12],
DDataIn<BOOL,
DDataOut>BOOL -- Tristate
]
Expand
DnSelect0, DnSelect1, DnSelect2, DnSelect3, DnSelect4, DnSelect5, DnSelect6, DnSelect7, DnSelect8, DnSelect9, DnSelect10, DnSelect11, DnSelect12, DnSelect13, DnSelect14, DnSelect15: BOOL;
DShiftb, DExecuteb, DDataInb, DDataOuti: BOOL;
Rescheduleb, MHoldb, MnResetb, nBoardError: BOOL;
proc0: Processor[MnRq: MnRq0, MnGnt: MnGnt0, DShift: DShiftb, DExecute: DExecuteb, DDataIn: DDataInb, DDataOut: DDataOuti, Reschedule: Rescheduleb, MHold: MHoldb, MnReset: MnResetb];
proc1: Processor[MnRq: MnRq1, MnGnt: MnGnt1, DnSelect0: DnSelect8, DnSelect1: DnSelect9, DnSelect2: DnSelect10, DnSelect3: DnSelect11, DnSelect4: DnSelect12, DnSelect5: DnSelect13, DnSelect6: DnSelect14, DnSelect7: DnSelect15, DShift: DShiftb, DExecute: DExecuteb, DDataIn: DDataInb, DDataOut: DDataOuti, Reschedule: Rescheduleb, MHold: MHoldb, MnReset: MnResetb]
plus dbus decode and buffers, Rescheduleb, MHoldb, MnResetb buffers and error buffer and pullup resistor.